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arm64: dts: allwinner: h6: Add support for RTC and fix the clock tree
This patch adds RTC node and fixes the clock properties and nodes to reflect the real clock tree. The device nodes for the internal oscillator and osc32k are removed, as these clocks are now provided by the RTC device. Clock references are fixed accordingly, too. Signed-off-by: Ondrej Jirman <megous@megous.com> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
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@ -56,14 +56,6 @@ de: display-engine {
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status = "disabled";
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status = "disabled";
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};
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};
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iosc: internal-osc-clk {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <16000000>;
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clock-accuracy = <300000000>;
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clock-output-names = "iosc";
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};
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osc24M: osc24M_clk {
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osc24M: osc24M_clk {
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#clock-cells = <0>;
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#clock-cells = <0>;
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compatible = "fixed-clock";
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compatible = "fixed-clock";
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@ -71,11 +63,11 @@ osc24M: osc24M_clk {
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clock-output-names = "osc24M";
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clock-output-names = "osc24M";
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};
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};
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osc32k: osc32k_clk {
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ext_osc32k: ext_osc32k_clk {
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#clock-cells = <0>;
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#clock-cells = <0>;
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compatible = "fixed-clock";
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compatible = "fixed-clock";
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clock-frequency = <32768>;
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clock-frequency = <32768>;
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clock-output-names = "osc32k";
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clock-output-names = "ext_osc32k";
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};
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};
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psci {
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psci {
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@ -197,7 +189,7 @@ ve_sram: sram-section@0 {
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ccu: clock@3001000 {
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ccu: clock@3001000 {
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compatible = "allwinner,sun50i-h6-ccu";
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compatible = "allwinner,sun50i-h6-ccu";
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reg = <0x03001000 0x1000>;
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reg = <0x03001000 0x1000>;
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clocks = <&osc24M>, <&osc32k>, <&iosc>;
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clocks = <&osc24M>, <&rtc 0>, <&rtc 2>;
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clock-names = "hosc", "losc", "iosc";
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clock-names = "hosc", "losc", "iosc";
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#clock-cells = <1>;
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#clock-cells = <1>;
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#reset-cells = <1>;
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#reset-cells = <1>;
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@ -236,7 +228,7 @@ pio: pinctrl@300b000 {
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&ccu CLK_APB1>, <&osc24M>, <&osc32k>;
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clocks = <&ccu CLK_APB1>, <&osc24M>, <&rtc 0>;
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clock-names = "apb", "hosc", "losc";
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <3>;
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#gpio-cells = <3>;
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@ -710,10 +702,20 @@ tcon_tv_out_tcon_top: endpoint@1 {
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};
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};
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};
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};
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rtc: rtc@7000000 {
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compatible = "allwinner,sun50i-h6-rtc";
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reg = <0x07000000 0x400>;
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interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
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clock-output-names = "osc32k", "osc32k-out", "iosc";
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clocks = <&ext_osc32k>;
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#clock-cells = <1>;
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};
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r_ccu: clock@7010000 {
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r_ccu: clock@7010000 {
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compatible = "allwinner,sun50i-h6-r-ccu";
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compatible = "allwinner,sun50i-h6-r-ccu";
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reg = <0x07010000 0x400>;
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reg = <0x07010000 0x400>;
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clocks = <&osc24M>, <&osc32k>, <&iosc>,
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clocks = <&osc24M>, <&rtc 0>, <&rtc 2>,
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<&ccu CLK_PLL_PERIPH0>;
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<&ccu CLK_PLL_PERIPH0>;
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clock-names = "hosc", "losc", "iosc", "pll-periph";
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clock-names = "hosc", "losc", "iosc", "pll-periph";
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#clock-cells = <1>;
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#clock-cells = <1>;
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@ -741,7 +743,7 @@ r_pio: pinctrl@7022000 {
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reg = <0x07022000 0x400>;
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reg = <0x07022000 0x400>;
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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<GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&osc32k>;
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clocks = <&r_ccu CLK_R_APB1>, <&osc24M>, <&rtc 0>;
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clock-names = "apb", "hosc", "losc";
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clock-names = "apb", "hosc", "losc";
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gpio-controller;
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gpio-controller;
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#gpio-cells = <3>;
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#gpio-cells = <3>;
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