mirror of https://gitee.com/openkylin/linux.git
clk: ux500: Add Device Tree support for the TWD clock
This patch enables the TWD fixed factor clock to be specified from Device Tree via phandles to the "smp-twd-clock" node. Acked-by: Mike Turquette <mturquette@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -60,7 +60,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
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struct device_node *np = NULL;
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struct device_node *child = NULL;
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const char *sgaclk_parent = NULL;
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struct clk *clk, *rtc_clk;
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struct clk *clk, *rtc_clk, *twd_clk;
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if (of_have_populated_dt())
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np = of_find_matching_node(NULL, u8500_clk_of_match);
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@ -234,7 +234,7 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
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clk = clk_reg_prcmu_scalable_rate("armss", NULL,
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PRCMU_ARMSS, 0, CLK_IS_ROOT|CLK_IGNORE_UNUSED);
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clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",
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twd_clk = clk_register_fixed_factor(NULL, "smp_twd", "armss",
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CLK_IGNORE_UNUSED, 1, 2);
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/*
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@ -551,5 +551,8 @@ void u8500_of_clk_init(u32 clkrst1_base, u32 clkrst2_base, u32 clkrst3_base,
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if (!of_node_cmp(child->name, "rtc32k-clock"))
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of_clk_add_provider(child, of_clk_src_simple_get, rtc_clk);
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if (!of_node_cmp(child->name, "smp-twd-clock"))
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of_clk_add_provider(child, of_clk_src_simple_get, twd_clk);
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}
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}
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