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drm/i915: Add horizontal mirroring support for CHV pipe B planes 

The primary and sprite planes on CHV pipe B support horizontal
mirroring. Expose it to the world.

Sadly the hardware ignores the mirror bit when the rotate bit is
set, so we'll have to reject the 180+X case.

v2: Drop the BIT()
v3: Pass dev_priv instead of dev to IS_CHERRYVIEW()

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1479142440-25283-4-git-send-email-ville.syrjala@linux.intel.com
This commit is contained in:
Ville Syrjälä 2016-11-14 18:54:00 +02:00
parent df0cd455e7
commit 4ea7be2b56
3 changed files with 27 additions and 0 deletions
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9
drivers/gpu/drm/i915/intel_atomic_plane.c
View File

@ -106,6 +106,7 @@ intel_plane_destroy_state(struct drm_plane *plane,
static int intel_plane_atomic_check(struct drm_plane *plane,
struct drm_plane_state *state)
{
struct drm_i915_private *dev_priv = to_i915(plane->dev);
struct drm_crtc *crtc = state->crtc;
struct intel_crtc *intel_crtc;
struct intel_crtc_state *crtc_state;
@ -167,6 +168,14 @@ static int intel_plane_atomic_check(struct drm_plane *plane,
}
}
/* CHV ignores the mirror bit when the rotate bit is set :( */
if (IS_CHERRYVIEW(dev_priv) &&
state->rotation & DRM_ROTATE_180 &&
state->rotation & DRM_REFLECT_X) {
DRM_DEBUG_KMS("Cannot rotate and reflect at the same time\n");
return -EINVAL;
}
intel_state->base.visible = false;
ret = intel_plane->check_plane(plane, crtc_state, intel_state);
if (ret)

9
drivers/gpu/drm/i915/intel_display.c
View File

@ -3078,6 +3078,9 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
if (rotation & DRM_ROTATE_180)
dspcntr |= DISPPLANE_ROTATE_180;
if (rotation & DRM_REFLECT_X)
dspcntr |= DISPPLANE_MIRROR;
if (IS_G4X(dev_priv))
dspcntr |= DISPPLANE_TRICKLE_FEED_DISABLE;
@ -3090,6 +3093,8 @@ static void i9xx_update_primary_plane(struct drm_plane *primary,
if (rotation & DRM_ROTATE_180) {
x += crtc_state->pipe_src_w - 1;
y += crtc_state->pipe_src_h - 1;
} else if (rotation & DRM_REFLECT_X) {
x += crtc_state->pipe_src_w - 1;
}
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
@ -15065,6 +15070,10 @@ intel_primary_plane_create(struct drm_i915_private *dev_priv, enum pipe pipe)
supported_rotations =
DRM_ROTATE_0 | DRM_ROTATE_90 |
DRM_ROTATE_180 | DRM_ROTATE_270;
} else if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
supported_rotations =
DRM_ROTATE_0 | DRM_ROTATE_180 |
DRM_REFLECT_X;
} else if (INTEL_GEN(dev_priv) >= 4) {
supported_rotations =
DRM_ROTATE_0 | DRM_ROTATE_180;

9
drivers/gpu/drm/i915/intel_sprite.c
View File

@ -430,6 +430,9 @@ vlv_update_plane(struct drm_plane *dplane,
if (rotation & DRM_ROTATE_180)
sprctl |= SP_ROTATE_180;
if (rotation & DRM_REFLECT_X)
sprctl |= SP_MIRROR;
/* Sizes are 0 based */
src_w--;
src_h--;
@ -442,6 +445,8 @@ vlv_update_plane(struct drm_plane *dplane,
if (rotation & DRM_ROTATE_180) {
x += src_w;
y += src_h;
} else if (rotation & DRM_REFLECT_X) {
x += src_w;
}
linear_offset = intel_fb_xy_to_linear(x, y, plane_state, 0);
@ -1121,6 +1126,10 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv,
supported_rotations =
DRM_ROTATE_0 | DRM_ROTATE_90 |
DRM_ROTATE_180 | DRM_ROTATE_270;
} else if (IS_CHERRYVIEW(dev_priv) && pipe == PIPE_B) {
supported_rotations =
DRM_ROTATE_0 | DRM_ROTATE_180 |
DRM_REFLECT_X;
} else {
supported_rotations =
DRM_ROTATE_0 | DRM_ROTATE_180;