mirror of https://gitee.com/openkylin/linux.git
sparc64: Add a comment about why we only use certain memory barriers these days.
Based upon feedback from Mathieu Desnoyers. Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -63,6 +63,10 @@ do { __asm__ __volatile__("ba,pt %%xcc, 1f\n\t" \
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: : : "memory"); \
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} while (0)
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/* The kernel always executes in TSO memory model these days,
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* and furthermore most sparc64 chips implement more stringent
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* memory ordering than required by the specifications.
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*/
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#define mb() membar_safe("#StoreLoad")
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#define rmb() __asm__ __volatile__("":::"memory")
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#define wmb() __asm__ __volatile__("":::"memory")
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