mirror of https://gitee.com/openkylin/linux.git
[ARM] 5581/1: U300 clock updates
This adds a few default locks to the clocks (the clocks were used before the locks were initialized by code), then renames the clocks a bit to fit with the latest driver names (some changed during review). Lastly it moves the initialization of the clock debugfs entry to module_init() initcall level since the debugfs isn't up in core_initcall(). Signed-off-by: Linus Walleij <linus.walleij@stericsson.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Linus Walleij
Russell King
parent
9be4b17c4c
commit
4ebfc3dba5
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@ -24,6 +24,7 @@
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#include <linux/init.h>
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#include <linux/timer.h>
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#include <linux/io.h>
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#include <linux/seq_file.h>
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#include <asm/clkdev.h>
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#include <mach/hardware.h>
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@ -702,6 +703,7 @@ static struct clk amba_clk = {
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.rate = 52000000, /* this varies! */
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.hw_ctrld = true,
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.reset = false,
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.lock = __SPIN_LOCK_UNLOCKED(amba_clk.lock),
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};
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/*
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@ -720,6 +722,7 @@ static struct clk cpu_clk = {
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.set_rate = clk_set_rate_cpuclk,
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.get_rate = clk_get_rate_cpuclk,
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.round_rate = clk_round_rate_cpuclk,
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.lock = __SPIN_LOCK_UNLOCKED(cpu_clk.lock),
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};
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static struct clk nandif_clk = {
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@ -732,6 +735,7 @@ static struct clk nandif_clk = {
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.clk_val = U300_SYSCON_SBCER_NANDIF_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(nandif_clk.lock),
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};
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static struct clk semi_clk = {
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@ -744,6 +748,7 @@ static struct clk semi_clk = {
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.clk_val = U300_SYSCON_SBCER_SEMI_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(semi_clk.lock),
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};
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#ifdef CONFIG_MACH_U300_BS335
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@ -758,6 +763,7 @@ static struct clk isp_clk = {
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.clk_val = U300_SYSCON_SBCER_ISP_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(isp_clk.lock),
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};
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static struct clk cds_clk = {
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@ -771,6 +777,7 @@ static struct clk cds_clk = {
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.clk_val = U300_SYSCON_SBCER_CDS_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(cds_clk.lock),
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};
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#endif
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@ -785,6 +792,7 @@ static struct clk dma_clk = {
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.clk_val = U300_SYSCON_SBCER_DMAC_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(dma_clk.lock),
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};
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static struct clk aaif_clk = {
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@ -798,6 +806,7 @@ static struct clk aaif_clk = {
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.clk_val = U300_SYSCON_SBCER_AAIF_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(aaif_clk.lock),
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};
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static struct clk apex_clk = {
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@ -811,6 +820,7 @@ static struct clk apex_clk = {
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.clk_val = U300_SYSCON_SBCER_APEX_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(apex_clk.lock),
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};
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static struct clk video_enc_clk = {
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@ -825,6 +835,7 @@ static struct clk video_enc_clk = {
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.clk_val = U300_SYSCON_SBCER_VIDEO_ENC_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(video_enc_clk.lock),
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};
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static struct clk xgam_clk = {
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@ -839,6 +850,7 @@ static struct clk xgam_clk = {
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.get_rate = clk_get_rate_xgamclk,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(xgam_clk.lock),
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};
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/* This clock is used to activate the video encoder */
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@ -854,6 +866,7 @@ static struct clk ahb_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_ahb_clk,
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.lock = __SPIN_LOCK_UNLOCKED(ahb_clk.lock),
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};
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@ -871,6 +884,7 @@ static struct clk ahb_subsys_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_ahb_clk,
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.lock = __SPIN_LOCK_UNLOCKED(ahb_subsys_clk.lock),
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};
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static struct clk intcon_clk = {
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@ -882,6 +896,8 @@ static struct clk intcon_clk = {
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.res_reg = U300_SYSCON_VBASE + U300_SYSCON_RRR,
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.res_mask = U300_SYSCON_RRR_INTCON_RESET_EN,
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/* INTCON can be reset but not clock-gated */
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.lock = __SPIN_LOCK_UNLOCKED(intcon_clk.lock),
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};
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static struct clk mspro_clk = {
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@ -895,6 +911,7 @@ static struct clk mspro_clk = {
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.clk_val = U300_SYSCON_SBCER_MSPRO_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(mspro_clk.lock),
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};
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static struct clk emif_clk = {
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@ -909,6 +926,7 @@ static struct clk emif_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_emif_clk,
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.lock = __SPIN_LOCK_UNLOCKED(emif_clk.lock),
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};
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@ -926,6 +944,7 @@ static struct clk fast_clk = {
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.clk_val = U300_SYSCON_SBCER_FAST_BRIDGE_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(fast_clk.lock),
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};
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static struct clk mmcsd_clk = {
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@ -942,6 +961,7 @@ static struct clk mmcsd_clk = {
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.round_rate = clk_round_rate_mclk,
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.disable = syscon_clk_disable,
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.enable = syscon_clk_enable,
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.lock = __SPIN_LOCK_UNLOCKED(mmcsd_clk.lock),
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};
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static struct clk i2s0_clk = {
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@ -956,6 +976,7 @@ static struct clk i2s0_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_i2s_i2c_spi,
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.lock = __SPIN_LOCK_UNLOCKED(i2s0_clk.lock),
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};
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static struct clk i2s1_clk = {
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@ -970,6 +991,7 @@ static struct clk i2s1_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_i2s_i2c_spi,
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.lock = __SPIN_LOCK_UNLOCKED(i2s1_clk.lock),
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};
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static struct clk i2c0_clk = {
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@ -984,6 +1006,7 @@ static struct clk i2c0_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_i2s_i2c_spi,
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.lock = __SPIN_LOCK_UNLOCKED(i2c0_clk.lock),
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};
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static struct clk i2c1_clk = {
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@ -998,6 +1021,7 @@ static struct clk i2c1_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_i2s_i2c_spi,
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.lock = __SPIN_LOCK_UNLOCKED(i2c1_clk.lock),
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};
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static struct clk spi_clk = {
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@ -1012,6 +1036,7 @@ static struct clk spi_clk = {
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.get_rate = clk_get_rate_i2s_i2c_spi,
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.lock = __SPIN_LOCK_UNLOCKED(spi_clk.lock),
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};
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#ifdef CONFIG_MACH_U300_BS335
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@ -1026,6 +1051,7 @@ static struct clk uart1_clk = {
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.clk_val = U300_SYSCON_SBCER_UART1_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(uart1_clk.lock),
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};
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#endif
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@ -1044,6 +1070,7 @@ static struct clk slow_clk = {
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.clk_val = U300_SYSCON_SBCER_SLOW_BRIDGE_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(slow_clk.lock),
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};
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/* TODO: implement SYSCON clock? */
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@ -1055,6 +1082,7 @@ static struct clk wdog_clk = {
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.rate = 32768,
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.reset = false,
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/* This is always on, cannot be enabled/disabled or reset */
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.lock = __SPIN_LOCK_UNLOCKED(wdog_clk.lock),
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};
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/* This one is hardwired to PLL13 */
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@ -1069,6 +1097,7 @@ static struct clk uart_clk = {
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.clk_val = U300_SYSCON_SBCER_UART_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(uart_clk.lock),
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};
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static struct clk keypad_clk = {
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@ -1082,6 +1111,7 @@ static struct clk keypad_clk = {
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.clk_val = U300_SYSCON_SBCER_KEYPAD_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(keypad_clk.lock),
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};
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static struct clk gpio_clk = {
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@ -1095,6 +1125,7 @@ static struct clk gpio_clk = {
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.clk_val = U300_SYSCON_SBCER_GPIO_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(gpio_clk.lock),
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};
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static struct clk rtc_clk = {
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@ -1106,6 +1137,7 @@ static struct clk rtc_clk = {
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.res_reg = U300_SYSCON_VBASE + U300_SYSCON_RSR,
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.res_mask = U300_SYSCON_RSR_RTC_RESET_EN,
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/* This clock is always on, cannot be enabled/disabled */
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.lock = __SPIN_LOCK_UNLOCKED(rtc_clk.lock),
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};
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static struct clk bustr_clk = {
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@ -1119,6 +1151,7 @@ static struct clk bustr_clk = {
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.clk_val = U300_SYSCON_SBCER_BTR_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(bustr_clk.lock),
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};
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static struct clk evhist_clk = {
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@ -1132,6 +1165,7 @@ static struct clk evhist_clk = {
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.clk_val = U300_SYSCON_SBCER_EH_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(evhist_clk.lock),
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};
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static struct clk timer_clk = {
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@ -1145,6 +1179,7 @@ static struct clk timer_clk = {
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.clk_val = U300_SYSCON_SBCER_ACC_TMR_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(timer_clk.lock),
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};
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static struct clk app_timer_clk = {
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@ -1158,6 +1193,7 @@ static struct clk app_timer_clk = {
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.clk_val = U300_SYSCON_SBCER_APP_TMR_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(app_timer_clk.lock),
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};
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#ifdef CONFIG_MACH_U300_BS335
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@ -1172,6 +1208,7 @@ static struct clk ppm_clk = {
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.clk_val = U300_SYSCON_SBCER_PPM_CLK_EN,
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.enable = syscon_clk_enable,
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.disable = syscon_clk_disable,
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.lock = __SPIN_LOCK_UNLOCKED(ppm_clk.lock),
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};
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#endif
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@ -1187,53 +1224,53 @@ static struct clk ppm_clk = {
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*/
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static struct clk_lookup lookups[] = {
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/* Connected directly to the AMBA bus */
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DEF_LOOKUP("amba", &amba_clk),
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DEF_LOOKUP("cpu", &cpu_clk),
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DEF_LOOKUP("nandif", &nandif_clk),
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DEF_LOOKUP("semi", &semi_clk),
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DEF_LOOKUP("amba", &amba_clk),
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DEF_LOOKUP("cpu", &cpu_clk),
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DEF_LOOKUP("fsmc", &nandif_clk),
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DEF_LOOKUP("semi", &semi_clk),
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#ifdef CONFIG_MACH_U300_BS335
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DEF_LOOKUP("isp", &isp_clk),
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DEF_LOOKUP("cds", &cds_clk),
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DEF_LOOKUP("isp", &isp_clk),
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DEF_LOOKUP("cds", &cds_clk),
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#endif
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DEF_LOOKUP("dma", &dma_clk),
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DEF_LOOKUP("aaif", &aaif_clk),
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DEF_LOOKUP("apex", &apex_clk),
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DEF_LOOKUP("dma", &dma_clk),
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DEF_LOOKUP("msl", &aaif_clk),
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DEF_LOOKUP("apex", &apex_clk),
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DEF_LOOKUP("video_enc", &video_enc_clk),
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DEF_LOOKUP("xgam", &xgam_clk),
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DEF_LOOKUP("ahb", &ahb_clk),
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DEF_LOOKUP("xgam", &xgam_clk),
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DEF_LOOKUP("ahb", &ahb_clk),
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/* AHB bridge clocks */
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DEF_LOOKUP("ahb", &ahb_subsys_clk),
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DEF_LOOKUP("intcon", &intcon_clk),
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DEF_LOOKUP("mspro", &mspro_clk),
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DEF_LOOKUP("pl172", &emif_clk),
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DEF_LOOKUP("ahb_subsys", &ahb_subsys_clk),
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DEF_LOOKUP("intcon", &intcon_clk),
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DEF_LOOKUP("mspro", &mspro_clk),
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DEF_LOOKUP("pl172", &emif_clk),
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/* FAST bridge clocks */
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DEF_LOOKUP("fast", &fast_clk),
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DEF_LOOKUP("mmci", &mmcsd_clk),
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DEF_LOOKUP("fast", &fast_clk),
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DEF_LOOKUP("mmci", &mmcsd_clk),
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/*
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* The .0 and .1 identifiers on these comes from the platform device
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* .id field and are assigned when the platform devices are registered.
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*/
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DEF_LOOKUP("i2s.0", &i2s0_clk),
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DEF_LOOKUP("i2s.1", &i2s1_clk),
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DEF_LOOKUP("stddci2c.0", &i2c0_clk),
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DEF_LOOKUP("stddci2c.1", &i2c1_clk),
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DEF_LOOKUP("pl022", &spi_clk),
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DEF_LOOKUP("i2s.0", &i2s0_clk),
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DEF_LOOKUP("i2s.1", &i2s1_clk),
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DEF_LOOKUP("stu300.0", &i2c0_clk),
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DEF_LOOKUP("stu300.1", &i2c1_clk),
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DEF_LOOKUP("pl022", &spi_clk),
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#ifdef CONFIG_MACH_U300_BS335
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DEF_LOOKUP("uart1", &uart1_clk),
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DEF_LOOKUP("uart1", &uart1_clk),
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#endif
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/* SLOW bridge clocks */
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DEF_LOOKUP("slow", &slow_clk),
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DEF_LOOKUP("wdog", &wdog_clk),
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DEF_LOOKUP("uart0", &uart_clk),
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DEF_LOOKUP("apptimer", &app_timer_clk),
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DEF_LOOKUP("keypad", &keypad_clk),
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DEF_LOOKUP("slow", &slow_clk),
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DEF_LOOKUP("coh901327_wdog", &wdog_clk),
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DEF_LOOKUP("uart0", &uart_clk),
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DEF_LOOKUP("apptimer", &app_timer_clk),
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DEF_LOOKUP("coh901461-keypad", &keypad_clk),
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DEF_LOOKUP("u300-gpio", &gpio_clk),
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DEF_LOOKUP("rtc0", &rtc_clk),
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DEF_LOOKUP("bustr", &bustr_clk),
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DEF_LOOKUP("evhist", &evhist_clk),
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DEF_LOOKUP("timer", &timer_clk),
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DEF_LOOKUP("rtc-coh901331", &rtc_clk),
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DEF_LOOKUP("bustr", &bustr_clk),
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DEF_LOOKUP("evhist", &evhist_clk),
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DEF_LOOKUP("timer", &timer_clk),
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#ifdef CONFIG_MACH_U300_BS335
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DEF_LOOKUP("ppm", &ppm_clk),
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DEF_LOOKUP("ppm", &ppm_clk),
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#endif
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};
|
||||
|
||||
|
|
@ -1427,16 +1464,20 @@ static const struct file_operations u300_clocks_operations = {
|
|||
.release = single_release,
|
||||
};
|
||||
|
||||
static void init_clk_read_procfs(void)
|
||||
static int __init init_clk_read_debugfs(void)
|
||||
{
|
||||
/* Expose a simple debugfs interface to view all clocks */
|
||||
(void) debugfs_create_file("u300_clocks", S_IFREG | S_IRUGO,
|
||||
NULL, NULL, &u300_clocks_operations);
|
||||
}
|
||||
#else
|
||||
static inline void init_clk_read_procfs(void)
|
||||
{
|
||||
NULL, NULL,
|
||||
&u300_clocks_operations);
|
||||
return 0;
|
||||
}
|
||||
/*
|
||||
* This needs to come in after the core_initcall() for the
|
||||
* overall clocks, because debugfs is not available until
|
||||
* the subsystems come up.
|
||||
*/
|
||||
module_init(init_clk_read_debugfs);
|
||||
#endif
|
||||
|
||||
static int __init u300_clock_init(void)
|
||||
|
|
@ -1462,8 +1503,6 @@ static int __init u300_clock_init(void)
|
|||
|
||||
clk_register();
|
||||
|
||||
init_clk_read_procfs();
|
||||
|
||||
/*
|
||||
* Some of these may be on when we boot the system so make sure they
|
||||
* are turned OFF.
|
||||
|
|
|
|||
Loading…
Reference in New Issue