mirror of https://gitee.com/openkylin/linux.git
i40e: trivial fixes
1) remove duplicate include of tcp.h 2) put an ampersand at the end of a line instead of the beginning 3) remove a useless dev_info 4) match declaration of function to the implementation 5) repair incorrect comment 6) correct whitespace 7) remove unused define Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
parent
1e590660cb
commit
4eeb1fff27
|
@ -42,7 +42,6 @@
|
||||||
#include <linux/string.h>
|
#include <linux/string.h>
|
||||||
#include <linux/in.h>
|
#include <linux/in.h>
|
||||||
#include <linux/ip.h>
|
#include <linux/ip.h>
|
||||||
#include <linux/tcp.h>
|
|
||||||
#include <linux/sctp.h>
|
#include <linux/sctp.h>
|
||||||
#include <linux/pkt_sched.h>
|
#include <linux/pkt_sched.h>
|
||||||
#include <linux/ipv6.h>
|
#include <linux/ipv6.h>
|
||||||
|
@ -608,8 +607,8 @@ static inline char *i40e_nvm_version_str(struct i40e_hw *hw)
|
||||||
|
|
||||||
full_ver = hw->nvm.oem_ver;
|
full_ver = hw->nvm.oem_ver;
|
||||||
ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
|
ver = (u8)(full_ver >> I40E_OEM_VER_SHIFT);
|
||||||
build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT)
|
build = (u16)((full_ver >> I40E_OEM_VER_BUILD_SHIFT) &
|
||||||
& I40E_OEM_VER_BUILD_MASK);
|
I40E_OEM_VER_BUILD_MASK);
|
||||||
patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
|
patch = (u8)(full_ver & I40E_OEM_VER_PATCH_MASK);
|
||||||
|
|
||||||
snprintf(buf, sizeof(buf),
|
snprintf(buf, sizeof(buf),
|
||||||
|
@ -717,7 +716,7 @@ struct i40e_veb *i40e_veb_setup(struct i40e_pf *pf, u16 flags, u16 uplink_seid,
|
||||||
void i40e_veb_release(struct i40e_veb *veb);
|
void i40e_veb_release(struct i40e_veb *veb);
|
||||||
|
|
||||||
int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
|
int i40e_veb_config_tc(struct i40e_veb *veb, u8 enabled_tc);
|
||||||
i40e_status i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
|
int i40e_vsi_add_pvid(struct i40e_vsi *vsi, u16 vid);
|
||||||
void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
|
void i40e_vsi_remove_pvid(struct i40e_vsi *vsi);
|
||||||
void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
|
void i40e_vsi_reset_stats(struct i40e_vsi *vsi);
|
||||||
void i40e_pf_reset_stats(struct i40e_pf *pf);
|
void i40e_pf_reset_stats(struct i40e_pf *pf);
|
||||||
|
|
|
@ -328,7 +328,7 @@ static int i40e_add_del_fdir_tcpv4(struct i40e_vsi *vsi,
|
||||||
* @fd_data: the flow director data required for the FDir descriptor
|
* @fd_data: the flow director data required for the FDir descriptor
|
||||||
* @add: true adds a filter, false removes it
|
* @add: true adds a filter, false removes it
|
||||||
*
|
*
|
||||||
* Always returns -EOPNOTSUPP
|
* Returns 0 if the filters were successfully added or removed
|
||||||
**/
|
**/
|
||||||
static int i40e_add_del_fdir_sctpv4(struct i40e_vsi *vsi,
|
static int i40e_add_del_fdir_sctpv4(struct i40e_vsi *vsi,
|
||||||
struct i40e_fdir_filter *fd_data,
|
struct i40e_fdir_filter *fd_data,
|
||||||
|
@ -515,9 +515,6 @@ static void i40e_fd_handle_status(struct i40e_ring *rx_ring,
|
||||||
pf->auto_disable_flags |=
|
pf->auto_disable_flags |=
|
||||||
I40E_FLAG_FD_SB_ENABLED;
|
I40E_FLAG_FD_SB_ENABLED;
|
||||||
}
|
}
|
||||||
} else {
|
|
||||||
dev_info(&pdev->dev,
|
|
||||||
"FD filter programming failed due to incorrect filter parameters\n");
|
|
||||||
}
|
}
|
||||||
} else if (error == BIT(I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) {
|
} else if (error == BIT(I40E_RX_PROG_STATUS_DESC_NO_FD_ENTRY_SHIFT)) {
|
||||||
if (I40E_DEBUG_FD & pf->hw.debug_mask)
|
if (I40E_DEBUG_FD & pf->hw.debug_mask)
|
||||||
|
@ -1872,7 +1869,6 @@ static inline void i40e_update_enable_itr(struct i40e_vsi *vsi,
|
||||||
q_vector->itr_countdown--;
|
q_vector->itr_countdown--;
|
||||||
else
|
else
|
||||||
q_vector->itr_countdown = ITR_COUNTDOWN_START;
|
q_vector->itr_countdown = ITR_COUNTDOWN_START;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
|
@ -411,7 +411,7 @@ static bool i40e_set_new_dynamic_itr(struct i40e_ring_container *rc)
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/**
|
||||||
* i40evf_setup_tx_descriptors - Allocate the Tx descriptors
|
* i40evf_setup_tx_descriptors - Allocate the Tx descriptors
|
||||||
* @tx_ring: the tx ring to set up
|
* @tx_ring: the tx ring to set up
|
||||||
*
|
*
|
||||||
|
@ -1259,10 +1259,12 @@ static inline void i40e_update_enable_itr(struct i40e_vsi *vsi,
|
||||||
rx = i40e_set_new_dynamic_itr(&q_vector->rx);
|
rx = i40e_set_new_dynamic_itr(&q_vector->rx);
|
||||||
rxval = i40e_buildreg_itr(I40E_RX_ITR, q_vector->rx.itr);
|
rxval = i40e_buildreg_itr(I40E_RX_ITR, q_vector->rx.itr);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (ITR_IS_DYNAMIC(vsi->tx_itr_setting)) {
|
if (ITR_IS_DYNAMIC(vsi->tx_itr_setting)) {
|
||||||
tx = i40e_set_new_dynamic_itr(&q_vector->tx);
|
tx = i40e_set_new_dynamic_itr(&q_vector->tx);
|
||||||
txval = i40e_buildreg_itr(I40E_TX_ITR, q_vector->tx.itr);
|
txval = i40e_buildreg_itr(I40E_TX_ITR, q_vector->tx.itr);
|
||||||
}
|
}
|
||||||
|
|
||||||
if (rx || tx) {
|
if (rx || tx) {
|
||||||
/* get the higher of the two ITR adjustments and
|
/* get the higher of the two ITR adjustments and
|
||||||
* use the same value for both ITR registers
|
* use the same value for both ITR registers
|
||||||
|
@ -1298,7 +1300,6 @@ static inline void i40e_update_enable_itr(struct i40e_vsi *vsi,
|
||||||
q_vector->itr_countdown--;
|
q_vector->itr_countdown--;
|
||||||
else
|
else
|
||||||
q_vector->itr_countdown = ITR_COUNTDOWN_START;
|
q_vector->itr_countdown = ITR_COUNTDOWN_START;
|
||||||
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
@ -1552,7 +1553,6 @@ static void i40e_tx_enable_csum(struct sk_buff *skb, u32 *tx_flags,
|
||||||
*tx_flags |= I40E_TX_FLAGS_IPV6;
|
*tx_flags |= I40E_TX_FLAGS_IPV6;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
if ((tx_ring->flags & I40E_TXR_FLAGS_OUTER_UDP_CSUM) &&
|
if ((tx_ring->flags & I40E_TXR_FLAGS_OUTER_UDP_CSUM) &&
|
||||||
(l4_tunnel == I40E_TXD_CTX_UDP_TUNNELING) &&
|
(l4_tunnel == I40E_TXD_CTX_UDP_TUNNELING) &&
|
||||||
(*cd_tunneling & I40E_TXD_CTX_QW0_EXT_IP_MASK)) {
|
(*cd_tunneling & I40E_TXD_CTX_QW0_EXT_IP_MASK)) {
|
||||||
|
@ -1651,7 +1651,7 @@ static void i40e_create_tx_ctx(struct i40e_ring *tx_ring,
|
||||||
context_desc->type_cmd_tso_mss = cpu_to_le64(cd_type_cmd_tso_mss);
|
context_desc->type_cmd_tso_mss = cpu_to_le64(cd_type_cmd_tso_mss);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* i40e_chk_linearize - Check if there are more than 8 fragments per packet
|
* i40e_chk_linearize - Check if there are more than 8 fragments per packet
|
||||||
* @skb: send buffer
|
* @skb: send buffer
|
||||||
* @tx_flags: collected send information
|
* @tx_flags: collected send information
|
||||||
|
@ -1847,7 +1847,6 @@ static inline void i40evf_tx_map(struct i40e_ring *tx_ring, struct sk_buff *skb,
|
||||||
tx_bi = &tx_ring->tx_bi[i];
|
tx_bi = &tx_ring->tx_bi[i];
|
||||||
}
|
}
|
||||||
|
|
||||||
#define WB_STRIDE 0x3
|
|
||||||
/* set next_to_watch value indicating a packet is present */
|
/* set next_to_watch value indicating a packet is present */
|
||||||
first->next_to_watch = tx_desc;
|
first->next_to_watch = tx_desc;
|
||||||
|
|
||||||
|
@ -1874,12 +1873,6 @@ static inline void i40evf_tx_map(struct i40e_ring *tx_ring, struct sk_buff *skb,
|
||||||
* update tail and set RS bit on every packet.
|
* update tail and set RS bit on every packet.
|
||||||
* if xmit_more is false and last_xmit_more was true
|
* if xmit_more is false and last_xmit_more was true
|
||||||
* update tail and set RS bit.
|
* update tail and set RS bit.
|
||||||
* else (kernel < 3.18)
|
|
||||||
* if every packet spanned less than 4 desc
|
|
||||||
* then set RS bit on 4th packet and update tail
|
|
||||||
* on every packet
|
|
||||||
* else
|
|
||||||
* set RS bit on EOP for every packet and update tail
|
|
||||||
*
|
*
|
||||||
* Optimization: wmb to be issued only in case of tail update.
|
* Optimization: wmb to be issued only in case of tail update.
|
||||||
* Also optimize the Descriptor WB path for RS bit with the same
|
* Also optimize the Descriptor WB path for RS bit with the same
|
||||||
|
|
Loading…
Reference in New Issue