mirror of https://gitee.com/openkylin/linux.git
More DT modifications for AT91. Now that I am sure that
the drivers modification are picked-up by MTD. Changes the use ECC to hardware ECC (named PMECC) for SoCs that are using it and their associated Evaluation Kits: - at91sam9x5-ek - at91sam9n12-ek -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQEcBAABAgAGBQJRG3bVAAoJEAf03oE53VmQ77IH/RAVjO0arNEg82jQjZ2/J0n6 qiuybxcd1SXgEdxMIauzSQ0rkt/7kgfw/Ezo5qILtmlFKKQnXInaqd0oB878z8HH uO18wn/mwIdy1avJeRl3AdTCVKoJnlZ3BrpoqdNvmy8NbL7irba9Vlbq8cCGam5J pZBiPDnoyiaa0Dd8qmgCmNaFIw7HuVpVicbTFVHIEsy1t3OPDyg/5qDFPFFIAbDz rlPRDiInMoqd0f8LxZrD+kawyfMc3PUFrylqOGnP4/aWv1QBMkvvxku4t0/SMGr9 6xY4jtNWFu38nwrO9NqLFGS5aKTN1A8uluUoBTrooudzRmsZxZxVH2cIFe+vwCY= =GE/y -----END PGP SIGNATURE----- Merge tag 'at91-dt-late' of git://github.com/at91linux/linux-at91 into next/dt From Nicolas Ferre: More DT modifications for AT91. Now that I am sure that the drivers modification are picked-up by MTD. Changes the use ECC to hardware ECC (named PMECC) for SoCs that are using it and their associated Evaluation Kits: - at91sam9x5-ek - at91sam9n12-ek * tag 'at91-dt-late' of git://github.com/at91linux/linux-at91: ARM: at91: at91sam9n12: add DT parameters to enable PMECC ARM: at91: at91sam9x5: add DT parameters to enable PMECC
This commit is contained in:
commit
4f0e429ccf
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@ -390,8 +390,9 @@ nand0: nand@40000000 {
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reg = < 0x40000000 0x10000000
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0xffffe000 0x00000600
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0xffffe600 0x00000200
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0x00100000 0x00100000
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0x00108000 0x00018000
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>;
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atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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pinctrl-names = "default";
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@ -71,7 +71,10 @@ pinctrl_board_mmc0: mmc0-board {
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nand0: nand@40000000 {
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nand-bus-width = <8>;
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nand-ecc-mode = "soft";
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nand-ecc-mode = "hw";
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atmel,has-pmecc;
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atmel,pmecc-cap = <2>;
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atmel,pmecc-sector-size = <512>;
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nand-on-flash-bbt;
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status = "okay";
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};
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@ -518,7 +518,11 @@ nand0: nand@40000000 {
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x40000000 0x10000000
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0xffffe000 0x600 /* PMECC Registers */
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0xffffe600 0x200 /* PMECC Error Location Registers */
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0x00108000 0x18000 /* PMECC looup table in ROM code */
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>;
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atmel,pmecc-lookup-table-offset = <0x0 0x8000>;
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atmel,nand-addr-offset = <21>;
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atmel,nand-cmd-offset = <22>;
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pinctrl-names = "default";
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@ -26,7 +26,10 @@ main_clock: clock@0 {
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ahb {
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nand0: nand@40000000 {
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nand-bus-width = <8>;
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nand-ecc-mode = "soft";
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nand-ecc-mode = "hw";
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atmel,has-pmecc; /* Enable PMECC */
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atmel,pmecc-cap = <2>;
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atmel,pmecc-sector-size = <512>;
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nand-on-flash-bbt;
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status = "okay";
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