mirror of https://gitee.com/openkylin/linux.git
ASoC: rt5677: clear interrupts by polarity flip
The rt5677 jack detection function has a requirement that the polarity of an interrupt be flipped after it fires in order to clear the interrupt. This patch implements an irq_chip with irq_domain directly instead of using regmap-irq, so that interrupt source line polarities can be flipped in the irq handler. The reason that this patch does not add this feature within regmap-irq is that future patches will add hotword detection support to this irq handler. Those patches will require adding additional logic that would not make sense to have in regmap-irq. Signed-off-by: Ben Zhang <benzh@chromium.org> Signed-off-by: Fletcher Woodruff <fletcherw@chromium.org> Signed-off-by: Mark Brown <broonie@kernel.org>
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16395ceee1
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4f7b018b55
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@ -23,6 +23,10 @@
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#include <linux/firmware.h>
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#include <linux/of_device.h>
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#include <linux/property.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/irqdomain.h>
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#include <linux/workqueue.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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@ -4620,7 +4624,6 @@ static void rt5677_gpio_config(struct rt5677_priv *rt5677, unsigned offset,
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static int rt5677_to_irq(struct gpio_chip *chip, unsigned offset)
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{
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struct rt5677_priv *rt5677 = gpiochip_get_data(chip);
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struct regmap_irq_chip_data *data = rt5677->irq_data;
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int irq;
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if ((rt5677->pdata.jd1_gpio == 1 && offset == RT5677_GPIO1) ||
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@ -4646,7 +4649,7 @@ static int rt5677_to_irq(struct gpio_chip *chip, unsigned offset)
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return -ENXIO;
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}
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return regmap_irq_get_virq(data, irq);
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return irq_create_mapping(rt5677->domain, irq);
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}
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static const struct gpio_chip rt5677_template_chip = {
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@ -5042,30 +5045,130 @@ static void rt5677_read_device_properties(struct rt5677_priv *rt5677,
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rt5677->pdata.jd3_gpio = val;
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}
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static struct regmap_irq rt5677_irqs[] = {
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struct rt5677_irq_desc {
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unsigned int enable_mask;
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unsigned int status_mask;
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unsigned int polarity_mask;
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};
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static const struct rt5677_irq_desc rt5677_irq_descs[] = {
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[RT5677_IRQ_JD1] = {
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.reg_offset = 0,
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.mask = RT5677_EN_IRQ_GPIO_JD1,
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.enable_mask = RT5677_EN_IRQ_GPIO_JD1,
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.status_mask = RT5677_STA_GPIO_JD1,
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.polarity_mask = RT5677_INV_GPIO_JD1,
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},
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[RT5677_IRQ_JD2] = {
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.reg_offset = 0,
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.mask = RT5677_EN_IRQ_GPIO_JD2,
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.enable_mask = RT5677_EN_IRQ_GPIO_JD2,
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.status_mask = RT5677_STA_GPIO_JD2,
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.polarity_mask = RT5677_INV_GPIO_JD2,
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},
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[RT5677_IRQ_JD3] = {
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.reg_offset = 0,
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.mask = RT5677_EN_IRQ_GPIO_JD3,
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.enable_mask = RT5677_EN_IRQ_GPIO_JD3,
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.status_mask = RT5677_STA_GPIO_JD3,
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.polarity_mask = RT5677_INV_GPIO_JD3,
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},
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};
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static struct regmap_irq_chip rt5677_irq_chip = {
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.name = RT5677_DRV_NAME,
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.irqs = rt5677_irqs,
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.num_irqs = ARRAY_SIZE(rt5677_irqs),
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static irqreturn_t rt5677_irq(int unused, void *data)
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{
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struct rt5677_priv *rt5677 = data;
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int ret = 0, i, reg_irq, virq;
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bool irq_fired = false;
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.num_regs = 1,
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.status_base = RT5677_IRQ_CTRL1,
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.mask_base = RT5677_IRQ_CTRL1,
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.mask_invert = 1,
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mutex_lock(&rt5677->irq_lock);
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/* Read interrupt status */
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ret = regmap_read(rt5677->regmap, RT5677_IRQ_CTRL1, ®_irq);
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if (ret) {
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dev_err(rt5677->dev, "failed reading IRQ status: %d\n", ret);
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goto exit;
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}
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for (i = 0; i < RT5677_IRQ_NUM; i++) {
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if (reg_irq & rt5677_irq_descs[i].status_mask) {
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irq_fired = true;
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virq = irq_find_mapping(rt5677->domain, i);
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if (virq)
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handle_nested_irq(virq);
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/* Clear the interrupt by flipping the polarity of the
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* interrupt source line that fired
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*/
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reg_irq ^= rt5677_irq_descs[i].polarity_mask;
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}
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}
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if (!irq_fired)
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goto exit;
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ret = regmap_write(rt5677->regmap, RT5677_IRQ_CTRL1, reg_irq);
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if (ret) {
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dev_err(rt5677->dev, "failed updating IRQ status: %d\n", ret);
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goto exit;
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}
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exit:
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mutex_unlock(&rt5677->irq_lock);
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if (irq_fired)
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return IRQ_HANDLED;
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else
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return IRQ_NONE;
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}
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static void rt5677_irq_bus_lock(struct irq_data *data)
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{
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struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data);
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mutex_lock(&rt5677->irq_lock);
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}
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static void rt5677_irq_bus_sync_unlock(struct irq_data *data)
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{
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struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data);
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// Set the enable/disable bits for the jack detect IRQs.
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regmap_update_bits(rt5677->regmap, RT5677_IRQ_CTRL1,
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RT5677_EN_IRQ_GPIO_JD1 | RT5677_EN_IRQ_GPIO_JD2 |
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RT5677_EN_IRQ_GPIO_JD3, rt5677->irq_en);
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mutex_unlock(&rt5677->irq_lock);
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}
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static void rt5677_irq_enable(struct irq_data *data)
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{
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struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data);
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rt5677->irq_en |= rt5677_irq_descs[data->hwirq].enable_mask;
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}
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static void rt5677_irq_disable(struct irq_data *data)
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{
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struct rt5677_priv *rt5677 = irq_data_get_irq_chip_data(data);
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rt5677->irq_en &= ~rt5677_irq_descs[data->hwirq].enable_mask;
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}
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static struct irq_chip rt5677_irq_chip = {
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.name = "rt5677_irq_chip",
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.irq_bus_lock = rt5677_irq_bus_lock,
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.irq_bus_sync_unlock = rt5677_irq_bus_sync_unlock,
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.irq_disable = rt5677_irq_disable,
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.irq_enable = rt5677_irq_enable,
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};
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static int rt5677_irq_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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struct rt5677_priv *rt5677 = h->host_data;
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irq_set_chip_data(virq, rt5677);
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irq_set_chip(virq, &rt5677_irq_chip);
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irq_set_nested_thread(virq, 1);
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irq_set_noprobe(virq);
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return 0;
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}
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static const struct irq_domain_ops rt5677_domain_ops = {
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.map = rt5677_irq_map,
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.xlate = irq_domain_xlate_twocell,
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};
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static int rt5677_init_irq(struct i2c_client *i2c)
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@ -5084,6 +5187,8 @@ static int rt5677_init_irq(struct i2c_client *i2c)
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return -EINVAL;
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}
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mutex_init(&rt5677->irq_lock);
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/*
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* Select RC as the debounce clock so that GPIO works even when
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* MCLK is gated which happens when there is no audio stream
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@ -5092,7 +5197,6 @@ static int rt5677_init_irq(struct i2c_client *i2c)
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regmap_update_bits(rt5677->regmap, RT5677_DIG_MISC,
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RT5677_IRQ_DEBOUNCE_SEL_MASK,
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RT5677_IRQ_DEBOUNCE_SEL_RC);
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/* Enable auto power on RC when GPIO states are changed */
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regmap_update_bits(rt5677->regmap, RT5677_GEN_CTRL1, 0xff, 0xff);
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@ -5115,24 +5219,21 @@ static int rt5677_init_irq(struct i2c_client *i2c)
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regmap_update_bits(rt5677->regmap, RT5677_GPIO_CTRL1,
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RT5677_GPIO1_PIN_MASK, RT5677_GPIO1_PIN_IRQ);
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ret = regmap_add_irq_chip(rt5677->regmap, i2c->irq,
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IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 0,
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&rt5677_irq_chip, &rt5677->irq_data);
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if (ret != 0) {
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dev_err(&i2c->dev, "Failed to register IRQ chip: %d\n", ret);
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return ret;
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/* Ready to listen for interrupts */
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rt5677->domain = irq_domain_add_linear(i2c->dev.of_node,
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RT5677_IRQ_NUM, &rt5677_domain_ops, rt5677);
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if (!rt5677->domain) {
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dev_err(&i2c->dev, "Failed to create IRQ domain\n");
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return -ENOMEM;
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}
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return 0;
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}
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ret = devm_request_threaded_irq(&i2c->dev, i2c->irq, NULL, rt5677_irq,
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IRQF_TRIGGER_RISING | IRQF_ONESHOT,
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"rt5677", rt5677);
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if (ret)
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dev_err(&i2c->dev, "Failed to request IRQ: %d\n", ret);
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static void rt5677_free_irq(struct i2c_client *i2c)
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{
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struct rt5677_priv *rt5677 = i2c_get_clientdata(i2c);
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if (rt5677->irq_data)
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regmap_del_irq_chip(i2c->irq, rt5677->irq_data);
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return ret;
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}
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static int rt5677_i2c_probe(struct i2c_client *i2c)
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if (rt5677 == NULL)
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return -ENOMEM;
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rt5677->dev = &i2c->dev;
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i2c_set_clientdata(i2c, rt5677);
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if (i2c->dev.of_node) {
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RT5677_MICBIAS1_CTRL_VDD_3_3V);
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rt5677_init_gpio(i2c);
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rt5677_init_irq(i2c);
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ret = rt5677_init_irq(i2c);
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if (ret)
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dev_err(&i2c->dev, "Failed to initialize irq: %d\n", ret);
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return devm_snd_soc_register_component(&i2c->dev,
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&soc_component_dev_rt5677,
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static int rt5677_i2c_remove(struct i2c_client *i2c)
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{
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rt5677_free_irq(i2c);
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rt5677_free_gpio(i2c);
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return 0;
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@ -1749,6 +1749,7 @@ enum {
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RT5677_IRQ_JD1,
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RT5677_IRQ_JD2,
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RT5677_IRQ_JD3,
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RT5677_IRQ_NUM,
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};
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enum rt5677_type {
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@ -1827,6 +1828,7 @@ struct rt5677_platform_data {
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struct rt5677_priv {
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struct snd_soc_component *component;
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struct device *dev;
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struct rt5677_platform_data pdata;
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struct regmap *regmap, *regmap_physical;
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const struct firmware *fw1, *fw2;
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@ -1847,9 +1849,13 @@ struct rt5677_priv {
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struct gpio_chip gpio_chip;
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#endif
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bool dsp_vad_en;
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struct regmap_irq_chip_data *irq_data;
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bool is_dsp_mode;
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bool is_vref_slow;
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/* Interrupt handling */
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struct irq_domain *domain;
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struct mutex irq_lock;
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unsigned int irq_en;
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};
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int rt5677_sel_asrc_clk_src(struct snd_soc_component *component,
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