mirror of https://gitee.com/openkylin/linux.git
ALSA: ASoC: add codec driver for TI TAS5086
This patch adds a driver for TI's TA5086 6-channel PWM processor. This chip has a very unusual register layout, specifically because the registers are of unequal size, and multi-byte registers require bulk writes to take effect. Regmap does not support these kind of mappings. Currently, the driver does not touch any of the registers >= 0x20, so it doesn't matter, because the register map is mapped to an 8-bit array. In case more features will be added in the future that require access to higher registers, the entire regmap H/W I/O routines have to be open-coded. Signed-off-by: Daniel Mack <zonque@gmail.com> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Daniel Mack
Mark Brown
parent
6dbe51c251
commit
4fa89346fb
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@ -0,0 +1,32 @@
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Texas Instruments TAS5086 6-channel PWM Processor
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Required properties:
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- compatible: Should contain "ti,tas5086".
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- reg: The i2c address. Should contain <0x1b>.
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Optional properties:
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- reset-gpio: A GPIO spec to define which pin is connected to the
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chip's !RESET pin. If specified, the driver will
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assert a hardware reset at probe time.
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- ti,charge-period: This property should contain the time in microseconds
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that closely matches the external single-ended
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split-capacitor charge period. The hardware chip
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waits for this period of time before starting the
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PWM signals. This helps reduce pops and clicks.
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When not specified, the hardware default of 1300ms
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is retained.
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Examples:
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i2c_bus {
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tas5086@1b {
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compatible = "ti,tas5086";
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reg = <0x1b>;
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reset-gpio = <&gpio 23 0>;
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ti,charge-period = <156000>;
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};
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};
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@ -0,0 +1,7 @@
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#ifndef _SND_SOC_CODEC_TAS5086_H_
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#define _SND_SOC_CODEC_TAS5086_H_
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#define TAS5086_CLK_IDX_MCLK 0
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#define TAS5086_CLK_IDX_SCLK 1
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#endif /* _SND_SOC_CODEC_TAS5086_H_ */
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@ -63,6 +63,7 @@ config SND_SOC_ALL_CODECS
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select SND_SOC_STA32X if I2C
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select SND_SOC_STA529 if I2C
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select SND_SOC_STAC9766 if SND_SOC_AC97_BUS
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select SND_SOC_TAS5086 if I2C
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select SND_SOC_TLV320AIC23 if I2C
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select SND_SOC_TLV320AIC26 if SPI_MASTER
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select SND_SOC_TLV320AIC32X4 if I2C
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@ -320,6 +321,9 @@ config SND_SOC_STA529
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config SND_SOC_STAC9766
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tristate
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config SND_SOC_TAS5086
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tristate
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config SND_SOC_TLV320AIC23
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tristate
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@ -55,6 +55,7 @@ snd-soc-ssm2602-objs := ssm2602.o
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snd-soc-sta32x-objs := sta32x.o
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snd-soc-sta529-objs := sta529.o
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snd-soc-stac9766-objs := stac9766.o
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snd-soc-tas5086-objs := tas5086.o
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snd-soc-tlv320aic23-objs := tlv320aic23.o
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snd-soc-tlv320aic26-objs := tlv320aic26.o
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snd-soc-tlv320aic3x-objs := tlv320aic3x.o
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@ -177,6 +178,7 @@ obj-$(CONFIG_SND_SOC_SSM2602) += snd-soc-ssm2602.o
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obj-$(CONFIG_SND_SOC_STA32X) += snd-soc-sta32x.o
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obj-$(CONFIG_SND_SOC_STA529) += snd-soc-sta529.o
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obj-$(CONFIG_SND_SOC_STAC9766) += snd-soc-stac9766.o
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obj-$(CONFIG_SND_SOC_TAS5086) += snd-soc-tas5086.o
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obj-$(CONFIG_SND_SOC_TLV320AIC23) += snd-soc-tlv320aic23.o
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obj-$(CONFIG_SND_SOC_TLV320AIC26) += snd-soc-tlv320aic26.o
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obj-$(CONFIG_SND_SOC_TLV320AIC3X) += snd-soc-tlv320aic3x.o
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@ -0,0 +1,601 @@
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/*
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* TAS5086 ASoC codec driver
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*
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* Copyright (c) 2013 Daniel Mack <zonque@gmail.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* TODO:
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* - implement DAPM and input muxing
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* - implement modulation limit
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* - implement non-default PWM start
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*
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* Note that this chip has a very unusual register layout, specifically
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* because the registers are of unequal size, and multi-byte registers
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* require bulk writes to take effect. Regmap does not support that kind
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* of devices.
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*
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* Currently, the driver does not touch any of the registers >= 0x20, so
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* it doesn't matter because the entire map can be accessed as 8-bit
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* array. In case more features will be added in the future
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* that require access to higher registers, the entire regmap H/W I/O
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* routines have to be open-coded.
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*/
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/i2c.h>
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#include <linux/regmap.h>
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#include <linux/spi/spi.h>
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#include <linux/of_device.h>
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#include <linux/of_gpio.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include <sound/tas5086.h>
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#define TAS5086_PCM_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S20_3LE | \
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SNDRV_PCM_FMTBIT_S24_3LE)
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#define TAS5086_PCM_RATES (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | \
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SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_88200 | \
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SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 | \
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SNDRV_PCM_RATE_192000)
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/*
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* TAS5086 registers
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*/
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#define TAS5086_CLOCK_CONTROL 0x00 /* Clock control register */
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#define TAS5086_CLOCK_RATE(val) (val << 5)
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#define TAS5086_CLOCK_RATE_MASK (0x7 << 5)
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#define TAS5086_CLOCK_RATIO(val) (val << 2)
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#define TAS5086_CLOCK_RATIO_MASK (0x7 << 2)
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#define TAS5086_CLOCK_SCLK_RATIO_48 (1 << 1)
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#define TAS5086_CLOCK_VALID (1 << 0)
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#define TAS5086_DEEMPH_MASK 0x03
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#define TAS5086_SOFT_MUTE_ALL 0x3f
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#define TAS5086_DEV_ID 0x01 /* Device ID register */
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#define TAS5086_ERROR_STATUS 0x02 /* Error status register */
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#define TAS5086_SYS_CONTROL_1 0x03 /* System control register 1 */
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#define TAS5086_SERIAL_DATA_IF 0x04 /* Serial data interface register */
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#define TAS5086_SYS_CONTROL_2 0x05 /* System control register 2 */
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#define TAS5086_SOFT_MUTE 0x06 /* Soft mute register */
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#define TAS5086_MASTER_VOL 0x07 /* Master volume */
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#define TAS5086_CHANNEL_VOL(X) (0x08 + (X)) /* Channel 1-6 volume */
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#define TAS5086_VOLUME_CONTROL 0x09 /* Volume control register */
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#define TAS5086_MOD_LIMIT 0x10 /* Modulation limit register */
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#define TAS5086_PWM_START 0x18 /* PWM start register */
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#define TAS5086_SURROUND 0x19 /* Surround register */
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#define TAS5086_SPLIT_CAP_CHARGE 0x1a /* Split cap charge period register */
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#define TAS5086_OSC_TRIM 0x1b /* Oscillator trim register */
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#define TAS5086_BKNDERR 0x1c
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/*
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* Default TAS5086 power-up configuration
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*/
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static const struct reg_default tas5086_reg_defaults[] = {
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{ 0x00, 0x6c },
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{ 0x01, 0x03 },
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{ 0x02, 0x00 },
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{ 0x03, 0xa0 },
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{ 0x04, 0x05 },
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{ 0x05, 0x60 },
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{ 0x06, 0x00 },
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{ 0x07, 0xff },
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{ 0x08, 0x30 },
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{ 0x09, 0x30 },
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{ 0x0a, 0x30 },
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{ 0x0b, 0x30 },
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{ 0x0c, 0x30 },
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{ 0x0d, 0x30 },
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{ 0x0e, 0xb1 },
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{ 0x0f, 0x00 },
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{ 0x10, 0x02 },
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{ 0x11, 0x00 },
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{ 0x12, 0x00 },
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{ 0x13, 0x00 },
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{ 0x14, 0x00 },
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{ 0x15, 0x00 },
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{ 0x16, 0x00 },
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{ 0x17, 0x00 },
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{ 0x18, 0x3f },
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{ 0x19, 0x00 },
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{ 0x1a, 0x18 },
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{ 0x1b, 0x82 },
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{ 0x1c, 0x05 },
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};
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static bool tas5086_accessible_reg(struct device *dev, unsigned int reg)
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{
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return !((reg == 0x0f) || (reg >= 0x11 && reg <= 0x17));
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}
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static bool tas5086_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case TAS5086_DEV_ID:
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case TAS5086_ERROR_STATUS:
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return true;
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}
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return false;
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}
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static bool tas5086_writeable_reg(struct device *dev, unsigned int reg)
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{
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return tas5086_accessible_reg(dev, reg) && (reg != TAS5086_DEV_ID);
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}
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struct tas5086_private {
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struct regmap *regmap;
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unsigned int mclk, sclk;
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unsigned int format;
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bool deemph;
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/* Current sample rate for de-emphasis control */
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int rate;
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/* GPIO driving Reset pin, if any */
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int gpio_nreset;
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};
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static int tas5086_deemph[] = { 0, 32000, 44100, 48000 };
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static int tas5086_set_deemph(struct snd_soc_codec *codec)
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{
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struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
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int i, val = 0;
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if (priv->deemph)
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for (i = 0; i < ARRAY_SIZE(tas5086_deemph); i++)
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if (tas5086_deemph[i] == priv->rate)
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val = i;
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return regmap_update_bits(priv->regmap, TAS5086_SYS_CONTROL_1,
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TAS5086_DEEMPH_MASK, val);
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}
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static int tas5086_get_deemph(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
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ucontrol->value.enumerated.item[0] = priv->deemph;
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return 0;
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}
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static int tas5086_put_deemph(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct snd_soc_codec *codec = snd_kcontrol_chip(kcontrol);
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struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
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priv->deemph = ucontrol->value.enumerated.item[0];
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return tas5086_set_deemph(codec);
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}
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static int tas5086_set_dai_sysclk(struct snd_soc_dai *codec_dai,
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int clk_id, unsigned int freq, int dir)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
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switch (clk_id) {
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case TAS5086_CLK_IDX_MCLK:
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priv->mclk = freq;
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break;
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case TAS5086_CLK_IDX_SCLK:
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priv->sclk = freq;
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break;
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}
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return 0;
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}
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static int tas5086_set_dai_fmt(struct snd_soc_dai *codec_dai,
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unsigned int format)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
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struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
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/* The TAS5086 can only be slave to all clocks */
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if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS) {
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dev_err(codec->dev, "Invalid clocking mode\n");
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return -EINVAL;
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}
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/* we need to refer to the data format from hw_params() */
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priv->format = format;
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return 0;
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}
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static const int tas5086_sample_rates[] = {
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32000, 38000, 44100, 48000, 88200, 96000, 176400, 192000
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};
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static const int tas5086_ratios[] = {
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64, 128, 192, 256, 384, 512
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};
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static int index_in_array(const int *array, int len, int needle)
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{
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int i;
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for (i = 0; i < len; i++)
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if (array[i] == needle)
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return i;
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return -ENOENT;
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}
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static int tas5086_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
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unsigned int val;
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int ret;
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priv->rate = params_rate(params);
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/* Look up the sample rate and refer to the offset in the list */
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val = index_in_array(tas5086_sample_rates,
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ARRAY_SIZE(tas5086_sample_rates), priv->rate);
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if (val < 0) {
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dev_err(codec->dev, "Invalid sample rate\n");
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return -EINVAL;
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}
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ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
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TAS5086_CLOCK_RATE_MASK,
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TAS5086_CLOCK_RATE(val));
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if (ret < 0)
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return ret;
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/* MCLK / Fs ratio */
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val = index_in_array(tas5086_ratios, ARRAY_SIZE(tas5086_ratios),
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priv->mclk / priv->rate);
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if (val < 0) {
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dev_err(codec->dev, "Inavlid MCLK / Fs ratio\n");
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return -EINVAL;
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}
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ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
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TAS5086_CLOCK_RATIO_MASK,
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TAS5086_CLOCK_RATIO(val));
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if (ret < 0)
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return ret;
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ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
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TAS5086_CLOCK_SCLK_RATIO_48,
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(priv->sclk == 48 * priv->rate) ?
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TAS5086_CLOCK_SCLK_RATIO_48 : 0);
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if (ret < 0)
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return ret;
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/*
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* The chip has a very unituitive register mapping and muxes information
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* about data format and sample depth into the same register, but not on
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* a logical bit-boundary. Hence, we have to refer to the format passed
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* in the set_dai_fmt() callback and set up everything from here.
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*
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* First, determine the 'base' value, using the format ...
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*/
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switch (priv->format & SND_SOC_DAIFMT_FORMAT_MASK) {
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case SND_SOC_DAIFMT_RIGHT_J:
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val = 0x00;
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break;
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case SND_SOC_DAIFMT_I2S:
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val = 0x03;
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break;
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case SND_SOC_DAIFMT_LEFT_J:
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val = 0x06;
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break;
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default:
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dev_err(codec->dev, "Invalid DAI format\n");
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return -EINVAL;
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}
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/* ... then add the offset for the sample bit depth. */
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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val += 0;
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break;
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case SNDRV_PCM_FORMAT_S20_3LE:
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val += 1;
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break;
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case SNDRV_PCM_FORMAT_S24_3LE:
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val += 2;
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break;
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default:
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dev_err(codec->dev, "Invalid bit width\n");
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return -EINVAL;
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};
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ret = regmap_write(priv->regmap, TAS5086_SERIAL_DATA_IF, val);
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if (ret < 0)
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return ret;
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/* clock is considered valid now */
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ret = regmap_update_bits(priv->regmap, TAS5086_CLOCK_CONTROL,
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TAS5086_CLOCK_VALID, TAS5086_CLOCK_VALID);
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if (ret < 0)
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return ret;
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return tas5086_set_deemph(codec);
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}
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static int tas5086_mute_stream(struct snd_soc_dai *dai, int mute, int stream)
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{
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struct snd_soc_codec *codec = dai->codec;
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struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
|
||||
unsigned int val = 0;
|
||||
|
||||
if (mute)
|
||||
val = TAS5086_SOFT_MUTE_ALL;
|
||||
|
||||
return regmap_write(priv->regmap, TAS5086_SOFT_MUTE, val);
|
||||
}
|
||||
|
||||
/* TAS5086 controls */
|
||||
static const DECLARE_TLV_DB_SCALE(tas5086_dac_tlv, -10350, 50, 1);
|
||||
|
||||
static const struct snd_kcontrol_new tas5086_controls[] = {
|
||||
SOC_SINGLE_TLV("Master Playback Volume", TAS5086_MASTER_VOL,
|
||||
0, 0xff, 1, tas5086_dac_tlv),
|
||||
SOC_DOUBLE_R_TLV("Channel 1/2 Playback Volume",
|
||||
TAS5086_CHANNEL_VOL(0), TAS5086_CHANNEL_VOL(1),
|
||||
0, 0xff, 1, tas5086_dac_tlv),
|
||||
SOC_DOUBLE_R_TLV("Channel 3/4 Playback Volume",
|
||||
TAS5086_CHANNEL_VOL(2), TAS5086_CHANNEL_VOL(3),
|
||||
0, 0xff, 1, tas5086_dac_tlv),
|
||||
SOC_DOUBLE_R_TLV("Channel 5/6 Playback Volume",
|
||||
TAS5086_CHANNEL_VOL(4), TAS5086_CHANNEL_VOL(5),
|
||||
0, 0xff, 1, tas5086_dac_tlv),
|
||||
SOC_SINGLE_BOOL_EXT("De-emphasis Switch", 0,
|
||||
tas5086_get_deemph, tas5086_put_deemph),
|
||||
};
|
||||
|
||||
static const struct snd_soc_dai_ops tas5086_dai_ops = {
|
||||
.hw_params = tas5086_hw_params,
|
||||
.set_sysclk = tas5086_set_dai_sysclk,
|
||||
.set_fmt = tas5086_set_dai_fmt,
|
||||
.mute_stream = tas5086_mute_stream,
|
||||
};
|
||||
|
||||
static struct snd_soc_dai_driver tas5086_dai = {
|
||||
.name = "tas5086-hifi",
|
||||
.playback = {
|
||||
.stream_name = "Playback",
|
||||
.channels_min = 2,
|
||||
.channels_max = 6,
|
||||
.rates = TAS5086_PCM_RATES,
|
||||
.formats = TAS5086_PCM_FORMATS,
|
||||
},
|
||||
.ops = &tas5086_dai_ops,
|
||||
};
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int tas5086_soc_resume(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
/* Restore codec state */
|
||||
return regcache_sync(priv->regmap);
|
||||
}
|
||||
#else
|
||||
#define tas5086_soc_resume NULL
|
||||
#endif /* CONFIG_PM */
|
||||
|
||||
#ifdef CONFIG_OF
|
||||
static const struct of_device_id tas5086_dt_ids[] = {
|
||||
{ .compatible = "ti,tas5086", },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, tas5086_dt_ids);
|
||||
#endif
|
||||
|
||||
/* charge period values in microseconds */
|
||||
static const int tas5086_charge_period[] = {
|
||||
13000, 16900, 23400, 31200, 41600, 54600, 72800, 96200,
|
||||
130000, 156000, 234000, 312000, 416000, 546000, 728000, 962000,
|
||||
1300000, 169000, 2340000, 3120000, 4160000, 5460000, 7280000, 9620000,
|
||||
};
|
||||
|
||||
static int tas5086_probe(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
|
||||
int charge_period = 1300000; /* hardware default is 1300 ms */
|
||||
int i, ret;
|
||||
|
||||
if (of_match_device(of_match_ptr(tas5086_dt_ids), codec->dev)) {
|
||||
struct device_node *of_node = codec->dev->of_node;
|
||||
of_property_read_u32(of_node, "ti,charge-period", &charge_period);
|
||||
}
|
||||
|
||||
/* lookup and set split-capacitor charge period */
|
||||
if (charge_period == 0) {
|
||||
regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE, 0);
|
||||
} else {
|
||||
i = index_in_array(tas5086_charge_period,
|
||||
ARRAY_SIZE(tas5086_charge_period),
|
||||
charge_period);
|
||||
if (i >= 0)
|
||||
regmap_write(priv->regmap, TAS5086_SPLIT_CAP_CHARGE,
|
||||
i + 0x08);
|
||||
else
|
||||
dev_warn(codec->dev,
|
||||
"Invalid split-cap charge period of %d ns.\n",
|
||||
charge_period);
|
||||
}
|
||||
|
||||
/* enable factory trim */
|
||||
ret = regmap_write(priv->regmap, TAS5086_OSC_TRIM, 0x00);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* start all channels */
|
||||
ret = regmap_write(priv->regmap, TAS5086_SYS_CONTROL_2, 0x20);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* set master volume to 0 dB */
|
||||
ret = regmap_write(priv->regmap, TAS5086_MASTER_VOL, 0x30);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
/* mute all channels for now */
|
||||
ret = regmap_write(priv->regmap, TAS5086_SOFT_MUTE,
|
||||
TAS5086_SOFT_MUTE_ALL);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int tas5086_remove(struct snd_soc_codec *codec)
|
||||
{
|
||||
struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
|
||||
|
||||
if (gpio_is_valid(priv->gpio_nreset))
|
||||
/* Set codec to the reset state */
|
||||
gpio_set_value(priv->gpio_nreset, 0);
|
||||
|
||||
return 0;
|
||||
};
|
||||
|
||||
static struct snd_soc_codec_driver soc_codec_dev_tas5086 = {
|
||||
.probe = tas5086_probe,
|
||||
.remove = tas5086_remove,
|
||||
.resume = tas5086_soc_resume,
|
||||
.controls = tas5086_controls,
|
||||
.num_controls = ARRAY_SIZE(tas5086_controls),
|
||||
};
|
||||
|
||||
static const struct i2c_device_id tas5086_i2c_id[] = {
|
||||
{ "tas5086", 0 },
|
||||
{ }
|
||||
};
|
||||
MODULE_DEVICE_TABLE(i2c, tas5086_i2c_id);
|
||||
|
||||
static const struct regmap_config tas5086_regmap = {
|
||||
.reg_bits = 8,
|
||||
.val_bits = 8,
|
||||
.max_register = ARRAY_SIZE(tas5086_reg_defaults),
|
||||
.reg_defaults = tas5086_reg_defaults,
|
||||
.num_reg_defaults = ARRAY_SIZE(tas5086_reg_defaults),
|
||||
.cache_type = REGCACHE_RBTREE,
|
||||
.volatile_reg = tas5086_volatile_reg,
|
||||
.writeable_reg = tas5086_writeable_reg,
|
||||
.readable_reg = tas5086_accessible_reg,
|
||||
};
|
||||
|
||||
static int tas5086_i2c_probe(struct i2c_client *i2c,
|
||||
const struct i2c_device_id *id)
|
||||
{
|
||||
struct tas5086_private *priv;
|
||||
struct device *dev = &i2c->dev;
|
||||
int gpio_nreset = -EINVAL;
|
||||
int i, ret;
|
||||
|
||||
priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
|
||||
if (!priv)
|
||||
return -ENOMEM;
|
||||
|
||||
priv->regmap = devm_regmap_init_i2c(i2c, &tas5086_regmap);
|
||||
if (IS_ERR(priv->regmap)) {
|
||||
ret = PTR_ERR(priv->regmap);
|
||||
dev_err(&i2c->dev, "Failed to create regmap: %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
i2c_set_clientdata(i2c, priv);
|
||||
|
||||
if (of_match_device(of_match_ptr(tas5086_dt_ids), dev)) {
|
||||
struct device_node *of_node = dev->of_node;
|
||||
gpio_nreset = of_get_named_gpio(of_node, "reset-gpio", 0);
|
||||
}
|
||||
|
||||
if (gpio_is_valid(gpio_nreset))
|
||||
if (devm_gpio_request(dev, gpio_nreset, "TAS5086 Reset"))
|
||||
gpio_nreset = -EINVAL;
|
||||
|
||||
if (gpio_is_valid(gpio_nreset)) {
|
||||
/* Reset codec - minimum assertion time is 400ns */
|
||||
gpio_direction_output(gpio_nreset, 0);
|
||||
udelay(1);
|
||||
gpio_set_value(gpio_nreset, 1);
|
||||
|
||||
/* Codec needs ~15ms to wake up */
|
||||
msleep(15);
|
||||
}
|
||||
|
||||
priv->gpio_nreset = gpio_nreset;
|
||||
|
||||
/* The TAS5086 always returns 0x03 in its TAS5086_DEV_ID register */
|
||||
ret = regmap_read(priv->regmap, TAS5086_DEV_ID, &i);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
|
||||
if (i != 0x3) {
|
||||
dev_err(dev,
|
||||
"Failed to identify TAS5086 codec (got %02x)\n", i);
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
return snd_soc_register_codec(&i2c->dev, &soc_codec_dev_tas5086,
|
||||
&tas5086_dai, 1);
|
||||
}
|
||||
|
||||
static int tas5086_i2c_remove(struct i2c_client *i2c)
|
||||
{
|
||||
snd_soc_unregister_codec(&i2c->dev);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static struct i2c_driver tas5086_i2c_driver = {
|
||||
.driver = {
|
||||
.name = "tas5086",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(tas5086_dt_ids),
|
||||
},
|
||||
.id_table = tas5086_i2c_id,
|
||||
.probe = tas5086_i2c_probe,
|
||||
.remove = tas5086_i2c_remove,
|
||||
};
|
||||
|
||||
static int __init tas5086_modinit(void)
|
||||
{
|
||||
return i2c_add_driver(&tas5086_i2c_driver);
|
||||
}
|
||||
module_init(tas5086_modinit);
|
||||
|
||||
static void __exit tas5086_modexit(void)
|
||||
{
|
||||
i2c_del_driver(&tas5086_i2c_driver);
|
||||
}
|
||||
module_exit(tas5086_modexit);
|
||||
|
||||
MODULE_AUTHOR("Daniel Mack <zonque@gmail.com>");
|
||||
MODULE_DESCRIPTION("Texas Instruments TAS5086 ALSA SoC Codec Driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
Loading…
Reference in New Issue