mirror of https://gitee.com/openkylin/linux.git
ARM: dts: zynq: DT changes for v4.19
- Add Z-turn board - Add mmc aliases - Fix model information - Sort out documentatio - Update Zybo Z7 - Fix gpio-keys -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAltQR0wACgkQykllyylKDCHkjwCgis83L9Dz842kENlFWpBudvg5 oVsAn1EmIOBB14dhoTXcN3XvYenDEuTC =Ajph -----END PGP SIGNATURE----- Merge tag 'zynq-dt-for-v4.19-v2' of https://github.com/Xilinx/linux-xlnx into next/dt ARM: dts: zynq: DT changes for v4.19 - Add Z-turn board - Add mmc aliases - Fix model information - Sort out documentatio - Update Zybo Z7 - Fix gpio-keys * tag 'zynq-dt-for-v4.19-v2' of https://github.com/Xilinx/linux-xlnx: ARM: dts: zynq: Remove #address/#size-cells from gpio-keys ARM: dts: zynq: Add LEDs to the Zybo Z7 board ARM: dts: zynq: Use gpio constants for the Zybo Z7 board ARM: dts: zynq: Fix memory size on the Zybo Z7 board dt-bindings: xilinx: zynq: Add missing boards dt-bindings: xilinx: zynq: Move Paralella board to Xilinx dt-bindings: xilinx: zynq: Sort entries alphabetically dt-bindings: xilinx: zynq: Improve boards description ARM: dts: zynq: correct and improve the model property of dt files ARM: dts: zynq: Set correct manufacturer for ZedBoard and MicroZed boards ARM: dts: zynq: Add mmc alias for zc702/zc706/zed/zybo ARM: dts: zynq: Add support for Z-turn board Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
4fc116f395
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@ -1,7 +0,0 @@
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Adapteva Platforms Device Tree Bindings
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---------------------------------------
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Parallella board
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Required root node properties:
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- compatible = "adapteva,parallella";
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@ -8,18 +8,38 @@ Required root node properties:
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Additional compatible strings:
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- Xilinx internal board cc108
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- Adapteva Parallella board
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"adapteva,parallella"
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- Avnet MicroZed board
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"avnet,zynq-microzed"
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"xlnx,zynq-microzed"
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- Avnet ZedBoard board
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"avnet,zynq-zed"
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"xlnx,zynq-zed"
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- Digilent Zybo board
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"digilent,zynq-zybo"
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- Digilent Zybo Z7 board
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"digilent,zynq-zybo-z7"
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- Xilinx CC108 internal board
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"xlnx,zynq-cc108"
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- Xilinx internal board zc770 with different FMC cards
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- Xilinx ZC702 internal board
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"xlnx,zynq-zc702"
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- Xilinx ZC706 internal board
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"xlnx,zynq-zc706"
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- Xilinx ZC770 internal board, with different FMC cards
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"xlnx,zynq-zc770-xm010"
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"xlnx,zynq-zc770-xm011"
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"xlnx,zynq-zc770-xm012"
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"xlnx,zynq-zc770-xm013"
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- Digilent Zybo Z7 board
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"digilent,zynq-zybo-z7"
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---------------------------------------------------------------
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Xilinx Zynq UltraScale+ MPSoC Platforms Device Tree Bindings
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@ -1115,6 +1115,7 @@ dtb-$(CONFIG_ARCH_ZYNQ) += \
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zynq-zc770-xm012.dtb \
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zynq-zc770-xm013.dtb \
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zynq-zed.dtb \
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zynq-zturn.dtb \
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zynq-zybo.dtb \
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zynq-zybo-z7.dtb
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dtb-$(CONFIG_MACH_ARMADA_370) += \
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@ -12,8 +12,8 @@
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Xilinx CC108 board";
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compatible = "xlnx,zynq-cc108", "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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ethernet0 = &gem0;
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@ -7,8 +7,8 @@
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Zynq MicroZED Development Board";
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compatible = "xlnx,zynq-microzed", "xlnx,zynq-7000";
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model = "Avnet MicroZed board";
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compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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@ -12,7 +12,7 @@
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Adapteva Parallella Board";
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model = "Adapteva Parallella board";
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compatible = "adapteva,parallella", "xlnx,zynq-7000";
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aliases {
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@ -7,13 +7,14 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Zynq ZC702 Development Board";
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model = "Xilinx ZC702 board";
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compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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i2c0 = &i2c0;
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serial0 = &uart1;
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mmc0 = &sdhci0;
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};
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memory@0 {
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@ -28,8 +29,6 @@ chosen {
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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sw14 {
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label = "sw14";
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@ -7,13 +7,14 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Zynq ZC706 Development Board";
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model = "Xilinx ZC706 board";
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compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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i2c0 = &i2c0;
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serial0 = &uart1;
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mmc0 = &sdhci0;
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};
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memory@0 {
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@ -8,8 +8,8 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Xilinx ZC770 XM010 board";
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compatible = "xlnx,zynq-zc770-xm010", "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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ethernet0 = &gem0;
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@ -8,8 +8,8 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Xilinx ZC770 XM011 board";
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compatible = "xlnx,zynq-zc770-xm011", "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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i2c0 = &i2c1;
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@ -8,8 +8,8 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Xilinx ZC770 XM012 board";
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compatible = "xlnx,zynq-zc770-xm012", "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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i2c0 = &i2c0;
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@ -8,8 +8,8 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Xilinx ZC770 XM013 board";
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compatible = "xlnx,zynq-zc770-xm013", "xlnx,zynq-7000";
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model = "Xilinx Zynq";
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aliases {
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ethernet0 = &gem1;
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@ -7,12 +7,13 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Zynq Zed Development Board";
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compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
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model = "Avnet ZedBoard board";
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compatible = "avnet,zynq-zed", "xlnx,zynq-zed", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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serial0 = &uart1;
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mmc0 = &sdhci0;
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};
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memory@0 {
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@ -0,0 +1,114 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Copyright (C) 2015 Andrea Merello <adnrea.merello@gmail.com>
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* Copyright (C) 2017 Alexander Graf <agraf@suse.de>
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*
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* Based on zynq-zed.dts which is:
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* Copyright (C) 2011 - 2014 Xilinx
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* Copyright (C) 2012 National Instruments Corp.
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*
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*/
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/dts-v1/;
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Zynq Z-Turn MYIR Board";
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compatible = "myir,zynq-zturn", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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serial0 = &uart1;
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serial1 = &uart0;
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mmc0 = &sdhci0;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-leds {
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compatible = "gpio-leds";
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usr-led1 {
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label = "usr-led1";
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gpios = <&gpio0 0x0 0x1>;
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default-state = "off";
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};
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usr-led2 {
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label = "usr-led2";
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gpios = <&gpio0 0x9 0x1>;
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default-state = "off";
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};
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};
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gpio-keys {
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compatible = "gpio-keys";
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autorepeat;
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K1 {
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label = "K1";
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gpios = <&gpio0 0x32 0x1>;
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linux,code = <0x66>;
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gpio-key,wakeup;
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autorepeat;
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};
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};
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};
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&clkc {
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ps-clk-frequency = <33333333>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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ethernet_phy: ethernet-phy@0 {
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reg = <0x0>;
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};
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};
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&sdhci0 {
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status = "okay";
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};
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&uart0 {
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status = "okay";
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};
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&uart1 {
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status = "okay";
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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};
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&can0 {
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status = "okay";
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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stlm75@49 {
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status = "okay";
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compatible = "lm75";
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reg = <0x49>;
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};
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accelerometer@53 {
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compatible = "adi,adxl345", "adxl345", "adi,adxl34x", "adxl34x";
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reg = <0x53>;
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interrupt-parent = <&intc>;
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interrupts = <0x0 0x1e 0x4>;
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};
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};
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@ -1,9 +1,10 @@
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// SPDX-License-Identifier: GPL-2.0+
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/dts-v1/;
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#include "zynq-7000.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Zynq ZYBO Z7 Development Board";
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model = "Digilent Zybo Z7 board";
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compatible = "digilent,zynq-zybo-z7", "xlnx,zynq-7000";
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aliases {
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x20000000>;
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reg = <0x0 0x40000000>;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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};
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gpio-leds {
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compatible = "gpio-leds";
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ld4 {
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label = "zynq-zybo-z7:green:ld4";
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gpios = <&gpio0 7 GPIO_ACTIVE_HIGH>;
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};
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};
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usb_phy0: phy0 {
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#phy-cells = <0>;
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compatible = "usb-nop-xceiv";
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reset-gpios = <&gpio0 46 1>;
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reset-gpios = <&gpio0 46 GPIO_ACTIVE_LOW>;
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};
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};
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@ -7,12 +7,13 @@
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#include "zynq-7000.dtsi"
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/ {
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model = "Zynq ZYBO Development Board";
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model = "Digilent Zybo board";
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compatible = "digilent,zynq-zybo", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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serial0 = &uart1;
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mmc0 = &sdhci0;
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};
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memory@0 {
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