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ARM: dts: rockchip: add emmc nodes for rk3066 and rk3188 

Add the controller node, pinctrl settings for the customizable pins
and sort the controllers like on rk3288 as emmc, sdmmc, sdio for
handling convenience.

Signed-off-by: Heiko Stuebner <heiko@sntech.de>
This commit is contained in:
Heiko Stuebner 2014-09-10 17:04:36 +02:00
parent 39c2bd782a
commit 4ff4ae1258
3 changed files with 56 additions and 0 deletions
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21
arch/arm/boot/dts/rk3066a.dtsi
View File

@ -179,6 +179,27 @@ pcfg_pull_none: pcfg_pull_none {
bias-disable;
};
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <RK_GPIO3 31 RK_FUNC_2 &pcfg_pull_default>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <RK_GPIO4 9 RK_FUNC_2 &pcfg_pull_default>;
};
emmc_rst: emmc-rst {
rockchip,pins = <RK_GPIO4 10 RK_FUNC_2 &pcfg_pull_default>;
};
/*
* The data pins are shared between nandc and emmc and
* not accessible through pinctrl. Also they should've
* been already set correctly by firmware, as
* flash/emmc is the boot-device.
*/
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO2 28 RK_FUNC_1 &pcfg_pull_none>,

21
arch/arm/boot/dts/rk3188.dtsi
View File

@ -147,6 +147,27 @@ pcfg_pull_none: pcfg_pull_none {
bias-disable;
};
emmc {
emmc_clk: emmc-clk {
rockchip,pins = <RK_GPIO0 24 RK_FUNC_2 &pcfg_pull_default>;
};
emmc_cmd: emmc-cmd {
rockchip,pins = <RK_GPIO0 26 RK_FUNC_2 &pcfg_pull_default>;
};
emmc_rst: emmc-rst {
rockchip,pins = <RK_GPIO0 27 RK_FUNC_2 &pcfg_pull_default>;
};
/*
* The data pins are shared between nandc and emmc and
* not accessible through pinctrl. Also they should've
* been already set correctly by firmware, as
* flash/emmc is the boot-device.
*/
};
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,

14
arch/arm/boot/dts/rk3xxx.dtsi
View File

@ -26,6 +26,9 @@ aliases {
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
mshc0 = &emmc;
mshc1 = &mmc0;
mshc2 = &mmc1;
spi0 = &spi0;
spi1 = &spi1;
};
@ -137,6 +140,17 @@ mmc1: dwmmc@10218000 {
status = "disabled";
};
emmc: dwmmc@1021c000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x1021c000 0x1000>;
interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>;
clock-names = "biu", "ciu";
status = "disabled";
};
pmu: pmu@20004000 {
compatible = "rockchip,rk3066-pmu", "syscon";
reg = <0x20004000 0x100>;