mirror of https://gitee.com/openkylin/linux.git
Merge branch 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull irq fixes from Ingo Molnar: "Three irqchip driver fixes" * 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: irqchip/gicv3: Handle loop timeout proper irqchip/jcore: Fix lost per-cpu interrupts irqchip/eznps: Acknowledge NPS_IPI before calling the handler
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commit
50276c9abb
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@ -85,7 +85,7 @@ static void nps400_irq_eoi_global(struct irq_data *irqd)
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nps_ack_gic();
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}
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static void nps400_irq_eoi(struct irq_data *irqd)
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static void nps400_irq_ack(struct irq_data *irqd)
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{
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unsigned int __maybe_unused irq = irqd_to_hwirq(irqd);
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@ -103,7 +103,7 @@ static struct irq_chip nps400_irq_chip_percpu = {
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.name = "NPS400 IC",
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.irq_mask = nps400_irq_mask,
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.irq_unmask = nps400_irq_unmask,
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.irq_eoi = nps400_irq_eoi,
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.irq_ack = nps400_irq_ack,
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};
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static int nps400_irq_map(struct irq_domain *d, unsigned int virq,
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@ -153,7 +153,7 @@ static void gic_enable_redist(bool enable)
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return; /* No PM support in this redistributor */
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}
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while (count--) {
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while (--count) {
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val = readl_relaxed(rbase + GICR_WAKER);
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if (enable ^ (bool)(val & GICR_WAKER_ChildrenAsleep))
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break;
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@ -25,12 +25,30 @@
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static struct irq_chip jcore_aic;
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/*
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* The J-Core AIC1 and AIC2 are cpu-local interrupt controllers and do
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* not distinguish or use distinct irq number ranges for per-cpu event
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* interrupts (timer, IPI). Since information to determine whether a
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* particular irq number should be treated as per-cpu is not available
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* at mapping time, we use a wrapper handler function which chooses
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* the right handler at runtime based on whether IRQF_PERCPU was used
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* when requesting the irq.
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*/
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static void handle_jcore_irq(struct irq_desc *desc)
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{
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if (irqd_is_per_cpu(irq_desc_get_irq_data(desc)))
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handle_percpu_irq(desc);
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else
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handle_simple_irq(desc);
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}
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static int jcore_aic_irqdomain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hwirq)
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{
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struct irq_chip *aic = d->host_data;
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irq_set_chip_and_handler(irq, aic, handle_simple_irq);
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irq_set_chip_and_handler(irq, aic, handle_jcore_irq);
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return 0;
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}
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