mirror of https://gitee.com/openkylin/linux.git
b43: add maskset helpers
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
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507f9a7184
commit
5056635c10
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@ -999,6 +999,12 @@ static inline void b43_write16(struct b43_wldev *dev, u16 offset, u16 value)
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dev->dev->write16(dev->dev, offset, value);
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}
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static inline void b43_maskset16(struct b43_wldev *dev, u16 offset, u16 mask,
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u16 set)
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{
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b43_write16(dev, offset, (b43_read16(dev, offset) & mask) | set);
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}
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static inline u32 b43_read32(struct b43_wldev *dev, u16 offset)
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{
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return dev->dev->read32(dev->dev, offset);
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@ -1009,6 +1015,12 @@ static inline void b43_write32(struct b43_wldev *dev, u16 offset, u32 value)
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dev->dev->write32(dev->dev, offset, value);
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}
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static inline void b43_maskset32(struct b43_wldev *dev, u16 offset, u32 mask,
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u32 set)
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{
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b43_write32(dev, offset, (b43_read32(dev, offset) & mask) | set);
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}
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static inline void b43_block_read(struct b43_wldev *dev, void *buffer,
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size_t count, u16 offset, u8 reg_width)
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{
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@ -578,22 +578,14 @@ void b43_tsf_read(struct b43_wldev *dev, u64 *tsf)
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static void b43_time_lock(struct b43_wldev *dev)
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{
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u32 macctl;
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macctl = b43_read32(dev, B43_MMIO_MACCTL);
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macctl |= B43_MACCTL_TBTTHOLD;
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b43_write32(dev, B43_MMIO_MACCTL, macctl);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_TBTTHOLD);
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/* Commit the write */
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b43_read32(dev, B43_MMIO_MACCTL);
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}
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static void b43_time_unlock(struct b43_wldev *dev)
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{
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u32 macctl;
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macctl = b43_read32(dev, B43_MMIO_MACCTL);
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macctl &= ~B43_MACCTL_TBTTHOLD;
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b43_write32(dev, B43_MMIO_MACCTL, macctl);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_TBTTHOLD, 0);
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/* Commit the write */
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b43_read32(dev, B43_MMIO_MACCTL);
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}
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@ -2485,10 +2477,8 @@ static int b43_upload_microcode(struct b43_wldev *dev)
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b43_write32(dev, B43_MMIO_GEN_IRQ_REASON, B43_IRQ_ALL);
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/* Start the microcode PSM */
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macctl = b43_read32(dev, B43_MMIO_MACCTL);
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macctl &= ~B43_MACCTL_PSM_JMP0;
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macctl |= B43_MACCTL_PSM_RUN;
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b43_write32(dev, B43_MMIO_MACCTL, macctl);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_JMP0,
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B43_MACCTL_PSM_RUN);
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/* Wait for the microcode to load and respond */
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i = 0;
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@ -2588,10 +2578,9 @@ static int b43_upload_microcode(struct b43_wldev *dev)
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return 0;
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error:
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macctl = b43_read32(dev, B43_MMIO_MACCTL);
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macctl &= ~B43_MACCTL_PSM_RUN;
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macctl |= B43_MACCTL_PSM_JMP0;
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b43_write32(dev, B43_MMIO_MACCTL, macctl);
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/* Stop the microcode PSM. */
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN,
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B43_MACCTL_PSM_JMP0);
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return err;
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}
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@ -2706,11 +2695,8 @@ static int b43_gpio_init(struct b43_wldev *dev)
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struct ssb_device *gpiodev;
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u32 mask, set;
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b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
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& ~B43_MACCTL_GPOUTSMSK);
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b43_write16(dev, B43_MMIO_GPIO_MASK, b43_read16(dev, B43_MMIO_GPIO_MASK)
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| 0x000F);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0);
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b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, 0xF);
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mask = 0x0000001F;
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set = 0x0000000F;
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@ -2798,9 +2784,7 @@ void b43_mac_enable(struct b43_wldev *dev)
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dev->mac_suspended--;
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B43_WARN_ON(dev->mac_suspended < 0);
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if (dev->mac_suspended == 0) {
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b43_write32(dev, B43_MMIO_MACCTL,
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b43_read32(dev, B43_MMIO_MACCTL)
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| B43_MACCTL_ENABLED);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_ENABLED);
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b43_write32(dev, B43_MMIO_GEN_IRQ_REASON,
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B43_IRQ_MAC_SUSPENDED);
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/* Commit writes */
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@ -2821,9 +2805,7 @@ void b43_mac_suspend(struct b43_wldev *dev)
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if (dev->mac_suspended == 0) {
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b43_power_saving_ctl_bits(dev, B43_PS_AWAKE);
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b43_write32(dev, B43_MMIO_MACCTL,
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b43_read32(dev, B43_MMIO_MACCTL)
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& ~B43_MACCTL_ENABLED);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_ENABLED, 0);
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/* force pci to flush the write */
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b43_read32(dev, B43_MMIO_MACCTL);
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for (i = 35; i; i--) {
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@ -2929,15 +2911,10 @@ static void b43_adjust_opmode(struct b43_wldev *dev)
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* so always disable it. If we want to implement PMQ,
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* we need to enable it here (clear DISCPMQ) in AP mode.
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*/
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if (0 /* ctl & B43_MACCTL_AP */) {
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b43_write32(dev, B43_MMIO_MACCTL,
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b43_read32(dev, B43_MMIO_MACCTL)
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& ~B43_MACCTL_DISCPMQ);
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} else {
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b43_write32(dev, B43_MMIO_MACCTL,
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b43_read32(dev, B43_MMIO_MACCTL)
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| B43_MACCTL_DISCPMQ);
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}
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if (0 /* ctl & B43_MACCTL_AP */)
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_DISCPMQ, 0);
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else
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b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_DISCPMQ);
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}
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static void b43_rate_memory_write(struct b43_wldev *dev, u16 rate, int is_ofdm)
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@ -3081,10 +3058,8 @@ static int b43_chip_init(struct b43_wldev *dev)
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if (dev->dev->core_rev < 5)
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b43_write32(dev, 0x010C, 0x01000000);
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b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
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& ~B43_MACCTL_INFRA);
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b43_write32(dev, B43_MMIO_MACCTL, b43_read32(dev, B43_MMIO_MACCTL)
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| B43_MACCTL_INFRA);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_INFRA, 0);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~0, B43_MACCTL_INFRA);
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/* Probe Response Timeout value */
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/* FIXME: Default to 0, has to be set by ioctl probably... :-/ */
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@ -4562,8 +4537,6 @@ static void b43_set_pretbtt(struct b43_wldev *dev)
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/* Locking: wl->mutex */
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static void b43_wireless_core_exit(struct b43_wldev *dev)
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{
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u32 macctl;
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B43_WARN_ON(dev && b43_status(dev) > B43_STAT_INITIALIZED);
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if (!dev || b43_status(dev) != B43_STAT_INITIALIZED)
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return;
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@ -4574,10 +4547,8 @@ static void b43_wireless_core_exit(struct b43_wldev *dev)
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b43_set_status(dev, B43_STAT_UNINIT);
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/* Stop the microcode PSM. */
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macctl = b43_read32(dev, B43_MMIO_MACCTL);
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macctl &= ~B43_MACCTL_PSM_RUN;
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macctl |= B43_MACCTL_PSM_JMP0;
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b43_write32(dev, B43_MMIO_MACCTL, macctl);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_PSM_RUN,
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B43_MACCTL_PSM_JMP0);
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b43_dma_free(dev);
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b43_pio_free(dev);
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@ -3968,13 +3968,10 @@ static void b43_nphy_superswitch_init(struct b43_wldev *dev, bool init)
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#endif
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}
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b43_write32(dev, B43_MMIO_MACCTL,
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b43_read32(dev, B43_MMIO_MACCTL) &
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~B43_MACCTL_GPOUTSMSK);
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b43_write16(dev, B43_MMIO_GPIO_MASK,
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b43_read16(dev, B43_MMIO_GPIO_MASK) | 0xFC00);
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b43_write16(dev, B43_MMIO_GPIO_CONTROL,
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b43_read16(dev, B43_MMIO_GPIO_CONTROL) & ~0xFC00);
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b43_maskset32(dev, B43_MMIO_MACCTL, ~B43_MACCTL_GPOUTSMSK, 0);
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b43_maskset16(dev, B43_MMIO_GPIO_MASK, ~0, 0xFC00);
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b43_maskset16(dev, B43_MMIO_GPIO_CONTROL, (~0xFC00 & 0xFFFF),
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0);
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if (init) {
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b43_phy_write(dev, B43_NPHY_RFCTL_LUT_TRSW_LO1, 0x2D8);
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@ -4530,8 +4527,7 @@ static void b43_nphy_op_maskset(struct b43_wldev *dev, u16 reg, u16 mask,
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{
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check_phyreg(dev, reg);
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b43_write16(dev, B43_MMIO_PHY_CONTROL, reg);
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b43_write16(dev, B43_MMIO_PHY_DATA,
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(b43_read16(dev, B43_MMIO_PHY_DATA) & mask) | set);
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b43_maskset16(dev, B43_MMIO_PHY_DATA, mask, set);
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}
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static u16 b43_nphy_op_radio_read(struct b43_wldev *dev, u16 reg)
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