mirror of https://gitee.com/openkylin/linux.git
liquidio: refactor interrupt moderation code
Refactor interrupt moderation code for flexibility because parameters are different for 10G and 25G cards. Currently parameters (for 10G only) come from macros compiled-in to the PF and VF drivers; fix it so that parameters suitable for the card (10G or 25G) come from the NIC firmware via response to a command. Also bump up driver version to 1.5.1 to match newer NIC firmware version. Signed-off-by: Prasad Kanneganti <prasad.kanneganti@cavium.com> Signed-off-by: Felix Manlunas <felix.manlunas@cavium.com> Signed-off-by: Derek Chickles <derek.chickles@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
4333d619f9
commit
50c0add534
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@ -33,6 +33,19 @@
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static int octnet_get_link_stats(struct net_device *netdev);
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static int octnet_get_link_stats(struct net_device *netdev);
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struct oct_intrmod_context {
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int octeon_id;
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wait_queue_head_t wc;
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int cond;
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int status;
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};
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struct oct_intrmod_resp {
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u64 rh;
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struct oct_intrmod_cfg intrmod;
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u64 status;
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};
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struct oct_mdio_cmd_context {
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struct oct_mdio_cmd_context {
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int octeon_id;
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int octeon_id;
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wait_queue_head_t wc;
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wait_queue_head_t wc;
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@ -1298,95 +1311,103 @@ static int lio_vf_get_sset_count(struct net_device *netdev, int sset)
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}
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}
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}
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}
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static int lio_get_intr_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *intr_coal)
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{
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struct lio *lio = GET_LIO(netdev);
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struct octeon_device *oct = lio->oct_dev;
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struct octeon_instr_queue *iq;
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struct oct_intrmod_cfg *intrmod_cfg;
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intrmod_cfg = &oct->intrmod;
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switch (oct->chip_id) {
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case OCTEON_CN23XX_PF_VID:
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case OCTEON_CN23XX_VF_VID:
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if (!intrmod_cfg->rx_enable) {
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intr_coal->rx_coalesce_usecs = intrmod_cfg->rx_usecs;
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intr_coal->rx_max_coalesced_frames =
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intrmod_cfg->rx_frames;
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}
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if (!intrmod_cfg->tx_enable)
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intr_coal->tx_max_coalesced_frames =
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intrmod_cfg->tx_frames;
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break;
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case OCTEON_CN68XX:
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case OCTEON_CN66XX: {
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struct octeon_cn6xxx *cn6xxx =
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(struct octeon_cn6xxx *)oct->chip;
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if (!intrmod_cfg->rx_enable) {
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intr_coal->rx_coalesce_usecs =
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CFG_GET_OQ_INTR_TIME(cn6xxx->conf);
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intr_coal->rx_max_coalesced_frames =
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CFG_GET_OQ_INTR_PKT(cn6xxx->conf);
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}
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iq = oct->instr_queue[lio->linfo.txpciq[0].s.q_no];
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intr_coal->tx_max_coalesced_frames = iq->fill_threshold;
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break;
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}
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default:
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netif_info(lio, drv, lio->netdev, "Unknown Chip !!\n");
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return -EINVAL;
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}
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if (intrmod_cfg->rx_enable) {
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intr_coal->use_adaptive_rx_coalesce =
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intrmod_cfg->rx_enable;
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intr_coal->rate_sample_interval =
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intrmod_cfg->check_intrvl;
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intr_coal->pkt_rate_high =
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intrmod_cfg->maxpkt_ratethr;
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intr_coal->pkt_rate_low =
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intrmod_cfg->minpkt_ratethr;
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intr_coal->rx_max_coalesced_frames_high =
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intrmod_cfg->rx_maxcnt_trigger;
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intr_coal->rx_coalesce_usecs_high =
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intrmod_cfg->rx_maxtmr_trigger;
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intr_coal->rx_coalesce_usecs_low =
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intrmod_cfg->rx_mintmr_trigger;
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intr_coal->rx_max_coalesced_frames_low =
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intrmod_cfg->rx_mincnt_trigger;
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}
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if ((OCTEON_CN23XX_PF(oct) || OCTEON_CN23XX_VF(oct)) &&
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(intrmod_cfg->tx_enable)) {
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intr_coal->use_adaptive_tx_coalesce = intrmod_cfg->tx_enable;
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intr_coal->tx_max_coalesced_frames_high =
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intrmod_cfg->tx_maxcnt_trigger;
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intr_coal->tx_max_coalesced_frames_low =
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intrmod_cfg->tx_mincnt_trigger;
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}
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return 0;
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}
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/* Callback function for intrmod */
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/* Callback function for intrmod */
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static void octnet_intrmod_callback(struct octeon_device *oct_dev,
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static void octnet_intrmod_callback(struct octeon_device *oct_dev,
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u32 status,
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u32 status,
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void *ptr)
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void *ptr)
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{
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{
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struct oct_intrmod_cmd *cmd = ptr;
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struct octeon_soft_command *sc = (struct octeon_soft_command *)ptr;
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struct octeon_soft_command *sc = cmd->sc;
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struct oct_intrmod_context *ctx;
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oct_dev = cmd->oct_dev;
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ctx = (struct oct_intrmod_context *)sc->ctxptr;
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if (status)
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ctx->status = status;
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dev_err(&oct_dev->pci_dev->dev, "intrmod config failed. Status: %llx\n",
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CVM_CAST64(status));
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oct_dev = lio_get_device(ctx->octeon_id);
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else
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dev_info(&oct_dev->pci_dev->dev,
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WRITE_ONCE(ctx->cond, 1);
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"Rx-Adaptive Interrupt moderation enabled:%llx\n",
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oct_dev->intrmod.rx_enable);
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/* This barrier is required to be sure that the response has been
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* written fully before waking up the handler
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*/
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wmb();
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wake_up_interruptible(&ctx->wc);
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}
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/* get interrupt moderation parameters */
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static int octnet_get_intrmod_cfg(struct lio *lio,
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struct oct_intrmod_cfg *intr_cfg)
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{
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struct octeon_soft_command *sc;
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struct oct_intrmod_context *ctx;
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struct oct_intrmod_resp *resp;
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int retval;
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struct octeon_device *oct_dev = lio->oct_dev;
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/* Alloc soft command */
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sc = (struct octeon_soft_command *)
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octeon_alloc_soft_command(oct_dev,
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0,
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sizeof(struct oct_intrmod_resp),
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sizeof(struct oct_intrmod_context));
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if (!sc)
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return -ENOMEM;
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resp = (struct oct_intrmod_resp *)sc->virtrptr;
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memset(resp, 0, sizeof(struct oct_intrmod_resp));
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ctx = (struct oct_intrmod_context *)sc->ctxptr;
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memset(resp, 0, sizeof(struct oct_intrmod_context));
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WRITE_ONCE(ctx->cond, 0);
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ctx->octeon_id = lio_get_device_id(oct_dev);
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init_waitqueue_head(&ctx->wc);
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sc->iq_no = lio->linfo.txpciq[0].s.q_no;
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octeon_prepare_soft_command(oct_dev, sc, OPCODE_NIC,
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OPCODE_NIC_INTRMOD_PARAMS, 0, 0, 0);
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sc->callback = octnet_intrmod_callback;
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sc->callback_arg = sc;
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sc->wait_time = 1000;
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retval = octeon_send_soft_command(oct_dev, sc);
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if (retval == IQ_SEND_FAILED) {
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octeon_free_soft_command(oct_dev, sc);
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return -EINVAL;
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}
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/* Sleep on a wait queue till the cond flag indicates that the
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* response arrived or timed-out.
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*/
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if (sleep_cond(&ctx->wc, &ctx->cond) == -EINTR) {
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dev_err(&oct_dev->pci_dev->dev, "Wait interrupted\n");
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goto intrmod_info_wait_intr;
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}
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retval = ctx->status || resp->status;
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if (retval) {
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dev_err(&oct_dev->pci_dev->dev,
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"Get interrupt moderation parameters failed\n");
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goto intrmod_info_wait_fail;
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}
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octeon_swap_8B_data((u64 *)&resp->intrmod,
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(sizeof(struct oct_intrmod_cfg)) / 8);
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memcpy(intr_cfg, &resp->intrmod, sizeof(struct oct_intrmod_cfg));
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octeon_free_soft_command(oct_dev, sc);
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return 0;
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intrmod_info_wait_fail:
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octeon_free_soft_command(oct_dev, sc);
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octeon_free_soft_command(oct_dev, sc);
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intrmod_info_wait_intr:
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return -ENODEV;
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}
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}
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/* Configure interrupt moderation parameters */
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/* Configure interrupt moderation parameters */
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@ -1394,7 +1415,7 @@ static int octnet_set_intrmod_cfg(struct lio *lio,
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struct oct_intrmod_cfg *intr_cfg)
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struct oct_intrmod_cfg *intr_cfg)
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{
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{
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struct octeon_soft_command *sc;
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struct octeon_soft_command *sc;
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struct oct_intrmod_cmd *cmd;
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struct oct_intrmod_context *ctx;
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struct oct_intrmod_cfg *cfg;
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struct oct_intrmod_cfg *cfg;
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int retval;
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int retval;
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struct octeon_device *oct_dev = lio->oct_dev;
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struct octeon_device *oct_dev = lio->oct_dev;
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@ -1404,19 +1425,21 @@ static int octnet_set_intrmod_cfg(struct lio *lio,
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octeon_alloc_soft_command(oct_dev,
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octeon_alloc_soft_command(oct_dev,
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sizeof(struct oct_intrmod_cfg),
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sizeof(struct oct_intrmod_cfg),
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0,
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0,
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sizeof(struct oct_intrmod_cmd));
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sizeof(struct oct_intrmod_context));
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if (!sc)
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if (!sc)
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return -ENOMEM;
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return -ENOMEM;
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cmd = (struct oct_intrmod_cmd *)sc->ctxptr;
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ctx = (struct oct_intrmod_context *)sc->ctxptr;
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WRITE_ONCE(ctx->cond, 0);
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ctx->octeon_id = lio_get_device_id(oct_dev);
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init_waitqueue_head(&ctx->wc);
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cfg = (struct oct_intrmod_cfg *)sc->virtdptr;
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cfg = (struct oct_intrmod_cfg *)sc->virtdptr;
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memcpy(cfg, intr_cfg, sizeof(struct oct_intrmod_cfg));
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memcpy(cfg, intr_cfg, sizeof(struct oct_intrmod_cfg));
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octeon_swap_8B_data((u64 *)cfg, (sizeof(struct oct_intrmod_cfg)) / 8);
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octeon_swap_8B_data((u64 *)cfg, (sizeof(struct oct_intrmod_cfg)) / 8);
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cmd->sc = sc;
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cmd->cfg = cfg;
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cmd->oct_dev = oct_dev;
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sc->iq_no = lio->linfo.txpciq[0].s.q_no;
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sc->iq_no = lio->linfo.txpciq[0].s.q_no;
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@ -1424,7 +1447,7 @@ static int octnet_set_intrmod_cfg(struct lio *lio,
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OPCODE_NIC_INTRMOD_CFG, 0, 0, 0);
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OPCODE_NIC_INTRMOD_CFG, 0, 0, 0);
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sc->callback = octnet_intrmod_callback;
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sc->callback = octnet_intrmod_callback;
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sc->callback_arg = cmd;
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sc->callback_arg = sc;
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sc->wait_time = 1000;
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sc->wait_time = 1000;
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retval = octeon_send_soft_command(oct_dev, sc);
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retval = octeon_send_soft_command(oct_dev, sc);
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@ -1433,7 +1456,29 @@ static int octnet_set_intrmod_cfg(struct lio *lio,
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return -EINVAL;
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return -EINVAL;
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}
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}
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return 0;
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/* Sleep on a wait queue till the cond flag indicates that the
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* response arrived or timed-out.
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*/
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if (sleep_cond(&ctx->wc, &ctx->cond) != -EINTR) {
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retval = ctx->status;
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if (retval)
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dev_err(&oct_dev->pci_dev->dev,
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"intrmod config failed. Status: %llx\n",
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CVM_CAST64(retval));
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else
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dev_info(&oct_dev->pci_dev->dev,
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"Rx-Adaptive Interrupt moderation %s\n",
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(intr_cfg->rx_enable) ?
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"enabled" : "disabled");
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octeon_free_soft_command(oct_dev, sc);
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return ((retval) ? -ENODEV : 0);
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}
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dev_err(&oct_dev->pci_dev->dev, "iq/oq config failed\n");
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return -EINTR;
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}
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}
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static void
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static void
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@ -1590,80 +1635,106 @@ static int octnet_get_link_stats(struct net_device *netdev)
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return 0;
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return 0;
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}
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}
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static int lio_get_intr_coalesce(struct net_device *netdev,
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struct ethtool_coalesce *intr_coal)
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{
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struct lio *lio = GET_LIO(netdev);
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struct octeon_device *oct = lio->oct_dev;
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struct octeon_instr_queue *iq;
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struct oct_intrmod_cfg intrmod_cfg;
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if (octnet_get_intrmod_cfg(lio, &intrmod_cfg))
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return -ENODEV;
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switch (oct->chip_id) {
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case OCTEON_CN23XX_PF_VID:
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case OCTEON_CN23XX_VF_VID: {
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if (!intrmod_cfg.rx_enable) {
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intr_coal->rx_coalesce_usecs = oct->rx_coalesce_usecs;
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intr_coal->rx_max_coalesced_frames =
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oct->rx_max_coalesced_frames;
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}
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if (!intrmod_cfg.tx_enable)
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intr_coal->tx_max_coalesced_frames =
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oct->tx_max_coalesced_frames;
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break;
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}
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case OCTEON_CN68XX:
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case OCTEON_CN66XX: {
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struct octeon_cn6xxx *cn6xxx =
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(struct octeon_cn6xxx *)oct->chip;
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if (!intrmod_cfg.rx_enable) {
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intr_coal->rx_coalesce_usecs =
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CFG_GET_OQ_INTR_TIME(cn6xxx->conf);
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intr_coal->rx_max_coalesced_frames =
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CFG_GET_OQ_INTR_PKT(cn6xxx->conf);
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}
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iq = oct->instr_queue[lio->linfo.txpciq[0].s.q_no];
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intr_coal->tx_max_coalesced_frames = iq->fill_threshold;
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break;
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}
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default:
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netif_info(lio, drv, lio->netdev, "Unknown Chip !!\n");
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return -EINVAL;
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}
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if (intrmod_cfg.rx_enable) {
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intr_coal->use_adaptive_rx_coalesce =
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intrmod_cfg.rx_enable;
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intr_coal->rate_sample_interval =
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intrmod_cfg.check_intrvl;
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intr_coal->pkt_rate_high =
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intrmod_cfg.maxpkt_ratethr;
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intr_coal->pkt_rate_low =
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intrmod_cfg.minpkt_ratethr;
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intr_coal->rx_max_coalesced_frames_high =
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intrmod_cfg.rx_maxcnt_trigger;
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intr_coal->rx_coalesce_usecs_high =
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intrmod_cfg.rx_maxtmr_trigger;
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intr_coal->rx_coalesce_usecs_low =
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intrmod_cfg.rx_mintmr_trigger;
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||||||
|
intr_coal->rx_max_coalesced_frames_low =
|
||||||
|
intrmod_cfg.rx_mincnt_trigger;
|
||||||
|
}
|
||||||
|
if ((OCTEON_CN23XX_PF(oct) || OCTEON_CN23XX_VF(oct)) &&
|
||||||
|
(intrmod_cfg.tx_enable)) {
|
||||||
|
intr_coal->use_adaptive_tx_coalesce =
|
||||||
|
intrmod_cfg.tx_enable;
|
||||||
|
intr_coal->tx_max_coalesced_frames_high =
|
||||||
|
intrmod_cfg.tx_maxcnt_trigger;
|
||||||
|
intr_coal->tx_max_coalesced_frames_low =
|
||||||
|
intrmod_cfg.tx_mincnt_trigger;
|
||||||
|
}
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
/* Enable/Disable auto interrupt Moderation */
|
/* Enable/Disable auto interrupt Moderation */
|
||||||
static int oct_cfg_adaptive_intr(struct lio *lio, struct ethtool_coalesce
|
static int oct_cfg_adaptive_intr(struct lio *lio,
|
||||||
*intr_coal)
|
struct oct_intrmod_cfg *intrmod_cfg,
|
||||||
|
struct ethtool_coalesce *intr_coal)
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
struct octeon_device *oct = lio->oct_dev;
|
|
||||||
struct oct_intrmod_cfg *intrmod_cfg;
|
|
||||||
|
|
||||||
intrmod_cfg = &oct->intrmod;
|
if (intrmod_cfg->rx_enable || intrmod_cfg->tx_enable) {
|
||||||
|
intrmod_cfg->check_intrvl = intr_coal->rate_sample_interval;
|
||||||
if (oct->intrmod.rx_enable || oct->intrmod.tx_enable) {
|
intrmod_cfg->maxpkt_ratethr = intr_coal->pkt_rate_high;
|
||||||
if (intr_coal->rate_sample_interval)
|
intrmod_cfg->minpkt_ratethr = intr_coal->pkt_rate_low;
|
||||||
intrmod_cfg->check_intrvl =
|
|
||||||
intr_coal->rate_sample_interval;
|
|
||||||
else
|
|
||||||
intrmod_cfg->check_intrvl =
|
|
||||||
LIO_INTRMOD_CHECK_INTERVAL;
|
|
||||||
|
|
||||||
if (intr_coal->pkt_rate_high)
|
|
||||||
intrmod_cfg->maxpkt_ratethr =
|
|
||||||
intr_coal->pkt_rate_high;
|
|
||||||
else
|
|
||||||
intrmod_cfg->maxpkt_ratethr =
|
|
||||||
LIO_INTRMOD_MAXPKT_RATETHR;
|
|
||||||
|
|
||||||
if (intr_coal->pkt_rate_low)
|
|
||||||
intrmod_cfg->minpkt_ratethr =
|
|
||||||
intr_coal->pkt_rate_low;
|
|
||||||
else
|
|
||||||
intrmod_cfg->minpkt_ratethr =
|
|
||||||
LIO_INTRMOD_MINPKT_RATETHR;
|
|
||||||
}
|
}
|
||||||
if (oct->intrmod.rx_enable) {
|
if (intrmod_cfg->rx_enable) {
|
||||||
if (intr_coal->rx_max_coalesced_frames_high)
|
intrmod_cfg->rx_maxcnt_trigger =
|
||||||
intrmod_cfg->rx_maxcnt_trigger =
|
intr_coal->rx_max_coalesced_frames_high;
|
||||||
intr_coal->rx_max_coalesced_frames_high;
|
intrmod_cfg->rx_maxtmr_trigger =
|
||||||
else
|
intr_coal->rx_coalesce_usecs_high;
|
||||||
intrmod_cfg->rx_maxcnt_trigger =
|
intrmod_cfg->rx_mintmr_trigger =
|
||||||
LIO_INTRMOD_RXMAXCNT_TRIGGER;
|
intr_coal->rx_coalesce_usecs_low;
|
||||||
|
intrmod_cfg->rx_mincnt_trigger =
|
||||||
if (intr_coal->rx_coalesce_usecs_high)
|
intr_coal->rx_max_coalesced_frames_low;
|
||||||
intrmod_cfg->rx_maxtmr_trigger =
|
|
||||||
intr_coal->rx_coalesce_usecs_high;
|
|
||||||
else
|
|
||||||
intrmod_cfg->rx_maxtmr_trigger =
|
|
||||||
LIO_INTRMOD_RXMAXTMR_TRIGGER;
|
|
||||||
|
|
||||||
if (intr_coal->rx_coalesce_usecs_low)
|
|
||||||
intrmod_cfg->rx_mintmr_trigger =
|
|
||||||
intr_coal->rx_coalesce_usecs_low;
|
|
||||||
else
|
|
||||||
intrmod_cfg->rx_mintmr_trigger =
|
|
||||||
LIO_INTRMOD_RXMINTMR_TRIGGER;
|
|
||||||
|
|
||||||
if (intr_coal->rx_max_coalesced_frames_low)
|
|
||||||
intrmod_cfg->rx_mincnt_trigger =
|
|
||||||
intr_coal->rx_max_coalesced_frames_low;
|
|
||||||
else
|
|
||||||
intrmod_cfg->rx_mincnt_trigger =
|
|
||||||
LIO_INTRMOD_RXMINCNT_TRIGGER;
|
|
||||||
}
|
}
|
||||||
if (oct->intrmod.tx_enable) {
|
if (intrmod_cfg->tx_enable) {
|
||||||
if (intr_coal->tx_max_coalesced_frames_high)
|
intrmod_cfg->tx_maxcnt_trigger =
|
||||||
intrmod_cfg->tx_maxcnt_trigger =
|
intr_coal->tx_max_coalesced_frames_high;
|
||||||
intr_coal->tx_max_coalesced_frames_high;
|
intrmod_cfg->tx_mincnt_trigger =
|
||||||
else
|
intr_coal->tx_max_coalesced_frames_low;
|
||||||
intrmod_cfg->tx_maxcnt_trigger =
|
|
||||||
LIO_INTRMOD_TXMAXCNT_TRIGGER;
|
|
||||||
if (intr_coal->tx_max_coalesced_frames_low)
|
|
||||||
intrmod_cfg->tx_mincnt_trigger =
|
|
||||||
intr_coal->tx_max_coalesced_frames_low;
|
|
||||||
else
|
|
||||||
intrmod_cfg->tx_mincnt_trigger =
|
|
||||||
LIO_INTRMOD_TXMINCNT_TRIGGER;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = octnet_set_intrmod_cfg(lio, intrmod_cfg);
|
ret = octnet_set_intrmod_cfg(lio, intrmod_cfg);
|
||||||
|
@ -1672,7 +1743,9 @@ static int oct_cfg_adaptive_intr(struct lio *lio, struct ethtool_coalesce
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
oct_cfg_rx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal)
|
oct_cfg_rx_intrcnt(struct lio *lio,
|
||||||
|
struct oct_intrmod_cfg *intrmod,
|
||||||
|
struct ethtool_coalesce *intr_coal)
|
||||||
{
|
{
|
||||||
struct octeon_device *oct = lio->oct_dev;
|
struct octeon_device *oct = lio->oct_dev;
|
||||||
u32 rx_max_coalesced_frames;
|
u32 rx_max_coalesced_frames;
|
||||||
|
@ -1698,7 +1771,7 @@ oct_cfg_rx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal)
|
||||||
int q_no;
|
int q_no;
|
||||||
|
|
||||||
if (!intr_coal->rx_max_coalesced_frames)
|
if (!intr_coal->rx_max_coalesced_frames)
|
||||||
rx_max_coalesced_frames = oct->intrmod.rx_frames;
|
rx_max_coalesced_frames = intrmod->rx_frames;
|
||||||
else
|
else
|
||||||
rx_max_coalesced_frames =
|
rx_max_coalesced_frames =
|
||||||
intr_coal->rx_max_coalesced_frames;
|
intr_coal->rx_max_coalesced_frames;
|
||||||
|
@ -1709,17 +1782,18 @@ oct_cfg_rx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal)
|
||||||
(octeon_read_csr64(
|
(octeon_read_csr64(
|
||||||
oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(q_no)) &
|
oct, CN23XX_SLI_OQ_PKT_INT_LEVELS(q_no)) &
|
||||||
(0x3fffff00000000UL)) |
|
(0x3fffff00000000UL)) |
|
||||||
rx_max_coalesced_frames);
|
(rx_max_coalesced_frames - 1));
|
||||||
/*consider setting resend bit*/
|
/*consider setting resend bit*/
|
||||||
}
|
}
|
||||||
oct->intrmod.rx_frames = rx_max_coalesced_frames;
|
intrmod->rx_frames = rx_max_coalesced_frames;
|
||||||
|
oct->rx_max_coalesced_frames = rx_max_coalesced_frames;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case OCTEON_CN23XX_VF_VID: {
|
case OCTEON_CN23XX_VF_VID: {
|
||||||
int q_no;
|
int q_no;
|
||||||
|
|
||||||
if (!intr_coal->rx_max_coalesced_frames)
|
if (!intr_coal->rx_max_coalesced_frames)
|
||||||
rx_max_coalesced_frames = oct->intrmod.rx_frames;
|
rx_max_coalesced_frames = intrmod->rx_frames;
|
||||||
else
|
else
|
||||||
rx_max_coalesced_frames =
|
rx_max_coalesced_frames =
|
||||||
intr_coal->rx_max_coalesced_frames;
|
intr_coal->rx_max_coalesced_frames;
|
||||||
|
@ -1730,9 +1804,10 @@ oct_cfg_rx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal)
|
||||||
oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no)) &
|
oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no)) &
|
||||||
(0x3fffff00000000UL)) |
|
(0x3fffff00000000UL)) |
|
||||||
rx_max_coalesced_frames);
|
rx_max_coalesced_frames);
|
||||||
/* consider writing to resend bit here */
|
/*consider writing to resend bit here*/
|
||||||
}
|
}
|
||||||
oct->intrmod.rx_frames = rx_max_coalesced_frames;
|
intrmod->rx_frames = rx_max_coalesced_frames;
|
||||||
|
oct->rx_max_coalesced_frames = rx_max_coalesced_frames;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
|
@ -1742,6 +1817,7 @@ oct_cfg_rx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int oct_cfg_rx_intrtime(struct lio *lio,
|
static int oct_cfg_rx_intrtime(struct lio *lio,
|
||||||
|
struct oct_intrmod_cfg *intrmod,
|
||||||
struct ethtool_coalesce *intr_coal)
|
struct ethtool_coalesce *intr_coal)
|
||||||
{
|
{
|
||||||
struct octeon_device *oct = lio->oct_dev;
|
struct octeon_device *oct = lio->oct_dev;
|
||||||
|
@ -1772,7 +1848,7 @@ static int oct_cfg_rx_intrtime(struct lio *lio,
|
||||||
int q_no;
|
int q_no;
|
||||||
|
|
||||||
if (!intr_coal->rx_coalesce_usecs)
|
if (!intr_coal->rx_coalesce_usecs)
|
||||||
rx_coalesce_usecs = oct->intrmod.rx_usecs;
|
rx_coalesce_usecs = intrmod->rx_usecs;
|
||||||
else
|
else
|
||||||
rx_coalesce_usecs = intr_coal->rx_coalesce_usecs;
|
rx_coalesce_usecs = intr_coal->rx_coalesce_usecs;
|
||||||
time_threshold =
|
time_threshold =
|
||||||
|
@ -1781,11 +1857,12 @@ static int oct_cfg_rx_intrtime(struct lio *lio,
|
||||||
q_no += oct->sriov_info.pf_srn;
|
q_no += oct->sriov_info.pf_srn;
|
||||||
octeon_write_csr64(oct,
|
octeon_write_csr64(oct,
|
||||||
CN23XX_SLI_OQ_PKT_INT_LEVELS(q_no),
|
CN23XX_SLI_OQ_PKT_INT_LEVELS(q_no),
|
||||||
(oct->intrmod.rx_frames |
|
(intrmod->rx_frames |
|
||||||
(time_threshold << 32)));
|
((u64)time_threshold << 32)));
|
||||||
/*consider writing to resend bit here*/
|
/*consider writing to resend bit here*/
|
||||||
}
|
}
|
||||||
oct->intrmod.rx_usecs = rx_coalesce_usecs;
|
intrmod->rx_usecs = rx_coalesce_usecs;
|
||||||
|
oct->rx_coalesce_usecs = rx_coalesce_usecs;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
case OCTEON_CN23XX_VF_VID: {
|
case OCTEON_CN23XX_VF_VID: {
|
||||||
|
@ -1793,7 +1870,7 @@ static int oct_cfg_rx_intrtime(struct lio *lio,
|
||||||
int q_no;
|
int q_no;
|
||||||
|
|
||||||
if (!intr_coal->rx_coalesce_usecs)
|
if (!intr_coal->rx_coalesce_usecs)
|
||||||
rx_coalesce_usecs = oct->intrmod.rx_usecs;
|
rx_coalesce_usecs = intrmod->rx_usecs;
|
||||||
else
|
else
|
||||||
rx_coalesce_usecs = intr_coal->rx_coalesce_usecs;
|
rx_coalesce_usecs = intr_coal->rx_coalesce_usecs;
|
||||||
|
|
||||||
|
@ -1802,11 +1879,12 @@ static int oct_cfg_rx_intrtime(struct lio *lio,
|
||||||
for (q_no = 0; q_no < oct->num_oqs; q_no++) {
|
for (q_no = 0; q_no < oct->num_oqs; q_no++) {
|
||||||
octeon_write_csr64(
|
octeon_write_csr64(
|
||||||
oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no),
|
oct, CN23XX_VF_SLI_OQ_PKT_INT_LEVELS(q_no),
|
||||||
(oct->intrmod.rx_frames |
|
(intrmod->rx_frames |
|
||||||
(time_threshold << 32)));
|
((u64)time_threshold << 32)));
|
||||||
/* consider setting resend bit */
|
/*consider setting resend bit*/
|
||||||
}
|
}
|
||||||
oct->intrmod.rx_usecs = rx_coalesce_usecs;
|
intrmod->rx_usecs = rx_coalesce_usecs;
|
||||||
|
oct->rx_coalesce_usecs = rx_coalesce_usecs;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
|
@ -1817,8 +1895,9 @@ static int oct_cfg_rx_intrtime(struct lio *lio,
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
oct_cfg_tx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal
|
oct_cfg_tx_intrcnt(struct lio *lio,
|
||||||
__attribute__((unused)))
|
struct oct_intrmod_cfg *intrmod,
|
||||||
|
struct ethtool_coalesce *intr_coal)
|
||||||
{
|
{
|
||||||
struct octeon_device *oct = lio->oct_dev;
|
struct octeon_device *oct = lio->oct_dev;
|
||||||
u32 iq_intr_pkt;
|
u32 iq_intr_pkt;
|
||||||
|
@ -1845,12 +1924,13 @@ oct_cfg_tx_intrcnt(struct lio *lio, struct ethtool_coalesce *intr_coal
|
||||||
val = readq(inst_cnt_reg);
|
val = readq(inst_cnt_reg);
|
||||||
/*clear wmark and count.dont want to write count back*/
|
/*clear wmark and count.dont want to write count back*/
|
||||||
val = (val & 0xFFFF000000000000ULL) |
|
val = (val & 0xFFFF000000000000ULL) |
|
||||||
((u64)iq_intr_pkt
|
((u64)(iq_intr_pkt - 1)
|
||||||
<< CN23XX_PKT_IN_DONE_WMARK_BIT_POS);
|
<< CN23XX_PKT_IN_DONE_WMARK_BIT_POS);
|
||||||
writeq(val, inst_cnt_reg);
|
writeq(val, inst_cnt_reg);
|
||||||
/*consider setting resend bit*/
|
/*consider setting resend bit*/
|
||||||
}
|
}
|
||||||
oct->intrmod.tx_frames = iq_intr_pkt;
|
intrmod->tx_frames = iq_intr_pkt;
|
||||||
|
oct->tx_max_coalesced_frames = iq_intr_pkt;
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
default:
|
default:
|
||||||
|
@ -1865,6 +1945,7 @@ static int lio_set_intr_coalesce(struct net_device *netdev,
|
||||||
struct lio *lio = GET_LIO(netdev);
|
struct lio *lio = GET_LIO(netdev);
|
||||||
int ret;
|
int ret;
|
||||||
struct octeon_device *oct = lio->oct_dev;
|
struct octeon_device *oct = lio->oct_dev;
|
||||||
|
struct oct_intrmod_cfg intrmod = {0};
|
||||||
u32 j, q_no;
|
u32 j, q_no;
|
||||||
int db_max, db_min;
|
int db_max, db_min;
|
||||||
|
|
||||||
|
@ -1883,8 +1964,8 @@ static int lio_set_intr_coalesce(struct net_device *netdev,
|
||||||
} else {
|
} else {
|
||||||
dev_err(&oct->pci_dev->dev,
|
dev_err(&oct->pci_dev->dev,
|
||||||
"LIQUIDIO: Invalid tx-frames:%d. Range is min:%d max:%d\n",
|
"LIQUIDIO: Invalid tx-frames:%d. Range is min:%d max:%d\n",
|
||||||
intr_coal->tx_max_coalesced_frames, db_min,
|
intr_coal->tx_max_coalesced_frames,
|
||||||
db_max);
|
db_min, db_max);
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
|
@ -1895,24 +1976,36 @@ static int lio_set_intr_coalesce(struct net_device *netdev,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
oct->intrmod.rx_enable = intr_coal->use_adaptive_rx_coalesce ? 1 : 0;
|
intrmod.rx_enable = intr_coal->use_adaptive_rx_coalesce ? 1 : 0;
|
||||||
oct->intrmod.tx_enable = intr_coal->use_adaptive_tx_coalesce ? 1 : 0;
|
intrmod.tx_enable = intr_coal->use_adaptive_tx_coalesce ? 1 : 0;
|
||||||
|
intrmod.rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
|
||||||
|
intrmod.rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
|
||||||
|
intrmod.tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
|
||||||
|
|
||||||
ret = oct_cfg_adaptive_intr(lio, intr_coal);
|
ret = oct_cfg_adaptive_intr(lio, &intrmod, intr_coal);
|
||||||
|
|
||||||
if (!intr_coal->use_adaptive_rx_coalesce) {
|
if (!intr_coal->use_adaptive_rx_coalesce) {
|
||||||
ret = oct_cfg_rx_intrtime(lio, intr_coal);
|
ret = oct_cfg_rx_intrtime(lio, &intrmod, intr_coal);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto ret_intrmod;
|
goto ret_intrmod;
|
||||||
|
|
||||||
ret = oct_cfg_rx_intrcnt(lio, intr_coal);
|
ret = oct_cfg_rx_intrcnt(lio, &intrmod, intr_coal);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto ret_intrmod;
|
goto ret_intrmod;
|
||||||
|
} else {
|
||||||
|
oct->rx_coalesce_usecs =
|
||||||
|
CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
|
||||||
|
oct->rx_max_coalesced_frames =
|
||||||
|
CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!intr_coal->use_adaptive_tx_coalesce) {
|
if (!intr_coal->use_adaptive_tx_coalesce) {
|
||||||
ret = oct_cfg_tx_intrcnt(lio, intr_coal);
|
ret = oct_cfg_tx_intrcnt(lio, &intrmod, intr_coal);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto ret_intrmod;
|
goto ret_intrmod;
|
||||||
|
} else {
|
||||||
|
oct->tx_max_coalesced_frames =
|
||||||
|
CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
|
@ -4320,7 +4320,6 @@ static int liquidio_enable_sriov(struct pci_dev *dev, int num_vfs)
|
||||||
*/
|
*/
|
||||||
static int liquidio_init_nic_module(struct octeon_device *oct)
|
static int liquidio_init_nic_module(struct octeon_device *oct)
|
||||||
{
|
{
|
||||||
struct oct_intrmod_cfg *intrmod_cfg;
|
|
||||||
int i, retval = 0;
|
int i, retval = 0;
|
||||||
int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct));
|
int num_nic_ports = CFG_GET_NUM_NIC_PORTS(octeon_get_conf(oct));
|
||||||
|
|
||||||
|
@ -4345,22 +4344,6 @@ static int liquidio_init_nic_module(struct octeon_device *oct)
|
||||||
|
|
||||||
liquidio_ptp_init(oct);
|
liquidio_ptp_init(oct);
|
||||||
|
|
||||||
/* Initialize interrupt moderation params */
|
|
||||||
intrmod_cfg = &((struct octeon_device *)oct)->intrmod;
|
|
||||||
intrmod_cfg->rx_enable = 1;
|
|
||||||
intrmod_cfg->check_intrvl = LIO_INTRMOD_CHECK_INTERVAL;
|
|
||||||
intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
|
|
||||||
intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
|
|
||||||
intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER;
|
|
||||||
intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER;
|
|
||||||
intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER;
|
|
||||||
intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER;
|
|
||||||
intrmod_cfg->tx_enable = 1;
|
|
||||||
intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER;
|
|
||||||
intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER;
|
|
||||||
intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
|
|
||||||
intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
|
|
||||||
intrmod_cfg->tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
|
|
||||||
dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
|
dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
|
||||||
|
|
||||||
return retval;
|
return retval;
|
||||||
|
|
|
@ -3057,7 +3057,6 @@ static int setup_nic_devices(struct octeon_device *octeon_dev)
|
||||||
*/
|
*/
|
||||||
static int liquidio_init_nic_module(struct octeon_device *oct)
|
static int liquidio_init_nic_module(struct octeon_device *oct)
|
||||||
{
|
{
|
||||||
struct oct_intrmod_cfg *intrmod_cfg;
|
|
||||||
int num_nic_ports = 1;
|
int num_nic_ports = 1;
|
||||||
int i, retval = 0;
|
int i, retval = 0;
|
||||||
|
|
||||||
|
@ -3079,22 +3078,6 @@ static int liquidio_init_nic_module(struct octeon_device *oct)
|
||||||
goto octnet_init_failure;
|
goto octnet_init_failure;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Initialize interrupt moderation params */
|
|
||||||
intrmod_cfg = &((struct octeon_device *)oct)->intrmod;
|
|
||||||
intrmod_cfg->rx_enable = 1;
|
|
||||||
intrmod_cfg->check_intrvl = LIO_INTRMOD_CHECK_INTERVAL;
|
|
||||||
intrmod_cfg->maxpkt_ratethr = LIO_INTRMOD_MAXPKT_RATETHR;
|
|
||||||
intrmod_cfg->minpkt_ratethr = LIO_INTRMOD_MINPKT_RATETHR;
|
|
||||||
intrmod_cfg->rx_maxcnt_trigger = LIO_INTRMOD_RXMAXCNT_TRIGGER;
|
|
||||||
intrmod_cfg->rx_maxtmr_trigger = LIO_INTRMOD_RXMAXTMR_TRIGGER;
|
|
||||||
intrmod_cfg->rx_mintmr_trigger = LIO_INTRMOD_RXMINTMR_TRIGGER;
|
|
||||||
intrmod_cfg->rx_mincnt_trigger = LIO_INTRMOD_RXMINCNT_TRIGGER;
|
|
||||||
intrmod_cfg->tx_enable = 1;
|
|
||||||
intrmod_cfg->tx_maxcnt_trigger = LIO_INTRMOD_TXMAXCNT_TRIGGER;
|
|
||||||
intrmod_cfg->tx_mincnt_trigger = LIO_INTRMOD_TXMINCNT_TRIGGER;
|
|
||||||
intrmod_cfg->rx_frames = CFG_GET_OQ_INTR_PKT(octeon_get_conf(oct));
|
|
||||||
intrmod_cfg->rx_usecs = CFG_GET_OQ_INTR_TIME(octeon_get_conf(oct));
|
|
||||||
intrmod_cfg->tx_frames = CFG_GET_IQ_INTR_PKT(octeon_get_conf(oct));
|
|
||||||
dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
|
dev_dbg(&oct->pci_dev->dev, "Network interfaces ready\n");
|
||||||
|
|
||||||
return retval;
|
return retval;
|
||||||
|
|
|
@ -27,7 +27,7 @@
|
||||||
|
|
||||||
#define LIQUIDIO_PACKAGE ""
|
#define LIQUIDIO_PACKAGE ""
|
||||||
#define LIQUIDIO_BASE_MAJOR_VERSION 1
|
#define LIQUIDIO_BASE_MAJOR_VERSION 1
|
||||||
#define LIQUIDIO_BASE_MINOR_VERSION 4
|
#define LIQUIDIO_BASE_MINOR_VERSION 5
|
||||||
#define LIQUIDIO_BASE_MICRO_VERSION 1
|
#define LIQUIDIO_BASE_MICRO_VERSION 1
|
||||||
#define LIQUIDIO_BASE_VERSION __stringify(LIQUIDIO_BASE_MAJOR_VERSION) "." \
|
#define LIQUIDIO_BASE_VERSION __stringify(LIQUIDIO_BASE_MAJOR_VERSION) "." \
|
||||||
__stringify(LIQUIDIO_BASE_MINOR_VERSION)
|
__stringify(LIQUIDIO_BASE_MINOR_VERSION)
|
||||||
|
@ -83,6 +83,7 @@ enum octeon_tag_type {
|
||||||
#define OPCODE_NIC_INTRMOD_CFG 0x08
|
#define OPCODE_NIC_INTRMOD_CFG 0x08
|
||||||
#define OPCODE_NIC_IF_CFG 0x09
|
#define OPCODE_NIC_IF_CFG 0x09
|
||||||
#define OPCODE_NIC_VF_DRV_NOTICE 0x0A
|
#define OPCODE_NIC_VF_DRV_NOTICE 0x0A
|
||||||
|
#define OPCODE_NIC_INTRMOD_PARAMS 0x0B
|
||||||
#define VF_DRV_LOADED 1
|
#define VF_DRV_LOADED 1
|
||||||
#define VF_DRV_REMOVED -1
|
#define VF_DRV_REMOVED -1
|
||||||
#define VF_DRV_MACADDR_CHANGED 2
|
#define VF_DRV_MACADDR_CHANGED 2
|
||||||
|
@ -851,29 +852,6 @@ struct oct_mdio_cmd {
|
||||||
|
|
||||||
#define OCT_LINK_STATS_SIZE (sizeof(struct oct_link_stats))
|
#define OCT_LINK_STATS_SIZE (sizeof(struct oct_link_stats))
|
||||||
|
|
||||||
/* intrmod: max. packet rate threshold */
|
|
||||||
#define LIO_INTRMOD_MAXPKT_RATETHR 196608
|
|
||||||
/* intrmod: min. packet rate threshold */
|
|
||||||
#define LIO_INTRMOD_MINPKT_RATETHR 9216
|
|
||||||
/* intrmod: max. packets to trigger interrupt */
|
|
||||||
#define LIO_INTRMOD_RXMAXCNT_TRIGGER 384
|
|
||||||
/* intrmod: min. packets to trigger interrupt */
|
|
||||||
#define LIO_INTRMOD_RXMINCNT_TRIGGER 0
|
|
||||||
/* intrmod: max. time to trigger interrupt */
|
|
||||||
#define LIO_INTRMOD_RXMAXTMR_TRIGGER 128
|
|
||||||
/* 66xx:intrmod: min. time to trigger interrupt
|
|
||||||
* (value of 1 is optimum for TCP_RR)
|
|
||||||
*/
|
|
||||||
#define LIO_INTRMOD_RXMINTMR_TRIGGER 1
|
|
||||||
|
|
||||||
/* intrmod: max. packets to trigger interrupt */
|
|
||||||
#define LIO_INTRMOD_TXMAXCNT_TRIGGER 64
|
|
||||||
/* intrmod: min. packets to trigger interrupt */
|
|
||||||
#define LIO_INTRMOD_TXMINCNT_TRIGGER 0
|
|
||||||
|
|
||||||
/* intrmod: poll interval in seconds */
|
|
||||||
#define LIO_INTRMOD_CHECK_INTERVAL 1
|
|
||||||
|
|
||||||
struct oct_intrmod_cfg {
|
struct oct_intrmod_cfg {
|
||||||
u64 rx_enable;
|
u64 rx_enable;
|
||||||
u64 tx_enable;
|
u64 tx_enable;
|
||||||
|
|
|
@ -453,9 +453,6 @@ struct octeon_device {
|
||||||
/** List of dispatch functions */
|
/** List of dispatch functions */
|
||||||
struct octeon_dispatch_list dispatch;
|
struct octeon_dispatch_list dispatch;
|
||||||
|
|
||||||
/* Interrupt Moderation */
|
|
||||||
struct oct_intrmod_cfg intrmod;
|
|
||||||
|
|
||||||
u32 int_status;
|
u32 int_status;
|
||||||
|
|
||||||
u64 droq_intr;
|
u64 droq_intr;
|
||||||
|
@ -541,6 +538,10 @@ struct octeon_device {
|
||||||
u32 priv_flags;
|
u32 priv_flags;
|
||||||
|
|
||||||
void *watchdog_task;
|
void *watchdog_task;
|
||||||
|
|
||||||
|
u32 rx_coalesce_usecs;
|
||||||
|
u32 rx_max_coalesced_frames;
|
||||||
|
u32 tx_max_coalesced_frames;
|
||||||
};
|
};
|
||||||
|
|
||||||
#define OCT_DRV_ONLINE 1
|
#define OCT_DRV_ONLINE 1
|
||||||
|
@ -554,12 +555,6 @@ struct octeon_device {
|
||||||
#define CHIP_CONF(oct, TYPE) \
|
#define CHIP_CONF(oct, TYPE) \
|
||||||
(((struct octeon_ ## TYPE *)((oct)->chip))->conf)
|
(((struct octeon_ ## TYPE *)((oct)->chip))->conf)
|
||||||
|
|
||||||
struct oct_intrmod_cmd {
|
|
||||||
struct octeon_device *oct_dev;
|
|
||||||
struct octeon_soft_command *sc;
|
|
||||||
struct oct_intrmod_cfg *cfg;
|
|
||||||
};
|
|
||||||
|
|
||||||
/*------------------ Function Prototypes ----------------------*/
|
/*------------------ Function Prototypes ----------------------*/
|
||||||
|
|
||||||
/** Initialize device list memory */
|
/** Initialize device list memory */
|
||||||
|
|
Loading…
Reference in New Issue