mirror of https://gitee.com/openkylin/linux.git
Merge remote-tracking branches 'asoc/topic/rcar', 'asoc/topic/rl6347a', 'asoc/topic/rockchip' and 'asoc/topic/rt286' into asoc-next
This commit is contained in:
Mark Brown
commit
512def88cb
|
|
@ -12,8 +12,6 @@ Required properties:
|
|||
- reg: physical base address of the controller and length of memory mapped
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||||
region.
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||||
- interrupts: should contain the I2S interrupt.
|
||||
- #address-cells: should be 1.
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- #size-cells: should be 0.
|
||||
- dmas: DMA specifiers for tx and rx dma. See the DMA client binding,
|
||||
Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: should include "tx" and "rx".
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||||
|
|
@ -21,6 +19,7 @@ Required properties:
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|||
- clock-names: should contain followings:
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- "i2s_hclk": clock for I2S BUS
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- "i2s_clk" : clock for I2S controller
|
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- rockchip,capture-channels: max capture channels, if not set, 2 channels default.
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Example for rk3288 I2S controller:
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|
|
@ -28,10 +27,9 @@ i2s@ff890000 {
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compatible = "rockchip,rk3288-i2s", "rockchip,rk3066-i2s";
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reg = <0xff890000 0x10000>;
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interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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dmas = <&pdma1 0>, <&pdma1 1>;
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dma-names = "tx", "rx";
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clock-names = "i2s_hclk", "i2s_clk";
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clocks = <&cru HCLK_I2S0>, <&cru SCLK_I2S0>;
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rockchip,capture-channels = <2>;
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};
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|
|
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|
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@ -0,0 +1,40 @@
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* Rockchip SPDIF transceiver
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|
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The S/PDIF audio block is a stereo transceiver that allows the
|
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processor to receive and transmit digital audio via an coaxial cable or
|
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a fibre cable.
|
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|
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Required properties:
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|
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- compatible: should be one of the following:
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- "rockchip,rk3288-spdif", "rockchip,rk3188-spdif" or
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"rockchip,rk3066-spdif"
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- reg: physical base address of the controller and length of memory mapped
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region.
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- interrupts: should contain the SPDIF interrupt.
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- dmas: DMA specifiers for tx dma. See the DMA client binding,
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Documentation/devicetree/bindings/dma/dma.txt
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- dma-names: should be "tx"
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- clocks: a list of phandle + clock-specifier pairs, one for each entry
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in clock-names.
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- clock-names: should contain following:
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- "hclk": clock for SPDIF controller
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- "mclk" : clock for SPDIF bus
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|
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Required properties on RK3288:
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- rockchip,grf: the phandle of the syscon node for the general register
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file (GRF)
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|
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Example for the rk3188 SPDIF controller:
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spdif: spdif@0x1011e000 {
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compatible = "rockchip,rk3188-spdif", "rockchip,rk3066-spdif";
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reg = <0x1011e000 0x2000>;
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interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&dmac1_s 8>;
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dma-names = "tx";
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clock-names = "hclk", "mclk";
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clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
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status = "disabled";
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#sound-dai-cells = <0>;
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};
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@ -11,25 +11,8 @@
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/pm.h>
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#include <linux/i2c.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/dmi.h>
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#include <linux/acpi.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include <sound/jack.h>
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#include <linux/workqueue.h>
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#include <sound/hda_verbs.h>
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#include <linux/regmap.h>
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|
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#include "rl6347a.h"
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|
|
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|
|
@ -12,6 +12,8 @@
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#ifndef __RL6347A_H__
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#define __RL6347A_H__
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#include <sound/hda_verbs.h>
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|
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#define VERB_CMD(V, N, D) ((N << 20) | (V << 8) | D)
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|
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#define RL6347A_VENDOR_REGISTERS 0x20
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|
|
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|
|
@ -29,7 +29,6 @@
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#include <sound/jack.h>
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#include <linux/workqueue.h>
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#include <sound/rt286.h>
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#include <sound/hda_verbs.h>
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|
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#include "rl6347a.h"
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#include "rt286.h"
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|
|
@ -38,7 +37,7 @@
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#define RT288_VENDOR_ID 0x10ec0288
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|
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struct rt286_priv {
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const struct reg_default *index_cache;
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struct reg_default *index_cache;
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int index_cache_size;
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struct regmap *regmap;
|
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struct snd_soc_codec *codec;
|
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|
|
@ -1161,7 +1160,11 @@ static int rt286_i2c_probe(struct i2c_client *i2c,
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return -ENODEV;
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}
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|
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rt286->index_cache = rt286_index_def;
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rt286->index_cache = devm_kmemdup(&i2c->dev, rt286_index_def,
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sizeof(rt286_index_def), GFP_KERNEL);
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if (!rt286->index_cache)
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return -ENOMEM;
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rt286->index_cache_size = INDEX_CACHE_SIZE;
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rt286->i2c = i2c;
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i2c_set_clientdata(i2c, rt286);
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|
|
|
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|
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@ -28,7 +28,6 @@
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#include <sound/jack.h>
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#include <linux/workqueue.h>
|
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#include <sound/rt298.h>
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#include <sound/hda_verbs.h>
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|
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#include "rl6347a.h"
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#include "rt298.h"
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|
|
|
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|
|
@ -15,6 +15,14 @@ config SND_SOC_ROCKCHIP_I2S
|
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Rockchip I2S device. The device supports upto maximum of
|
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8 channels each for play and record.
|
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|
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config SND_SOC_ROCKCHIP_SPDIF
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tristate "Rockchip SPDIF Device Driver"
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depends on CLKDEV_LOOKUP && SND_SOC_ROCKCHIP
|
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select SND_SOC_GENERIC_DMAENGINE_PCM
|
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help
|
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Say Y or M if you want to add support for SPDIF driver for
|
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Rockchip SPDIF transceiver device.
|
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|
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config SND_SOC_ROCKCHIP_MAX98090
|
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tristate "ASoC support for Rockchip boards using a MAX98090 codec"
|
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depends on SND_SOC_ROCKCHIP && I2C && GPIOLIB && CLKDEV_LOOKUP
|
||||
|
|
|
|||
|
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@ -1,7 +1,9 @@
|
|||
# ROCKCHIP Platform Support
|
||||
snd-soc-i2s-objs := rockchip_i2s.o
|
||||
snd-soc-rockchip-i2s-objs := rockchip_i2s.o
|
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snd-soc-rockchip-spdif-objs := rockchip_spdif.o
|
||||
|
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obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S) += snd-soc-i2s.o
|
||||
obj-$(CONFIG_SND_SOC_ROCKCHIP_I2S) += snd-soc-rockchip-i2s.o
|
||||
obj-$(CONFIG_SND_SOC_ROCKCHIP_SPDIF) += snd-soc-rockchip-spdif.o
|
||||
|
||||
snd-soc-rockchip-max98090-objs := rockchip_max98090.o
|
||||
snd-soc-rockchip-rt5645-objs := rockchip_rt5645.o
|
||||
|
|
|
|||
|
|
@ -226,6 +226,7 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
|
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struct snd_soc_dai *dai)
|
||||
{
|
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struct rk_i2s_dev *i2s = to_info(dai);
|
||||
struct snd_soc_pcm_runtime *rtd = substream->private_data;
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unsigned int val = 0;
|
||||
|
||||
switch (params_format(params)) {
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|
|
@ -245,13 +246,46 @@ static int rockchip_i2s_hw_params(struct snd_pcm_substream *substream,
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return -EINVAL;
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}
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regmap_update_bits(i2s->regmap, I2S_TXCR, I2S_TXCR_VDW_MASK, val);
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regmap_update_bits(i2s->regmap, I2S_RXCR, I2S_RXCR_VDW_MASK, val);
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switch (params_channels(params)) {
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case 8:
|
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val |= I2S_CHN_8;
|
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break;
|
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case 6:
|
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val |= I2S_CHN_6;
|
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break;
|
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case 4:
|
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val |= I2S_CHN_4;
|
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break;
|
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case 2:
|
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val |= I2S_CHN_2;
|
||||
break;
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default:
|
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dev_err(i2s->dev, "invalid channel: %d\n",
|
||||
params_channels(params));
|
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return -EINVAL;
|
||||
}
|
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|
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
|
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regmap_update_bits(i2s->regmap, I2S_RXCR,
|
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I2S_RXCR_VDW_MASK | I2S_RXCR_CSR_MASK,
|
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val);
|
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else
|
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regmap_update_bits(i2s->regmap, I2S_TXCR,
|
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I2S_TXCR_VDW_MASK | I2S_TXCR_CSR_MASK,
|
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val);
|
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|
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regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_TDL_MASK,
|
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I2S_DMACR_TDL(16));
|
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regmap_update_bits(i2s->regmap, I2S_DMACR, I2S_DMACR_RDL_MASK,
|
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I2S_DMACR_RDL(16));
|
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|
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val = I2S_CKR_TRCM_TXRX;
|
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if (dai->driver->symmetric_rates || rtd->dai_link->symmetric_rates)
|
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val = I2S_CKR_TRCM_TXSHARE;
|
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|
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regmap_update_bits(i2s->regmap, I2S_CKR,
|
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I2S_CKR_TRCM_MASK,
|
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val);
|
||||
return 0;
|
||||
}
|
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|
||||
|
|
@ -415,10 +449,12 @@ static const struct regmap_config rockchip_i2s_regmap_config = {
|
|||
|
||||
static int rockchip_i2s_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *node = pdev->dev.of_node;
|
||||
struct rk_i2s_dev *i2s;
|
||||
struct resource *res;
|
||||
void __iomem *regs;
|
||||
int ret;
|
||||
int val;
|
||||
|
||||
i2s = devm_kzalloc(&pdev->dev, sizeof(*i2s), GFP_KERNEL);
|
||||
if (!i2s) {
|
||||
|
|
@ -475,6 +511,14 @@ static int rockchip_i2s_probe(struct platform_device *pdev)
|
|||
goto err_pm_disable;
|
||||
}
|
||||
|
||||
/* refine capture channels */
|
||||
if (!of_property_read_u32(node, "rockchip,capture-channels", &val)) {
|
||||
if (val >= 2 && val <= 8)
|
||||
rockchip_i2s_dai.capture.channels_max = val;
|
||||
else
|
||||
rockchip_i2s_dai.capture.channels_max = 2;
|
||||
}
|
||||
|
||||
ret = devm_snd_soc_register_component(&pdev->dev,
|
||||
&rockchip_i2s_component,
|
||||
&rockchip_i2s_dai, 1);
|
||||
|
|
|
|||
|
|
@ -49,6 +49,9 @@
|
|||
* RXCR
|
||||
* receive operation control register
|
||||
*/
|
||||
#define I2S_RXCR_CSR_SHIFT 15
|
||||
#define I2S_RXCR_CSR(x) (x << I2S_RXCR_CSR_SHIFT)
|
||||
#define I2S_RXCR_CSR_MASK (3 << I2S_RXCR_CSR_SHIFT)
|
||||
#define I2S_RXCR_HWT BIT(14)
|
||||
#define I2S_RXCR_SJM_SHIFT 12
|
||||
#define I2S_RXCR_SJM_R (0 << I2S_RXCR_SJM_SHIFT)
|
||||
|
|
@ -75,6 +78,12 @@
|
|||
* CKR
|
||||
* clock generation register
|
||||
*/
|
||||
#define I2S_CKR_TRCM_SHIFT 28
|
||||
#define I2S_CKR_TRCM(x) (x << I2S_CKR_TRCM_SHIFT)
|
||||
#define I2S_CKR_TRCM_TXRX (0 << I2S_CKR_TRCM_SHIFT)
|
||||
#define I2S_CKR_TRCM_TXSHARE (1 << I2S_CKR_TRCM_SHIFT)
|
||||
#define I2S_CKR_TRCM_RXSHARE (2 << I2S_CKR_TRCM_SHIFT)
|
||||
#define I2S_CKR_TRCM_MASK (3 << I2S_CKR_TRCM_SHIFT)
|
||||
#define I2S_CKR_MSS_SHIFT 27
|
||||
#define I2S_CKR_MSS_MASTER (0 << I2S_CKR_MSS_SHIFT)
|
||||
#define I2S_CKR_MSS_SLAVE (1 << I2S_CKR_MSS_SHIFT)
|
||||
|
|
@ -207,6 +216,13 @@ enum {
|
|||
ROCKCHIP_DIV_BCLK,
|
||||
};
|
||||
|
||||
/* channel select */
|
||||
#define I2S_CSR_SHIFT 15
|
||||
#define I2S_CHN_2 (0 << I2S_CSR_SHIFT)
|
||||
#define I2S_CHN_4 (1 << I2S_CSR_SHIFT)
|
||||
#define I2S_CHN_6 (2 << I2S_CSR_SHIFT)
|
||||
#define I2S_CHN_8 (3 << I2S_CSR_SHIFT)
|
||||
|
||||
/* I2S REGS */
|
||||
#define I2S_TXCR (0x0000)
|
||||
#define I2S_RXCR (0x0004)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,405 @@
|
|||
/* sound/soc/rockchip/rk_spdif.c
|
||||
*
|
||||
* ALSA SoC Audio Layer - Rockchip I2S Controller driver
|
||||
*
|
||||
* Copyright (c) 2014 Rockchip Electronics Co. Ltd.
|
||||
* Author: Jianqun <jay.xu@rock-chips.com>
|
||||
* Copyright (c) 2015 Collabora Ltd.
|
||||
* Author: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <linux/module.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/of_gpio.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/pm_runtime.h>
|
||||
#include <linux/mfd/syscon.h>
|
||||
#include <linux/regmap.h>
|
||||
#include <sound/pcm_params.h>
|
||||
#include <sound/dmaengine_pcm.h>
|
||||
|
||||
#include "rockchip_spdif.h"
|
||||
|
||||
enum rk_spdif_type {
|
||||
RK_SPDIF_RK3066,
|
||||
RK_SPDIF_RK3188,
|
||||
RK_SPDIF_RK3288,
|
||||
};
|
||||
|
||||
#define RK3288_GRF_SOC_CON2 0x24c
|
||||
|
||||
struct rk_spdif_dev {
|
||||
struct device *dev;
|
||||
|
||||
struct clk *mclk;
|
||||
struct clk *hclk;
|
||||
|
||||
struct snd_dmaengine_dai_dma_data playback_dma_data;
|
||||
|
||||
struct regmap *regmap;
|
||||
};
|
||||
|
||||
static const struct of_device_id rk_spdif_match[] = {
|
||||
{ .compatible = "rockchip,rk3066-spdif",
|
||||
.data = (void *) RK_SPDIF_RK3066 },
|
||||
{ .compatible = "rockchip,rk3188-spdif",
|
||||
.data = (void *) RK_SPDIF_RK3188 },
|
||||
{ .compatible = "rockchip,rk3288-spdif",
|
||||
.data = (void *) RK_SPDIF_RK3288 },
|
||||
{},
|
||||
};
|
||||
MODULE_DEVICE_TABLE(of, rk_spdif_match);
|
||||
|
||||
static int rk_spdif_runtime_suspend(struct device *dev)
|
||||
{
|
||||
struct rk_spdif_dev *spdif = dev_get_drvdata(dev);
|
||||
|
||||
clk_disable_unprepare(spdif->mclk);
|
||||
clk_disable_unprepare(spdif->hclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rk_spdif_runtime_resume(struct device *dev)
|
||||
{
|
||||
struct rk_spdif_dev *spdif = dev_get_drvdata(dev);
|
||||
int ret;
|
||||
|
||||
ret = clk_prepare_enable(spdif->mclk);
|
||||
if (ret) {
|
||||
dev_err(spdif->dev, "mclk clock enable failed %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(spdif->hclk);
|
||||
if (ret) {
|
||||
dev_err(spdif->dev, "hclk clock enable failed %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int rk_spdif_hw_params(struct snd_pcm_substream *substream,
|
||||
struct snd_pcm_hw_params *params,
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
|
||||
unsigned int val = SPDIF_CFGR_HALFWORD_ENABLE;
|
||||
int srate, mclk;
|
||||
int ret;
|
||||
|
||||
srate = params_rate(params);
|
||||
switch (srate) {
|
||||
case 32000:
|
||||
case 48000:
|
||||
case 96000:
|
||||
mclk = 96000 * 128; /* 12288000 hz */
|
||||
break;
|
||||
case 44100:
|
||||
mclk = 44100 * 256; /* 11289600 hz */
|
||||
break;
|
||||
case 192000:
|
||||
mclk = 192000 * 128; /* 24576000 hz */
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
switch (params_format(params)) {
|
||||
case SNDRV_PCM_FORMAT_S16_LE:
|
||||
val |= SPDIF_CFGR_VDW_16;
|
||||
break;
|
||||
case SNDRV_PCM_FORMAT_S20_3LE:
|
||||
val |= SPDIF_CFGR_VDW_20;
|
||||
break;
|
||||
case SNDRV_PCM_FORMAT_S24_LE:
|
||||
val |= SPDIF_CFGR_VDW_24;
|
||||
break;
|
||||
default:
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
/* Set clock and calculate divider */
|
||||
ret = clk_set_rate(spdif->mclk, mclk);
|
||||
if (ret != 0) {
|
||||
dev_err(spdif->dev, "Failed to set module clock rate: %d\n",
|
||||
ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
val |= SPDIF_CFGR_CLK_DIV(mclk/(srate * 256));
|
||||
ret = regmap_update_bits(spdif->regmap, SPDIF_CFGR,
|
||||
SPDIF_CFGR_CLK_DIV_MASK | SPDIF_CFGR_HALFWORD_ENABLE |
|
||||
SDPIF_CFGR_VDW_MASK,
|
||||
val);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rk_spdif_trigger(struct snd_pcm_substream *substream,
|
||||
int cmd, struct snd_soc_dai *dai)
|
||||
{
|
||||
struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
|
||||
int ret;
|
||||
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
case SNDRV_PCM_TRIGGER_RESUME:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
||||
ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,
|
||||
SPDIF_DMACR_TDE_ENABLE,
|
||||
SPDIF_DMACR_TDE_ENABLE);
|
||||
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,
|
||||
SPDIF_XFER_TXS_START,
|
||||
SPDIF_XFER_TXS_START);
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||
ret = regmap_update_bits(spdif->regmap, SPDIF_DMACR,
|
||||
SPDIF_DMACR_TDE_ENABLE,
|
||||
SPDIF_DMACR_TDE_DISABLE);
|
||||
|
||||
if (ret != 0)
|
||||
return ret;
|
||||
|
||||
ret = regmap_update_bits(spdif->regmap, SPDIF_XFER,
|
||||
SPDIF_XFER_TXS_START,
|
||||
SPDIF_XFER_TXS_STOP);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
break;
|
||||
}
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rk_spdif_dai_probe(struct snd_soc_dai *dai)
|
||||
{
|
||||
struct rk_spdif_dev *spdif = snd_soc_dai_get_drvdata(dai);
|
||||
|
||||
dai->playback_dma_data = &spdif->playback_dma_data;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct snd_soc_dai_ops rk_spdif_dai_ops = {
|
||||
.hw_params = rk_spdif_hw_params,
|
||||
.trigger = rk_spdif_trigger,
|
||||
};
|
||||
|
||||
static struct snd_soc_dai_driver rk_spdif_dai = {
|
||||
.probe = rk_spdif_dai_probe,
|
||||
.playback = {
|
||||
.stream_name = "Playback",
|
||||
.channels_min = 2,
|
||||
.channels_max = 2,
|
||||
.rates = (SNDRV_PCM_RATE_32000 |
|
||||
SNDRV_PCM_RATE_44100 |
|
||||
SNDRV_PCM_RATE_48000 |
|
||||
SNDRV_PCM_RATE_96000 |
|
||||
SNDRV_PCM_RATE_192000),
|
||||
.formats = (SNDRV_PCM_FMTBIT_S16_LE |
|
||||
SNDRV_PCM_FMTBIT_S20_3LE |
|
||||
SNDRV_PCM_FMTBIT_S24_LE),
|
||||
},
|
||||
.ops = &rk_spdif_dai_ops,
|
||||
};
|
||||
|
||||
static const struct snd_soc_component_driver rk_spdif_component = {
|
||||
.name = "rockchip-spdif",
|
||||
};
|
||||
|
||||
static bool rk_spdif_wr_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case SPDIF_CFGR:
|
||||
case SPDIF_DMACR:
|
||||
case SPDIF_INTCR:
|
||||
case SPDIF_XFER:
|
||||
case SPDIF_SMPDR:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static bool rk_spdif_rd_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case SPDIF_CFGR:
|
||||
case SPDIF_SDBLR:
|
||||
case SPDIF_INTCR:
|
||||
case SPDIF_INTSR:
|
||||
case SPDIF_XFER:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static bool rk_spdif_volatile_reg(struct device *dev, unsigned int reg)
|
||||
{
|
||||
switch (reg) {
|
||||
case SPDIF_INTSR:
|
||||
case SPDIF_SDBLR:
|
||||
return true;
|
||||
default:
|
||||
return false;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct regmap_config rk_spdif_regmap_config = {
|
||||
.reg_bits = 32,
|
||||
.reg_stride = 4,
|
||||
.val_bits = 32,
|
||||
.max_register = SPDIF_SMPDR,
|
||||
.writeable_reg = rk_spdif_wr_reg,
|
||||
.readable_reg = rk_spdif_rd_reg,
|
||||
.volatile_reg = rk_spdif_volatile_reg,
|
||||
.cache_type = REGCACHE_FLAT,
|
||||
};
|
||||
|
||||
static int rk_spdif_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct device_node *np = pdev->dev.of_node;
|
||||
struct rk_spdif_dev *spdif;
|
||||
const struct of_device_id *match;
|
||||
struct resource *res;
|
||||
void __iomem *regs;
|
||||
int ret;
|
||||
|
||||
match = of_match_node(rk_spdif_match, np);
|
||||
if ((int) match->data == RK_SPDIF_RK3288) {
|
||||
struct regmap *grf;
|
||||
|
||||
grf = syscon_regmap_lookup_by_phandle(np, "rockchip,grf");
|
||||
if (IS_ERR(grf)) {
|
||||
dev_err(&pdev->dev,
|
||||
"rockchip_spdif missing 'rockchip,grf' \n");
|
||||
return PTR_ERR(grf);
|
||||
}
|
||||
|
||||
/* Select the 8 channel SPDIF solution on RK3288 as
|
||||
* the 2 channel one does not appear to work
|
||||
*/
|
||||
regmap_write(grf, RK3288_GRF_SOC_CON2, BIT(1) << 16);
|
||||
}
|
||||
|
||||
spdif = devm_kzalloc(&pdev->dev, sizeof(*spdif), GFP_KERNEL);
|
||||
if (!spdif)
|
||||
return -ENOMEM;
|
||||
|
||||
spdif->hclk = devm_clk_get(&pdev->dev, "hclk");
|
||||
if (IS_ERR(spdif->hclk)) {
|
||||
dev_err(&pdev->dev, "Can't retrieve rk_spdif bus clock\n");
|
||||
return PTR_ERR(spdif->hclk);
|
||||
}
|
||||
ret = clk_prepare_enable(spdif->hclk);
|
||||
if (ret) {
|
||||
dev_err(spdif->dev, "hclock enable failed %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
spdif->mclk = devm_clk_get(&pdev->dev, "mclk");
|
||||
if (IS_ERR(spdif->mclk)) {
|
||||
dev_err(&pdev->dev, "Can't retrieve rk_spdif master clock\n");
|
||||
return PTR_ERR(spdif->mclk);
|
||||
}
|
||||
|
||||
ret = clk_prepare_enable(spdif->mclk);
|
||||
if (ret) {
|
||||
dev_err(spdif->dev, "clock enable failed %d\n", ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||
regs = devm_ioremap_resource(&pdev->dev, res);
|
||||
if (IS_ERR(regs))
|
||||
return PTR_ERR(regs);
|
||||
|
||||
spdif->regmap = devm_regmap_init_mmio_clk(&pdev->dev, "hclk", regs,
|
||||
&rk_spdif_regmap_config);
|
||||
if (IS_ERR(spdif->regmap)) {
|
||||
dev_err(&pdev->dev,
|
||||
"Failed to initialise managed register map\n");
|
||||
return PTR_ERR(spdif->regmap);
|
||||
}
|
||||
|
||||
spdif->playback_dma_data.addr = res->start + SPDIF_SMPDR;
|
||||
spdif->playback_dma_data.addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES;
|
||||
spdif->playback_dma_data.maxburst = 4;
|
||||
|
||||
spdif->dev = &pdev->dev;
|
||||
dev_set_drvdata(&pdev->dev, spdif);
|
||||
|
||||
pm_runtime_set_active(&pdev->dev);
|
||||
pm_runtime_enable(&pdev->dev);
|
||||
pm_request_idle(&pdev->dev);
|
||||
|
||||
ret = devm_snd_soc_register_component(&pdev->dev,
|
||||
&rk_spdif_component,
|
||||
&rk_spdif_dai, 1);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Could not register DAI\n");
|
||||
goto err_pm_runtime;
|
||||
}
|
||||
|
||||
ret = devm_snd_dmaengine_pcm_register(&pdev->dev, NULL, 0);
|
||||
if (ret) {
|
||||
dev_err(&pdev->dev, "Could not register PCM\n");
|
||||
goto err_pm_runtime;
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
||||
err_pm_runtime:
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int rk_spdif_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct rk_spdif_dev *spdif = dev_get_drvdata(&pdev->dev);
|
||||
|
||||
pm_runtime_disable(&pdev->dev);
|
||||
if (!pm_runtime_status_suspended(&pdev->dev))
|
||||
rk_spdif_runtime_suspend(&pdev->dev);
|
||||
|
||||
clk_disable_unprepare(spdif->mclk);
|
||||
clk_disable_unprepare(spdif->hclk);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct dev_pm_ops rk_spdif_pm_ops = {
|
||||
SET_RUNTIME_PM_OPS(rk_spdif_runtime_suspend, rk_spdif_runtime_resume,
|
||||
NULL)
|
||||
};
|
||||
|
||||
static struct platform_driver rk_spdif_driver = {
|
||||
.probe = rk_spdif_probe,
|
||||
.remove = rk_spdif_remove,
|
||||
.driver = {
|
||||
.name = "rockchip-spdif",
|
||||
.of_match_table = of_match_ptr(rk_spdif_match),
|
||||
.pm = &rk_spdif_pm_ops,
|
||||
},
|
||||
};
|
||||
module_platform_driver(rk_spdif_driver);
|
||||
|
||||
MODULE_ALIAS("platform:rockchip-spdif");
|
||||
MODULE_DESCRIPTION("ROCKCHIP SPDIF transceiver Interface");
|
||||
MODULE_AUTHOR("Sjoerd Simons <sjoerd.simons@collabora.co.uk>");
|
||||
MODULE_LICENSE("GPL v2");
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
/*
|
||||
* ALSA SoC Audio Layer - Rockchip SPDIF transceiver driver
|
||||
*
|
||||
* Copyright (c) 2015 Collabora Ltd.
|
||||
* Author: Sjoerd Simons <sjoerd.simons@collabora.co.uk>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
#ifndef _ROCKCHIP_SPDIF_H
|
||||
#define _ROCKCHIP_SPDIF_H
|
||||
|
||||
/*
|
||||
* CFGR
|
||||
* transfer configuration register
|
||||
*/
|
||||
#define SPDIF_CFGR_CLK_DIV_SHIFT (16)
|
||||
#define SPDIF_CFGR_CLK_DIV_MASK (0xff << SPDIF_CFGR_CLK_DIV_SHIFT)
|
||||
#define SPDIF_CFGR_CLK_DIV(x) (x << SPDIF_CFGR_CLK_DIV_SHIFT)
|
||||
|
||||
#define SPDIF_CFGR_HALFWORD_SHIFT 2
|
||||
#define SPDIF_CFGR_HALFWORD_DISABLE (0 << SPDIF_CFGR_HALFWORD_SHIFT)
|
||||
#define SPDIF_CFGR_HALFWORD_ENABLE (1 << SPDIF_CFGR_HALFWORD_SHIFT)
|
||||
|
||||
#define SPDIF_CFGR_VDW_SHIFT 0
|
||||
#define SPDIF_CFGR_VDW(x) (x << SPDIF_CFGR_VDW_SHIFT)
|
||||
#define SDPIF_CFGR_VDW_MASK (0xf << SPDIF_CFGR_VDW_SHIFT)
|
||||
|
||||
#define SPDIF_CFGR_VDW_16 SPDIF_CFGR_VDW(0x00)
|
||||
#define SPDIF_CFGR_VDW_20 SPDIF_CFGR_VDW(0x01)
|
||||
#define SPDIF_CFGR_VDW_24 SPDIF_CFGR_VDW(0x10)
|
||||
|
||||
/*
|
||||
* DMACR
|
||||
* DMA control register
|
||||
*/
|
||||
#define SPDIF_DMACR_TDE_SHIFT 5
|
||||
#define SPDIF_DMACR_TDE_DISABLE (0 << SPDIF_DMACR_TDE_SHIFT)
|
||||
#define SPDIF_DMACR_TDE_ENABLE (1 << SPDIF_DMACR_TDE_SHIFT)
|
||||
|
||||
#define SPDIF_DMACR_TDL_SHIFT 0
|
||||
#define SPDIF_DMACR_TDL(x) ((x) << SPDIF_DMACR_TDL_SHIFT)
|
||||
#define SPDIF_DMACR_TDL_MASK (0x1f << SDPIF_DMACR_TDL_SHIFT)
|
||||
|
||||
/*
|
||||
* XFER
|
||||
* Transfer control register
|
||||
*/
|
||||
#define SPDIF_XFER_TXS_SHIFT 0
|
||||
#define SPDIF_XFER_TXS_STOP (0 << SPDIF_XFER_TXS_SHIFT)
|
||||
#define SPDIF_XFER_TXS_START (1 << SPDIF_XFER_TXS_SHIFT)
|
||||
|
||||
#define SPDIF_CFGR (0x0000)
|
||||
#define SPDIF_SDBLR (0x0004)
|
||||
#define SPDIF_DMACR (0x0008)
|
||||
#define SPDIF_INTCR (0x000c)
|
||||
#define SPDIF_INTSR (0x0010)
|
||||
#define SPDIF_XFER (0x0018)
|
||||
#define SPDIF_SMPDR (0x0020)
|
||||
|
||||
#endif /* _ROCKCHIP_SPDIF_H */
|
||||
|
|
@ -69,11 +69,10 @@ static u32 rsnd_adg_calculate_rbgx(unsigned long div)
|
|||
static u32 rsnd_adg_ssi_ws_timing_gen2(struct rsnd_dai_stream *io)
|
||||
{
|
||||
struct rsnd_mod *mod = rsnd_io_to_mod_ssi(io);
|
||||
struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
|
||||
int id = rsnd_mod_id(mod);
|
||||
int ws = id;
|
||||
|
||||
if (rsnd_ssi_is_pin_sharing(rsnd_ssi_mod_get(priv, id))) {
|
||||
if (rsnd_ssi_is_pin_sharing(io)) {
|
||||
switch (id) {
|
||||
case 1:
|
||||
case 2:
|
||||
|
|
|
|||
|
|
@ -300,7 +300,7 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
|
|||
/*
|
||||
* rsnd_dai functions
|
||||
*/
|
||||
#define __rsnd_mod_call(mod, io, func, param...) \
|
||||
#define rsnd_mod_call(mod, io, func, param...) \
|
||||
({ \
|
||||
struct rsnd_priv *priv = rsnd_mod_to_priv(mod); \
|
||||
struct device *dev = rsnd_priv_to_dev(priv); \
|
||||
|
|
@ -308,24 +308,17 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
|
|||
u8 val = (mod->status >> __rsnd_mod_shift_##func) & 0xF; \
|
||||
u8 add = ((val + __rsnd_mod_add_##func) & 0xF); \
|
||||
int ret = 0; \
|
||||
int called = 0; \
|
||||
if (val == __rsnd_mod_call_##func) { \
|
||||
called = 1; \
|
||||
ret = (mod)->ops->func(mod, io, param); \
|
||||
} \
|
||||
int call = (val == __rsnd_mod_call_##func) && (mod)->ops->func; \
|
||||
mod->status = (mod->status & ~mask) + \
|
||||
(add << __rsnd_mod_shift_##func); \
|
||||
dev_dbg(dev, "%s[%d] 0x%08x %s\n", \
|
||||
rsnd_mod_name(mod), rsnd_mod_id(mod), mod->status, \
|
||||
called ? #func : ""); \
|
||||
dev_dbg(dev, "%s[%d]\t0x%08x %s\n", \
|
||||
rsnd_mod_name(mod), rsnd_mod_id(mod), \
|
||||
mod->status, call ? #func : ""); \
|
||||
if (call) \
|
||||
ret = (mod)->ops->func(mod, io, param); \
|
||||
ret; \
|
||||
})
|
||||
|
||||
#define rsnd_mod_call(mod, io, func, param...) \
|
||||
(!(mod) ? -ENODEV : \
|
||||
!((mod)->ops->func) ? 0 : \
|
||||
__rsnd_mod_call(mod, io, func, param))
|
||||
|
||||
#define rsnd_dai_call(fn, io, param...) \
|
||||
({ \
|
||||
struct rsnd_mod *mod; \
|
||||
|
|
@ -334,9 +327,7 @@ u32 rsnd_get_dalign(struct rsnd_mod *mod, struct rsnd_dai_stream *io)
|
|||
mod = (io)->mod[i]; \
|
||||
if (!mod) \
|
||||
continue; \
|
||||
ret = rsnd_mod_call(mod, io, fn, param); \
|
||||
if (ret < 0) \
|
||||
break; \
|
||||
ret |= rsnd_mod_call(mod, io, fn, param); \
|
||||
} \
|
||||
ret; \
|
||||
})
|
||||
|
|
@ -502,16 +493,10 @@ static int rsnd_soc_dai_trigger(struct snd_pcm_substream *substream, int cmd,
|
|||
break;
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
ret = rsnd_dai_call(stop, io, priv);
|
||||
if (ret < 0)
|
||||
goto dai_trigger_end;
|
||||
|
||||
ret = rsnd_dai_call(quit, io, priv);
|
||||
if (ret < 0)
|
||||
goto dai_trigger_end;
|
||||
ret |= rsnd_dai_call(quit, io, priv);
|
||||
|
||||
ret = rsnd_platform_call(priv, dai, stop, ssi_id);
|
||||
if (ret < 0)
|
||||
goto dai_trigger_end;
|
||||
ret |= rsnd_platform_call(priv, dai, stop, ssi_id);
|
||||
|
||||
rsnd_dai_stream_quit(io);
|
||||
break;
|
||||
|
|
@ -1236,20 +1221,11 @@ static int rsnd_probe(struct platform_device *pdev)
|
|||
};
|
||||
int ret, i;
|
||||
|
||||
info = NULL;
|
||||
of_data = NULL;
|
||||
if (of_id) {
|
||||
info = devm_kzalloc(&pdev->dev,
|
||||
sizeof(struct rcar_snd_info), GFP_KERNEL);
|
||||
of_data = of_id->data;
|
||||
} else {
|
||||
info = pdev->dev.platform_data;
|
||||
}
|
||||
|
||||
if (!info) {
|
||||
dev_err(dev, "driver needs R-Car sound information\n");
|
||||
return -ENODEV;
|
||||
}
|
||||
info = devm_kzalloc(&pdev->dev, sizeof(struct rcar_snd_info),
|
||||
GFP_KERNEL);
|
||||
if (!info)
|
||||
return -ENOMEM;
|
||||
of_data = of_id->data;
|
||||
|
||||
/*
|
||||
* init priv data
|
||||
|
|
|
|||
|
|
@ -35,7 +35,7 @@ static int rsnd_ctu_init(struct rsnd_mod *mod,
|
|||
struct rsnd_dai_stream *io,
|
||||
struct rsnd_priv *priv)
|
||||
{
|
||||
rsnd_mod_hw_start(mod);
|
||||
rsnd_mod_power_on(mod);
|
||||
|
||||
rsnd_ctu_initialize_lock(mod);
|
||||
|
||||
|
|
@ -50,7 +50,7 @@ static int rsnd_ctu_quit(struct rsnd_mod *mod,
|
|||
struct rsnd_dai_stream *io,
|
||||
struct rsnd_priv *priv)
|
||||
{
|
||||
rsnd_mod_hw_stop(mod);
|
||||
rsnd_mod_power_off(mod);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -118,10 +118,8 @@ int rsnd_ctu_probe(struct platform_device *pdev,
|
|||
int i, nr, ret;
|
||||
|
||||
/* This driver doesn't support Gen1 at this point */
|
||||
if (rsnd_is_gen1(priv)) {
|
||||
dev_warn(dev, "CTU is not supported on Gen1\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
if (rsnd_is_gen1(priv))
|
||||
return 0;
|
||||
|
||||
rsnd_of_parse_ctu(pdev, of_data, priv);
|
||||
|
||||
|
|
|
|||
|
|
@ -470,7 +470,7 @@ rsnd_gen2_dma_addr(struct rsnd_dai_stream *io,
|
|||
dev_err(dev, "DVC is selected without SRC\n");
|
||||
|
||||
/* use SSIU or SSI ? */
|
||||
if (is_ssi && rsnd_ssi_use_busif(io, mod))
|
||||
if (is_ssi && rsnd_ssi_use_busif(io))
|
||||
is_ssi++;
|
||||
|
||||
return (is_from) ?
|
||||
|
|
|
|||
|
|
@ -153,7 +153,7 @@ static int rsnd_dvc_init(struct rsnd_mod *mod,
|
|||
struct rsnd_dai_stream *io,
|
||||
struct rsnd_priv *priv)
|
||||
{
|
||||
rsnd_mod_hw_start(mod);
|
||||
rsnd_mod_power_on(mod);
|
||||
|
||||
rsnd_dvc_soft_reset(mod);
|
||||
|
||||
|
|
@ -175,7 +175,7 @@ static int rsnd_dvc_quit(struct rsnd_mod *mod,
|
|||
struct rsnd_dai_stream *io,
|
||||
struct rsnd_priv *priv)
|
||||
{
|
||||
rsnd_mod_hw_stop(mod);
|
||||
rsnd_mod_power_off(mod);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -333,10 +333,8 @@ int rsnd_dvc_probe(struct platform_device *pdev,
|
|||
int i, nr, ret;
|
||||
|
||||
/* This driver doesn't support Gen1 at this point */
|
||||
if (rsnd_is_gen1(priv)) {
|
||||
dev_warn(dev, "CMD is not supported on Gen1\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
if (rsnd_is_gen1(priv))
|
||||
return 0;
|
||||
|
||||
rsnd_of_parse_dvc(pdev, of_data, priv);
|
||||
|
||||
|
|
|
|||
|
|
@ -22,13 +22,15 @@
|
|||
#include "rsnd.h"
|
||||
|
||||
struct rsnd_gen {
|
||||
void __iomem *base[RSND_BASE_MAX];
|
||||
|
||||
struct rsnd_gen_ops *ops;
|
||||
|
||||
/* RSND_BASE_MAX base */
|
||||
void __iomem *base[RSND_BASE_MAX];
|
||||
phys_addr_t res[RSND_BASE_MAX];
|
||||
struct regmap *regmap[RSND_BASE_MAX];
|
||||
|
||||
/* RSND_REG_MAX base */
|
||||
struct regmap_field *regs[RSND_REG_MAX];
|
||||
phys_addr_t res[RSND_REG_MAX];
|
||||
};
|
||||
|
||||
#define rsnd_priv_to_gen(p) ((struct rsnd_gen *)(p)->gen)
|
||||
|
|
@ -79,11 +81,11 @@ u32 rsnd_read(struct rsnd_priv *priv,
|
|||
if (!rsnd_is_accessible_reg(priv, gen, reg))
|
||||
return 0;
|
||||
|
||||
regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);
|
||||
|
||||
dev_dbg(dev, "r %s[%d] - %4d : %08x\n",
|
||||
rsnd_mod_name(mod), rsnd_mod_id(mod), reg, val);
|
||||
|
||||
regmap_fields_read(gen->regs[reg], rsnd_mod_id(mod), &val);
|
||||
|
||||
return val;
|
||||
}
|
||||
|
||||
|
|
@ -182,6 +184,7 @@ static int _rsnd_gen_regmap_init(struct rsnd_priv *priv,
|
|||
if (IS_ERR(regmap))
|
||||
return PTR_ERR(regmap);
|
||||
|
||||
/* RSND_BASE_MAX base */
|
||||
gen->base[reg_id] = base;
|
||||
gen->regmap[reg_id] = regmap;
|
||||
gen->res[reg_id] = res->start;
|
||||
|
|
@ -198,6 +201,7 @@ static int _rsnd_gen_regmap_init(struct rsnd_priv *priv,
|
|||
if (IS_ERR(regs))
|
||||
return PTR_ERR(regs);
|
||||
|
||||
/* RSND_REG_MAX base */
|
||||
gen->regs[conf[i].idx] = regs;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -58,7 +58,7 @@ static int rsnd_mix_init(struct rsnd_mod *mod,
|
|||
struct rsnd_dai_stream *io,
|
||||
struct rsnd_priv *priv)
|
||||
{
|
||||
rsnd_mod_hw_start(mod);
|
||||
rsnd_mod_power_on(mod);
|
||||
|
||||
rsnd_mix_soft_reset(mod);
|
||||
|
||||
|
|
@ -83,7 +83,7 @@ static int rsnd_mix_quit(struct rsnd_mod *mod,
|
|||
struct rsnd_dai_stream *io,
|
||||
struct rsnd_priv *priv)
|
||||
{
|
||||
rsnd_mod_hw_stop(mod);
|
||||
rsnd_mod_power_off(mod);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -151,10 +151,8 @@ int rsnd_mix_probe(struct platform_device *pdev,
|
|||
int i, nr, ret;
|
||||
|
||||
/* This driver doesn't support Gen1 at this point */
|
||||
if (rsnd_is_gen1(priv)) {
|
||||
dev_warn(dev, "MIX is not supported on Gen1\n");
|
||||
return -EINVAL;
|
||||
}
|
||||
if (rsnd_is_gen1(priv))
|
||||
return 0;
|
||||
|
||||
rsnd_of_parse_mix(pdev, of_data, priv);
|
||||
|
||||
|
|
|
|||
|
|
@ -21,10 +21,11 @@
|
|||
#include <linux/of_irq.h>
|
||||
#include <linux/sh_dma.h>
|
||||
#include <linux/workqueue.h>
|
||||
#include <sound/rcar_snd.h>
|
||||
#include <sound/soc.h>
|
||||
#include <sound/pcm_params.h>
|
||||
|
||||
#include "rcar_snd.h"
|
||||
|
||||
/*
|
||||
* pseudo register
|
||||
*
|
||||
|
|
@ -329,8 +330,8 @@ struct rsnd_mod {
|
|||
#define rsnd_mod_to_priv(mod) ((mod)->priv)
|
||||
#define rsnd_mod_to_dma(mod) (&(mod)->dma)
|
||||
#define rsnd_mod_id(mod) ((mod) ? (mod)->id : -1)
|
||||
#define rsnd_mod_hw_start(mod) clk_enable((mod)->clk)
|
||||
#define rsnd_mod_hw_stop(mod) clk_disable((mod)->clk)
|
||||
#define rsnd_mod_power_on(mod) clk_enable((mod)->clk)
|
||||
#define rsnd_mod_power_off(mod) clk_disable((mod)->clk)
|
||||
#define rsnd_mod_get(ip) (&(ip)->mod)
|
||||
|
||||
int rsnd_mod_init(struct rsnd_priv *priv,
|
||||
|
|
@ -571,9 +572,12 @@ int rsnd_ssi_probe(struct platform_device *pdev,
|
|||
void rsnd_ssi_remove(struct platform_device *pdev,
|
||||
struct rsnd_priv *priv);
|
||||
struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id);
|
||||
int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
|
||||
int rsnd_ssi_is_dma_mode(struct rsnd_mod *mod);
|
||||
int rsnd_ssi_use_busif(struct rsnd_dai_stream *io, struct rsnd_mod *mod);
|
||||
int rsnd_ssi_use_busif(struct rsnd_dai_stream *io);
|
||||
|
||||
#define rsnd_ssi_is_pin_sharing(io) \
|
||||
__rsnd_ssi_is_pin_sharing(rsnd_io_to_mod_ssi(io))
|
||||
int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod);
|
||||
|
||||
/*
|
||||
* R-Car SRC
|
||||
|
|
|
|||
|
|
@ -159,7 +159,7 @@ int rsnd_src_ssiu_start(struct rsnd_mod *ssi_mod,
|
|||
/*
|
||||
* SSI_MODE1
|
||||
*/
|
||||
if (rsnd_ssi_is_pin_sharing(ssi_mod)) {
|
||||
if (rsnd_ssi_is_pin_sharing(io)) {
|
||||
int shift = -1;
|
||||
switch (ssi_id) {
|
||||
case 1:
|
||||
|
|
@ -352,7 +352,7 @@ static int rsnd_src_init(struct rsnd_mod *mod,
|
|||
{
|
||||
struct rsnd_src *src = rsnd_mod_to_src(mod);
|
||||
|
||||
rsnd_mod_hw_start(mod);
|
||||
rsnd_mod_power_on(mod);
|
||||
|
||||
rsnd_src_soft_reset(mod);
|
||||
|
||||
|
|
@ -373,7 +373,7 @@ static int rsnd_src_quit(struct rsnd_mod *mod,
|
|||
struct rsnd_src *src = rsnd_mod_to_src(mod);
|
||||
struct device *dev = rsnd_priv_to_dev(priv);
|
||||
|
||||
rsnd_mod_hw_stop(mod);
|
||||
rsnd_mod_power_off(mod);
|
||||
|
||||
if (src->err)
|
||||
dev_warn(dev, "%s[%d] under/over flow err = %d\n",
|
||||
|
|
@ -1036,8 +1036,10 @@ int rsnd_src_probe(struct platform_device *pdev,
|
|||
int i, nr, ret;
|
||||
|
||||
ops = NULL;
|
||||
if (rsnd_is_gen1(priv))
|
||||
if (rsnd_is_gen1(priv)) {
|
||||
ops = &rsnd_src_gen1_ops;
|
||||
dev_warn(dev, "Gen1 support will be removed soon\n");
|
||||
}
|
||||
if (rsnd_is_gen2(priv))
|
||||
ops = &rsnd_src_gen2_ops;
|
||||
if (!ops) {
|
||||
|
|
|
|||
|
|
@ -79,7 +79,6 @@ struct rsnd_ssi {
|
|||
|
||||
#define rsnd_ssi_nr(priv) ((priv)->ssi_nr)
|
||||
#define rsnd_mod_to_ssi(_mod) container_of((_mod), struct rsnd_ssi, mod)
|
||||
#define rsnd_dma_to_ssi(dma) rsnd_mod_to_ssi(rsnd_dma_to_mod(dma))
|
||||
#define rsnd_ssi_pio_available(ssi) ((ssi)->info->irq > 0)
|
||||
#define rsnd_ssi_parent(ssi) ((ssi)->parent)
|
||||
#define rsnd_ssi_mode_flags(p) ((p)->info->flags)
|
||||
|
|
@ -87,8 +86,9 @@ struct rsnd_ssi {
|
|||
#define rsnd_ssi_of_node(priv) \
|
||||
of_get_child_by_name(rsnd_priv_to_dev(priv)->of_node, "rcar_sound,ssi")
|
||||
|
||||
int rsnd_ssi_use_busif(struct rsnd_dai_stream *io, struct rsnd_mod *mod)
|
||||
int rsnd_ssi_use_busif(struct rsnd_dai_stream *io)
|
||||
{
|
||||
struct rsnd_mod *mod = rsnd_io_to_mod_ssi(io);
|
||||
struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
|
||||
int use_busif = 0;
|
||||
|
||||
|
|
@ -184,7 +184,7 @@ static void rsnd_ssi_hw_start(struct rsnd_ssi *ssi,
|
|||
u32 cr;
|
||||
|
||||
if (0 == ssi->usrcnt) {
|
||||
rsnd_mod_hw_start(mod);
|
||||
rsnd_mod_power_on(mod);
|
||||
|
||||
if (rsnd_rdai_is_clk_master(rdai)) {
|
||||
struct rsnd_ssi *ssi_parent = rsnd_ssi_parent(ssi);
|
||||
|
|
@ -265,7 +265,7 @@ static void rsnd_ssi_hw_stop(struct rsnd_dai_stream *io, struct rsnd_ssi *ssi)
|
|||
rsnd_ssi_master_clk_stop(ssi);
|
||||
}
|
||||
|
||||
rsnd_mod_hw_stop(mod);
|
||||
rsnd_mod_power_off(mod);
|
||||
|
||||
ssi->chan = 0;
|
||||
}
|
||||
|
|
@ -395,7 +395,7 @@ static int rsnd_ssi_start(struct rsnd_mod *mod,
|
|||
{
|
||||
struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
|
||||
|
||||
rsnd_src_ssiu_start(mod, io, rsnd_ssi_use_busif(io, mod));
|
||||
rsnd_src_ssiu_start(mod, io, rsnd_ssi_use_busif(io));
|
||||
|
||||
rsnd_ssi_hw_start(ssi, io);
|
||||
|
||||
|
|
@ -555,7 +555,7 @@ static int rsnd_ssi_dma_remove(struct rsnd_mod *mod,
|
|||
rsnd_dma_quit(io, rsnd_mod_to_dma(mod));
|
||||
|
||||
/* PIO will request IRQ again */
|
||||
devm_free_irq(dev, irq, ssi);
|
||||
devm_free_irq(dev, irq, mod);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -614,7 +614,7 @@ static struct dma_chan *rsnd_ssi_dma_req(struct rsnd_dai_stream *io,
|
|||
int is_play = rsnd_io_is_play(io);
|
||||
char *name;
|
||||
|
||||
if (rsnd_ssi_use_busif(io, mod))
|
||||
if (rsnd_ssi_use_busif(io))
|
||||
name = is_play ? "rxu" : "txu";
|
||||
else
|
||||
name = is_play ? "rx" : "tx";
|
||||
|
|
@ -660,7 +660,7 @@ struct rsnd_mod *rsnd_ssi_mod_get(struct rsnd_priv *priv, int id)
|
|||
return rsnd_mod_get((struct rsnd_ssi *)(priv->ssi) + id);
|
||||
}
|
||||
|
||||
int rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
|
||||
int __rsnd_ssi_is_pin_sharing(struct rsnd_mod *mod)
|
||||
{
|
||||
struct rsnd_ssi *ssi = rsnd_mod_to_ssi(mod);
|
||||
|
||||
|
|
@ -671,7 +671,7 @@ static void rsnd_ssi_parent_setup(struct rsnd_priv *priv, struct rsnd_ssi *ssi)
|
|||
{
|
||||
struct rsnd_mod *mod = rsnd_mod_get(ssi);
|
||||
|
||||
if (!rsnd_ssi_is_pin_sharing(mod))
|
||||
if (!__rsnd_ssi_is_pin_sharing(mod))
|
||||
return;
|
||||
|
||||
switch (rsnd_mod_id(mod)) {
|
||||
|
|
@ -700,9 +700,6 @@ static void rsnd_of_parse_ssi(struct platform_device *pdev,
|
|||
struct device *dev = &pdev->dev;
|
||||
int nr, i;
|
||||
|
||||
if (!of_data)
|
||||
return;
|
||||
|
||||
node = rsnd_ssi_of_node(priv);
|
||||
if (!node)
|
||||
return;
|
||||
|
|
|
|||
Loading…
Reference in New Issue