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powerpc/mm: Write to PTCR only if ultravisor disabled 

In ultravisor enabled systems, PTCR becomes ultravisor privileged only
for writing and an attempt to write to it will cause a Hypervisor
Emulation Assitance interrupt.

This patch uses the set_ptcr_when_no_uv() function to restrict PTCR
writing to only when ultravisor is disabled.

Signed-off-by: Claudio Carvalho <cclaudio@linux.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/20190822034838.27876-6-cclaudio@linux.ibm.com
This commit is contained in:
Claudio Carvalho 2019-08-22 00:48:36 -03:00 committed by Michael Ellerman
parent 139a1d2842
commit 5223134029
4 changed files with 21 additions and 6 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

12
arch/powerpc/include/asm/ultravisor.h
View File

@ -10,10 +10,22 @@
#include <asm/asm-prototypes.h> #include <asm/asm-prototypes.h>
#include <asm/ultravisor-api.h> #include <asm/ultravisor-api.h>
#include <asm/firmware.h>
int early_init_dt_scan_ultravisor(unsigned long node, const char *uname, int early_init_dt_scan_ultravisor(unsigned long node, const char *uname,
int depth, void *data); int depth, void *data);
/*
* In ultravisor enabled systems, PTCR becomes ultravisor privileged only for
* writing and an attempt to write to it will cause a Hypervisor Emulation
* Assistance interrupt.
*/
static inline void set_ptcr_when_no_uv(u64 val)
{
if (!firmware_has_feature(FW_FEATURE_ULTRAVISOR))
mtspr(SPRN_PTCR, val);
}
static inline int uv_register_pate(u64 lpid, u64 dw0, u64 dw1) static inline int uv_register_pate(u64 lpid, u64 dw0, u64 dw1)
{ {
return ucall_norets(UV_WRITE_PATE, lpid, dw0, dw1); return ucall_norets(UV_WRITE_PATE, lpid, dw0, dw1);

5
arch/powerpc/mm/book3s64/hash_utils.c
View File

@ -61,6 +61,7 @@
#include <asm/ps3.h> #include <asm/ps3.h>
#include <asm/pte-walk.h> #include <asm/pte-walk.h>
#include <asm/asm-prototypes.h> #include <asm/asm-prototypes.h>
#include <asm/ultravisor.h>
#include <mm/mmu_decl.h> #include <mm/mmu_decl.h>
@ -1075,8 +1076,8 @@ void hash__early_init_mmu_secondary(void)
if (!cpu_has_feature(CPU_FTR_ARCH_300)) if (!cpu_has_feature(CPU_FTR_ARCH_300))
mtspr(SPRN_SDR1, _SDR1); mtspr(SPRN_SDR1, _SDR1);
else else
mtspr(SPRN_PTCR, set_ptcr_when_no_uv(__pa(partition_tb) |
__pa(partition_tb) | (PATB_SIZE_SHIFT - 12)); (PATB_SIZE_SHIFT - 12));
} }
/* Initialize SLB */ /* Initialize SLB */
slb_initialize(); slb_initialize();

2
arch/powerpc/mm/book3s64/pgtable.c
View File

@ -207,7 +207,7 @@ void __init mmu_partition_table_init(void)
* 64 K size. * 64 K size.
*/ */
ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12); ptcr = __pa(partition_tb) | (PATB_SIZE_SHIFT - 12);
mtspr(SPRN_PTCR, ptcr); set_ptcr_when_no_uv(ptcr);
powernv_set_nmmu_ptcr(ptcr); powernv_set_nmmu_ptcr(ptcr);
} }

8
arch/powerpc/mm/book3s64/radix_pgtable.c
View File

@ -27,6 +27,7 @@
#include <asm/sections.h> #include <asm/sections.h>
#include <asm/trace.h> #include <asm/trace.h>
#include <asm/uaccess.h> #include <asm/uaccess.h>
#include <asm/ultravisor.h>
#include <trace/events/thp.h> #include <trace/events/thp.h>
@ -650,8 +651,9 @@ void radix__early_init_mmu_secondary(void)
lpcr = mfspr(SPRN_LPCR); lpcr = mfspr(SPRN_LPCR);
mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR); mtspr(SPRN_LPCR, lpcr | LPCR_UPRT | LPCR_HR);
mtspr(SPRN_PTCR, set_ptcr_when_no_uv(__pa(partition_tb) |
__pa(partition_tb) | (PATB_SIZE_SHIFT - 12)); (PATB_SIZE_SHIFT - 12));
radix_init_amor(); radix_init_amor();
} }
@ -667,7 +669,7 @@ void radix__mmu_cleanup_all(void)
if (!firmware_has_feature(FW_FEATURE_LPAR)) { if (!firmware_has_feature(FW_FEATURE_LPAR)) {
lpcr = mfspr(SPRN_LPCR); lpcr = mfspr(SPRN_LPCR);
mtspr(SPRN_LPCR, lpcr & ~LPCR_UPRT); mtspr(SPRN_LPCR, lpcr & ~LPCR_UPRT);
mtspr(SPRN_PTCR, 0); set_ptcr_when_no_uv(0);
powernv_set_nmmu_ptcr(0); powernv_set_nmmu_ptcr(0);
radix__flush_tlb_all(); radix__flush_tlb_all();
} }