Powerdomain support for rk3366 and disabling of the automatic

jtag/sdmmc switching for rk3328.
 -----BEGIN PGP SIGNATURE-----
 
 iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAlmEP/AQHGhlaWtvQHNu
 dGVjaC5kZQAKCRDzpnnJnNEdgf/lCACcJnVGr9PB9ibmTo7LASmljN+OP2G+9o3i
 sOlxlkh5eM5sh9Tbg0NPVBziPmTYhBoPrFQjGEvt01m62gAOf7wugPRStKAivL7h
 /pAUhkL1f4yIR0AnplLgy4+9wNJ7zK5DCj4dDCwd0+vX+aZbgDACPLdqn0afwuu2
 g8pA3C5fRvThVjNpXzwHQSicUOmsvHPWpOWzx1YiKnXxXGKO0Xev+jDseWGqTMXR
 8BXtb62G0QMHGgnrEu2TFex+SzdTumv9r4NpxP3+uytSQogbWUwCUAWpLxxxvgEJ
 dAX9VcTaaJU3CMUwKot1mqmec0wElbwogx961An9bi4EoE+ru4Lt
 =YgWd
 -----END PGP SIGNATURE-----

Merge tag 'v4.14-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into next/drivers

Pull "Rockchip driver changes for 4.14" from Heiko Stübner:

Powerdomain support for rk3366 and disabling of the automatic
jtag/sdmmc switching for rk3328.

* tag 'v4.14-rockchip-drivers-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  soc: rockchip: power-domain: add power domain support for rk3366
  dt-bindings: add binding for rk3366 power domains
  dt-bindings: power: add RK3366 SoCs header for power-domain
  soc: rockchip: disable jtag switching for RK3328 Soc
This commit is contained in:
Arnd Bergmann 2017-08-16 21:47:09 +02:00
commit 526ca89ebe
4 changed files with 73 additions and 0 deletions

View File

@ -7,6 +7,7 @@ Required properties for power domain controller:
- compatible: Should be one of the following.
"rockchip,rk3288-power-controller" - for RK3288 SoCs.
"rockchip,rk3328-power-controller" - for RK3328 SoCs.
"rockchip,rk3366-power-controller" - for RK3366 SoCs.
"rockchip,rk3368-power-controller" - for RK3368 SoCs.
"rockchip,rk3399-power-controller" - for RK3399 SoCs.
- #power-domain-cells: Number of cells in a power-domain specifier.
@ -18,6 +19,7 @@ Required properties for power domain sub nodes:
- reg: index of the power domain, should use macros in:
"include/dt-bindings/power/rk3288-power.h" - for RK3288 type power domain.
"include/dt-bindings/power/rk3328-power.h" - for RK3328 type power domain.
"include/dt-bindings/power/rk3366-power.h" - for RK3366 type power domain.
"include/dt-bindings/power/rk3368-power.h" - for RK3368 type power domain.
"include/dt-bindings/power/rk3399-power.h" - for RK3399 type power domain.
- clocks (optional): phandles to clocks which need to be enabled while power domain
@ -93,6 +95,7 @@ power domain to use.
The index should use macros in:
"include/dt-bindings/power/rk3288-power.h" - for rk3288 type power domain.
"include/dt-bindings/power/rk3328-power.h" - for rk3328 type power domain.
"include/dt-bindings/power/rk3366-power.h" - for rk3366 type power domain.
"include/dt-bindings/power/rk3368-power.h" - for rk3368 type power domain.
"include/dt-bindings/power/rk3399-power.h" - for rk3399 type power domain.

View File

@ -54,6 +54,17 @@ static const struct rockchip_grf_info rk3288_grf __initconst = {
.num_values = ARRAY_SIZE(rk3288_defaults),
};
#define RK3328_GRF_SOC_CON4 0x410
static const struct rockchip_grf_value rk3328_defaults[] __initconst = {
{ "jtag switching", RK3328_GRF_SOC_CON4, HIWORD_UPDATE(0, 1, 12) },
};
static const struct rockchip_grf_info rk3328_grf __initconst = {
.values = rk3328_defaults,
.num_values = ARRAY_SIZE(rk3328_defaults),
};
#define RK3368_GRF_SOC_CON15 0x43c
static const struct rockchip_grf_value rk3368_defaults[] __initconst = {
@ -83,6 +94,9 @@ static const struct of_device_id rockchip_grf_dt_match[] __initconst = {
}, {
.compatible = "rockchip,rk3288-grf",
.data = (void *)&rk3288_grf,
}, {
.compatible = "rockchip,rk3328-grf",
.data = (void *)&rk3328_grf,
}, {
.compatible = "rockchip,rk3368-grf",
.data = (void *)&rk3368_grf,

View File

@ -20,6 +20,7 @@
#include <linux/mfd/syscon.h>
#include <dt-bindings/power/rk3288-power.h>
#include <dt-bindings/power/rk3328-power.h>
#include <dt-bindings/power/rk3366-power.h>
#include <dt-bindings/power/rk3368-power.h>
#include <dt-bindings/power/rk3399-power.h>
@ -730,6 +731,16 @@ static const struct rockchip_domain_info rk3328_pm_domains[] = {
[RK3328_PD_VPU] = DOMAIN_RK3328(-1, 9, 9, false),
};
static const struct rockchip_domain_info rk3366_pm_domains[] = {
[RK3366_PD_PERI] = DOMAIN_RK3368(10, 10, 6, true),
[RK3366_PD_VIO] = DOMAIN_RK3368(14, 14, 8, false),
[RK3366_PD_VIDEO] = DOMAIN_RK3368(13, 13, 7, false),
[RK3366_PD_RKVDEC] = DOMAIN_RK3368(11, 11, 7, false),
[RK3366_PD_WIFIBT] = DOMAIN_RK3368(8, 8, 9, false),
[RK3366_PD_VPU] = DOMAIN_RK3368(12, 12, 7, false),
[RK3366_PD_GPU] = DOMAIN_RK3368(15, 15, 2, false),
};
static const struct rockchip_domain_info rk3368_pm_domains[] = {
[RK3368_PD_PERI] = DOMAIN_RK3368(13, 12, 6, true),
[RK3368_PD_VIO] = DOMAIN_RK3368(15, 14, 8, false),
@ -794,6 +805,23 @@ static const struct rockchip_pmu_info rk3328_pmu = {
.domain_info = rk3328_pm_domains,
};
static const struct rockchip_pmu_info rk3366_pmu = {
.pwr_offset = 0x0c,
.status_offset = 0x10,
.req_offset = 0x3c,
.idle_offset = 0x40,
.ack_offset = 0x40,
.core_pwrcnt_offset = 0x48,
.gpu_pwrcnt_offset = 0x50,
.core_power_transition_time = 24,
.gpu_power_transition_time = 24,
.num_domains = ARRAY_SIZE(rk3366_pm_domains),
.domain_info = rk3366_pm_domains,
};
static const struct rockchip_pmu_info rk3368_pmu = {
.pwr_offset = 0x0c,
.status_offset = 0x10,
@ -833,6 +861,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
.compatible = "rockchip,rk3328-power-controller",
.data = (void *)&rk3328_pmu,
},
{
.compatible = "rockchip,rk3366-power-controller",
.data = (void *)&rk3366_pmu,
},
{
.compatible = "rockchip,rk3368-power-controller",
.data = (void *)&rk3368_pmu,

View File

@ -0,0 +1,24 @@
#ifndef __DT_BINDINGS_POWER_RK3366_POWER_H__
#define __DT_BINDINGS_POWER_RK3366_POWER_H__
/* VD_CORE */
#define RK3366_PD_A53_0 0
#define RK3366_PD_A53_1 1
#define RK3366_PD_A53_2 2
#define RK3366_PD_A53_3 3
/* VD_LOGIC */
#define RK3366_PD_BUS 4
#define RK3366_PD_PERI 5
#define RK3366_PD_VIO 6
#define RK3366_PD_VIDEO 7
#define RK3366_PD_RKVDEC 8
#define RK3366_PD_WIFIBT 9
#define RK3366_PD_VPU 10
#define RK3366_PD_GPU 11
#define RK3366_PD_ALIVE 12
/* VD_PMU */
#define RK3366_PD_PMU 13
#endif