mirror of https://gitee.com/openkylin/linux.git
mtd: bcm47xxnflash: add dev_ready and fill chip_delay
Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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@ -174,6 +174,14 @@ static void bcm47xxnflash_ops_bcm4706_select_chip(struct mtd_info *mtd,
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return;
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return;
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}
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}
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static int bcm47xxnflash_ops_bcm4706_dev_ready(struct mtd_info *mtd)
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{
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struct nand_chip *nand_chip = (struct nand_chip *)mtd->priv;
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struct bcm47xxnflash *b47n = (struct bcm47xxnflash *)nand_chip->priv;
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return !!(bcma_cc_read32(b47n->cc, BCMA_CC_NFLASH_CTL) & NCTL_READY);
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}
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/*
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/*
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* Default nand_command and nand_command_lp don't match BCM4706 hardware layout.
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* Default nand_command and nand_command_lp don't match BCM4706 hardware layout.
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* For example, reading chip id is performed in a non-standard way.
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* For example, reading chip id is performed in a non-standard way.
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@ -341,6 +349,7 @@ static void bcm47xxnflash_ops_bcm4706_write_buf(struct mtd_info *mtd,
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int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n)
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int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n)
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{
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{
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struct nand_chip *nand_chip = (struct nand_chip *)&b47n->nand_chip;
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int err;
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int err;
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u32 freq;
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u32 freq;
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u16 clock;
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u16 clock;
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@ -351,10 +360,13 @@ int bcm47xxnflash_ops_bcm4706_init(struct bcm47xxnflash *b47n)
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u32 val;
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u32 val;
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b47n->nand_chip.select_chip = bcm47xxnflash_ops_bcm4706_select_chip;
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b47n->nand_chip.select_chip = bcm47xxnflash_ops_bcm4706_select_chip;
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nand_chip->dev_ready = bcm47xxnflash_ops_bcm4706_dev_ready;
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b47n->nand_chip.cmdfunc = bcm47xxnflash_ops_bcm4706_cmdfunc;
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b47n->nand_chip.cmdfunc = bcm47xxnflash_ops_bcm4706_cmdfunc;
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b47n->nand_chip.read_byte = bcm47xxnflash_ops_bcm4706_read_byte;
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b47n->nand_chip.read_byte = bcm47xxnflash_ops_bcm4706_read_byte;
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b47n->nand_chip.read_buf = bcm47xxnflash_ops_bcm4706_read_buf;
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b47n->nand_chip.read_buf = bcm47xxnflash_ops_bcm4706_read_buf;
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b47n->nand_chip.write_buf = bcm47xxnflash_ops_bcm4706_write_buf;
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b47n->nand_chip.write_buf = bcm47xxnflash_ops_bcm4706_write_buf;
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nand_chip->chip_delay = 50;
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b47n->nand_chip.bbt_options = NAND_BBT_USE_FLASH;
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b47n->nand_chip.bbt_options = NAND_BBT_USE_FLASH;
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b47n->nand_chip.ecc.mode = NAND_ECC_NONE; /* TODO: implement ECC */
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b47n->nand_chip.ecc.mode = NAND_ECC_NONE; /* TODO: implement ECC */
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