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ARM: mmp: add mmc resource 

Signed-off-by: Zhangfei Gao <zhangfei.gao@marvell.com>
Acked-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
This commit is contained in:
Zhangfei Gao 2010-09-29 16:18:51 -04:00 committed by Eric Miao
parent ad68bb9f7a
commit 5382f419c1
3 changed files with 59 additions and 0 deletions
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22
arch/arm/mach-mmp/include/mach/mmp2.h
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@ -1,6 +1,8 @@
#ifndef __ASM_MACH_MMP2_H #ifndef __ASM_MACH_MMP2_H
#define __ASM_MACH_MMP2_H #define __ASM_MACH_MMP2_H
#include <plat/sdhci.h>
struct sys_timer; struct sys_timer;
extern struct sys_timer mmp2_timer; extern struct sys_timer mmp2_timer;
@ -22,6 +24,10 @@ extern struct pxa_device_desc mmp2_device_twsi3;
extern struct pxa_device_desc mmp2_device_twsi4; extern struct pxa_device_desc mmp2_device_twsi4;
extern struct pxa_device_desc mmp2_device_twsi5; extern struct pxa_device_desc mmp2_device_twsi5;
extern struct pxa_device_desc mmp2_device_twsi6; extern struct pxa_device_desc mmp2_device_twsi6;
extern struct pxa_device_desc mmp2_device_sdh0;
extern struct pxa_device_desc mmp2_device_sdh1;
extern struct pxa_device_desc mmp2_device_sdh2;
extern struct pxa_device_desc mmp2_device_sdh3;
static inline int mmp2_add_uart(int id) static inline int mmp2_add_uart(int id)
{ {
@ -63,5 +69,21 @@ static inline int mmp2_add_twsi(int id, struct i2c_pxa_platform_data *data,
return pxa_register_device(d, data, sizeof(*data)); return pxa_register_device(d, data, sizeof(*data));
} }
static inline int mmp2_add_sdhost(int id, struct sdhci_pxa_platdata *data)
{
struct pxa_device_desc *d = NULL;
switch (id) {
case 0: d = &mmp2_device_sdh0; break;
case 1: d = &mmp2_device_sdh1; break;
case 2: d = &mmp2_device_sdh2; break;
case 3: d = &mmp2_device_sdh3; break;
default:
return -EINVAL;
}
return pxa_register_device(d, data, sizeof(*data));
}
#endif /* __ASM_MACH_MMP2_H */ #endif /* __ASM_MACH_MMP2_H */

2
arch/arm/mach-mmp/include/mach/regs-apmu.h
View File

@ -27,6 +27,8 @@
#define APMU_DMA APMU_REG(0x064) #define APMU_DMA APMU_REG(0x064)
#define APMU_GEU APMU_REG(0x068) #define APMU_GEU APMU_REG(0x068)
#define APMU_BUS APMU_REG(0x06c) #define APMU_BUS APMU_REG(0x06c)
#define APMU_SDH2 APMU_REG(0x0e8)
#define APMU_SDH3 APMU_REG(0x0ec)
#define APMU_FNCLK_EN (1 << 4) #define APMU_FNCLK_EN (1 << 4)
#define APMU_AXICLK_EN (1 << 3) #define APMU_AXICLK_EN (1 << 3)

35
arch/arm/mach-mmp/mmp2.c
View File

@ -115,6 +115,29 @@ void __init mmp2_init_irq(void)
mmp2_init_gpio(); mmp2_init_gpio();
} }
static void sdhc_clk_enable(struct clk *clk)
{
uint32_t clk_rst;
clk_rst = __raw_readl(clk->clk_rst);
clk_rst |= clk->enable_val;
__raw_writel(clk_rst, clk->clk_rst);
}
static void sdhc_clk_disable(struct clk *clk)
{
uint32_t clk_rst;
clk_rst = __raw_readl(clk->clk_rst);
clk_rst &= ~clk->enable_val;
__raw_writel(clk_rst, clk->clk_rst);
}
struct clkops sdhc_clk_ops = {
.enable = sdhc_clk_enable,
.disable = sdhc_clk_disable,
};
/* APB peripheral clocks */ /* APB peripheral clocks */
static APBC_CLK(uart1, MMP2_UART1, 1, 26000000); static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
static APBC_CLK(uart2, MMP2_UART2, 1, 26000000); static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);
@ -128,6 +151,10 @@ static APBC_CLK(twsi5, MMP2_TWSI5, 0, 26000000);
static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000); static APBC_CLK(twsi6, MMP2_TWSI6, 0, 26000000);
static APMU_CLK(nand, NAND, 0xbf, 100000000); static APMU_CLK(nand, NAND, 0xbf, 100000000);
static APMU_CLK_OPS(sdh0, SDH0, 0x1b, 200000000, &sdhc_clk_ops);
static APMU_CLK_OPS(sdh1, SDH1, 0x1b, 200000000, &sdhc_clk_ops);
static APMU_CLK_OPS(sdh2, SDH2, 0x1b, 200000000, &sdhc_clk_ops);
static APMU_CLK_OPS(sdh3, SDH3, 0x1b, 200000000, &sdhc_clk_ops);
static struct clk_lookup mmp2_clkregs[] = { static struct clk_lookup mmp2_clkregs[] = {
INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL), INIT_CLKREG(&clk_uart1, "pxa2xx-uart.0", NULL),
@ -141,6 +168,10 @@ static struct clk_lookup mmp2_clkregs[] = {
INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL), INIT_CLKREG(&clk_twsi5, "pxa2xx-i2c.4", NULL),
INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL), INIT_CLKREG(&clk_twsi6, "pxa2xx-i2c.5", NULL),
INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL), INIT_CLKREG(&clk_nand, "pxa3xx-nand", NULL),
INIT_CLKREG(&clk_sdh0, "sdhci-pxa.0", "PXA-SDHCLK"),
INIT_CLKREG(&clk_sdh1, "sdhci-pxa.1", "PXA-SDHCLK"),
INIT_CLKREG(&clk_sdh2, "sdhci-pxa.2", "PXA-SDHCLK"),
INIT_CLKREG(&clk_sdh3, "sdhci-pxa.3", "PXA-SDHCLK"),
}; };
static int __init mmp2_init(void) static int __init mmp2_init(void)
@ -191,4 +222,8 @@ MMP2_DEVICE(twsi4, "pxa2xx-i2c", 3, TWSI4, 0xd4033000, 0x70);
MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70); MMP2_DEVICE(twsi5, "pxa2xx-i2c", 4, TWSI5, 0xd4033800, 0x70);
MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70); MMP2_DEVICE(twsi6, "pxa2xx-i2c", 5, TWSI6, 0xd4034000, 0x70);
MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29); MMP2_DEVICE(nand, "pxa3xx-nand", -1, NAND, 0xd4283000, 0x100, 28, 29);
MMP2_DEVICE(sdh0, "sdhci-pxa", 0, MMC, 0xd4280000, 0x120);
MMP2_DEVICE(sdh1, "sdhci-pxa", 1, MMC2, 0xd4280800, 0x120);
MMP2_DEVICE(sdh2, "sdhci-pxa", 2, MMC3, 0xd4281000, 0x120);
MMP2_DEVICE(sdh3, "sdhci-pxa", 3, MMC4, 0xd4281800, 0x120);