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drm/nouveau/nvif: split out nvsw interface definitons 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-11-08 10:34:50 +10:00
parent 53a6df7785
commit 538b269bc5
7 changed files with 30 additions and 22 deletions
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22
drivers/gpu/drm/nouveau/include/nvif/class.h
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@ -5,10 +5,10 @@
#define NVIF_CLASS_CONTROL -1 #define NVIF_CLASS_CONTROL -1
#define NVIF_CLASS_PERFMON -2 #define NVIF_CLASS_PERFMON -2
#define NVIF_CLASS_PERFDOM -3 #define NVIF_CLASS_PERFDOM -3
#define NVIF_CLASS_SW_NV04 -4 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -4
#define NVIF_CLASS_SW_NV10 -5 #define NVIF_CLASS_SW_NV10 /* if0005.h */ -5
#define NVIF_CLASS_SW_NV50 -6 #define NVIF_CLASS_SW_NV50 /* if0005.h */ -6
#define NVIF_CLASS_SW_GF100 -7 #define NVIF_CLASS_SW_GF100 /* if0005.h */ -7
/* the below match nvidia-assigned (either in hw, or sw) class numbers */ /* the below match nvidia-assigned (either in hw, or sw) class numbers */
#define NV_DEVICE 0x00000080 #define NV_DEVICE 0x00000080
@ -614,18 +614,4 @@ struct nv50_disp_overlay_v0 {
}; };
#define NV50_DISP_OVERLAY_V0_NTFY_UEVENT 0x00 #define NV50_DISP_OVERLAY_V0_NTFY_UEVENT 0x00
/*******************************************************************************
* software
******************************************************************************/
#define NVSW_NTFY_UEVENT 0x00
#define NV04_NVSW_GET_REF 0x00
struct nv04_nvsw_get_ref_v0 {
__u8 version;
__u8 pad01[3];
__u32 ref;
};
#endif #endif

13
drivers/gpu/drm/nouveau/include/nvif/if0004.h Normal file
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@ -0,0 +1,13 @@
#ifndef __NVIF_IF0004_H__
#define __NVIF_IF0004_H__
#define NV04_NVSW_NTFY_UEVENT 0x00
#define NV04_NVSW_GET_REF 0x00
struct nv04_nvsw_get_ref_v0 {
__u8 version;
__u8 pad01[3];
__u32 ref;
};
#endif

4
drivers/gpu/drm/nouveau/include/nvif/if0005.h Normal file
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@ -0,0 +1,4 @@
#ifndef __NVIF_IF0005_H__
#define __NVIF_IF0005_H__
#define NV10_NVSW_NTFY_UEVENT 0x00
#endif

6
drivers/gpu/drm/nouveau/nouveau_drm.c
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@ -37,6 +37,8 @@
#include <core/pci.h> #include <core/pci.h>
#include <core/tegra.h> #include <core/tegra.h>
#include <nvif/if0004.h>
#include "nouveau_drm.h" #include "nouveau_drm.h"
#include "nouveau_dma.h" #include "nouveau_dma.h"
#include "nouveau_ttm.h" #include "nouveau_ttm.h"
@ -256,8 +258,8 @@ nouveau_accel_init(struct nouveau_drm *drm)
} }
ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete, ret = nvif_notify_init(&drm->nvsw, nouveau_flip_complete,
false, NVSW_NTFY_UEVENT, NULL, 0, 0, false, NV04_NVSW_NTFY_UEVENT,
&drm->flip); NULL, 0, 0, &drm->flip);
if (ret == 0) if (ret == 0)
ret = nvif_notify_get(&drm->flip); ret = nvif_notify_get(&drm->flip);
if (ret) { if (ret) {

2
drivers/gpu/drm/nouveau/nv04_fence.c
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@ -26,6 +26,8 @@
#include "nouveau_dma.h" #include "nouveau_dma.h"
#include "nouveau_fence.h" #include "nouveau_fence.h"
#include <nvif/if0004.h>
struct nv04_fence_chan { struct nv04_fence_chan {
struct nouveau_fence_chan base; struct nouveau_fence_chan base;
}; };

1
drivers/gpu/drm/nouveau/nvkm/engine/sw/nv04.c
View File

@ -27,6 +27,7 @@
#include "nvsw.h" #include "nvsw.h"
#include <nvif/class.h> #include <nvif/class.h>
#include <nvif/if0004.h>
#include <nvif/ioctl.h> #include <nvif/ioctl.h>
#include <nvif/unpack.h> #include <nvif/unpack.h>

4
drivers/gpu/drm/nouveau/nvkm/engine/sw/nvsw.c
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@ -24,7 +24,7 @@
#include "nvsw.h" #include "nvsw.h"
#include "chan.h" #include "chan.h"
#include <nvif/class.h> #include <nvif/if0004.h>
static int static int
nvkm_nvsw_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size) nvkm_nvsw_mthd_(struct nvkm_object *object, u32 mthd, void *data, u32 size)
@ -41,7 +41,7 @@ nvkm_nvsw_ntfy_(struct nvkm_object *object, u32 mthd,
{ {
struct nvkm_nvsw *nvsw = nvkm_nvsw(object); struct nvkm_nvsw *nvsw = nvkm_nvsw(object);
switch (mthd) { switch (mthd) {
case NVSW_NTFY_UEVENT: case NV04_NVSW_NTFY_UEVENT:
*pevent = &nvsw->chan->event; *pevent = &nvsw->chan->event;
return 0; return 0;
default: default: