mirror of https://gitee.com/openkylin/linux.git
drm/i915: Generalize skl_ddb_allocation_overlaps()
Make skl_ddb_allocation_overlaps() useful for other callers besides skl_update_crtcs(). We'll need it to do plane updates as well. And while we're here we can reduce the stack utilization a bit by noting that each struct skl_ddb_entry is 4 bytes whereas a pointer to one is 8 bytes (on 64bit). So we'll switch to an array of structs from the array of pointers we used before. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20181101150605.18235-9-ville.syrjala@linux.intel.com Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
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@ -12651,13 +12651,12 @@ static void skl_update_crtcs(struct drm_atomic_state *state)
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int i;
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u8 hw_enabled_slices = dev_priv->wm.skl_hw.ddb.enabled_slices;
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u8 required_slices = intel_state->wm_results.ddb.enabled_slices;
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const struct skl_ddb_entry *entries[I915_MAX_PIPES] = {};
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struct skl_ddb_entry entries[I915_MAX_PIPES] = {};
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for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i)
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/* ignore allocations for crtc's that have been turned off. */
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if (new_crtc_state->active)
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entries[i] = &to_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
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entries[i] = to_intel_crtc_state(old_crtc_state)->wm.skl.ddb;
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/* If 2nd DBuf slice required, enable it here */
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if (INTEL_GEN(dev_priv) >= 11 && required_slices > hw_enabled_slices)
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@ -12683,14 +12682,13 @@ static void skl_update_crtcs(struct drm_atomic_state *state)
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if (updated & cmask || !cstate->base.active)
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continue;
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if (skl_ddb_allocation_overlaps(dev_priv,
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if (skl_ddb_allocation_overlaps(&cstate->wm.skl.ddb,
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entries,
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&cstate->wm.skl.ddb,
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i))
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INTEL_INFO(dev_priv)->num_pipes, i))
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continue;
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updated |= cmask;
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entries[i] = &cstate->wm.skl.ddb;
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entries[i] = cstate->wm.skl.ddb;
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/*
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* If this is an already active pipe, it's DDB changed,
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@ -2191,10 +2191,9 @@ int intel_enable_sagv(struct drm_i915_private *dev_priv);
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int intel_disable_sagv(struct drm_i915_private *dev_priv);
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bool skl_wm_level_equals(const struct skl_wm_level *l1,
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const struct skl_wm_level *l2);
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bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
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const struct skl_ddb_entry **entries,
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const struct skl_ddb_entry *ddb,
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int ignore);
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bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
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const struct skl_ddb_entry entries[],
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int num_entries, int ignore_idx);
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bool ilk_disable_lp_wm(struct drm_device *dev);
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int skl_check_pipe_max_pixel_rate(struct intel_crtc *intel_crtc,
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struct intel_crtc_state *cstate);
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@ -5186,16 +5186,15 @@ static inline bool skl_ddb_entries_overlap(const struct skl_ddb_entry *a,
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return a->start < b->end && b->start < a->end;
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}
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bool skl_ddb_allocation_overlaps(struct drm_i915_private *dev_priv,
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const struct skl_ddb_entry **entries,
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const struct skl_ddb_entry *ddb,
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int ignore)
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bool skl_ddb_allocation_overlaps(const struct skl_ddb_entry *ddb,
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const struct skl_ddb_entry entries[],
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int num_entries, int ignore_idx)
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{
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enum pipe pipe;
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int i;
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for_each_pipe(dev_priv, pipe) {
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if (pipe != ignore && entries[pipe] &&
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skl_ddb_entries_overlap(ddb, entries[pipe]))
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for (i = 0; i < num_entries; i++) {
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if (i != ignore_idx &&
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skl_ddb_entries_overlap(ddb, &entries[i]))
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return true;
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}
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