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Allwinner DT additions for 4.18 

Here is our usual bunch of DT changes for our arm SoCs, with most
 significantly:
   - MIPI-DSI support for the A33
   - NAND support for the A33
   - SMP support for the A83t
   - GMAC support for the R40
   - And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
     Classic
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Merge tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into next/dt

Allwinner DT additions for 4.18

Here is our usual bunch of DT changes for our arm SoCs, with most
significantly:
  - MIPI-DSI support for the A33
  - NAND support for the A33
  - SMP support for the A83t
  - GMAC support for the R40
  - And some new boards: Olimex A20-SOM-EVB-eMMC, Nintendo NES and SuperNES
    Classic

* tag 'sunxi-dt-for-4.18' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux:
  ARM: dts: sun7i: Add Olimex A20-SOM-EVB-eMMC board
  ARM: dts: sun8i: r40: bananapi-m2-ultra: Enable GMAC ethernet controller
  ARM: dts: sun8i: r40: Add device node and RGMII pinmux node for GMAC
  ARM: dts: sun8i: r40: bananapi-m2-ultra: Sort device node dereferences
  ARM: dts: sun8i: Add enable-method for SMP support for the A83T SoC
  ARM: dts: sun8i: a83t: Add CCI-400 node
  ARM: dts: sun8i: Add R_CPUCFG device node for the A83T dtsi
  ARM: dts: sun8i: Add CPUCFG device node for A83T dtsi
  ARM: dts: nes: add Nintendo NES/SuperNES Classic Edition support
  ARM: dts: sun8i: a23/a33: declare NAND pins
  ARM: dts: sunxi: Add sid for a83t
  ARM: dts: sun8i: a33: Add the DSI-related nodes
  ARM: dts: sunxi: Change sun7i-a20-olimex-som204-evb to not use cd-inverted
  ARM: sun8i: v40: enable USB host ports for Banana Pi M2 Berry

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2018-05-25 13:54:36 -07:00
parent 8fcb440190 5d9ef839f8
commit 541162ff89
12 changed files with 359 additions and 36 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
Documentation/devicetree/bindings/nvmem/allwinner,sunxi-sid.txt
View File

@ -4,6 +4,7 @@ Required properties:
- compatible: Should be one of the following:
"allwinner,sun4i-a10-sid"
"allwinner,sun7i-a20-sid"
"allwinner,sun8i-a83t-sid"
"allwinner,sun8i-h3-sid"
"allwinner,sun50i-a64-sid"

3
arch/arm/boot/dts/Makefile
View File

@ -966,6 +966,7 @@ dtb-$(CONFIG_MACH_SUN7I) += \
sun7i-a20-m3.dtb \
sun7i-a20-mk808c.dtb \
sun7i-a20-olimex-som-evb.dtb \
sun7i-a20-olimex-som-evb-emmc.dtb \
sun7i-a20-olimex-som204-evb.dtb \
sun7i-a20-olimex-som204-evb-emmc.dtb \
sun7i-a20-olinuxino-lime.dtb \
@ -1017,6 +1018,8 @@ dtb-$(CONFIG_MACH_SUN8I) += \
sun8i-h3-orangepi-plus.dtb \
sun8i-h3-orangepi-plus2e.dtb \
sun8i-r16-bananapi-m2m.dtb \
sun8i-r16-nintendo-nes-classic.dtb \
sun8i-r16-nintendo-super-nes-classic.dtb \
sun8i-r16-parrot.dtb \
sun8i-r40-bananapi-m2-ultra.dtb \
sun8i-v3s-licheepi-zero.dtb \

37
arch/arm/boot/dts/sun7i-a20-olimex-som-evb-emmc.dts Normal file
View File

@ -0,0 +1,37 @@
// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Device Tree Source for A20-Olimex-SOM-EVB-eMMC Board
*
* Copyright (C) 2018 Olimex Ltd.
* Author: Stefan Mavrodiev <stefan@olimex.com>
*/
/dts-v1/;
#include "sun7i-a20-olimex-som-evb.dts"
/ {
model = "Olimex A20-Olimex-SOM-EVB-eMMC";
compatible = "olimex,a20-olimex-som-evb-emmc", "allwinner,sun7i-a20";
mmc2_pwrseq: mmc2_pwrseq {
compatible = "mmc-pwrseq-emmc";
reset-gpios = <&pio 2 18 GPIO_ACTIVE_LOW>;
};
};
&mmc2 {
pinctrl-names = "default";
pinctrl-0 = <&mmc2_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
mmc-pwrseq = <&mmc2_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
emmc: emmc@0 {
reg = <0>;
compatible = "mmc-card";
broken-hpi;
};
};

3
arch/arm/boot/dts/sun7i-a20-olimex-som204-evb.dts
View File

@ -172,8 +172,7 @@ &mmc0 {
pinctrl-0 = <&mmc0_pins_a>;
vmmc-supply = <&reg_vcc3v3>;
bus-width = <4>;
cd-gpios = <&pio 7 1 GPIO_ACTIVE_HIGH>;
cd-inverted;
cd-gpios = <&pio 7 1 GPIO_ACTIVE_LOW>;
status = "okay";
};

33
arch/arm/boot/dts/sun8i-a23-a33.dtsi
View File

@ -198,6 +198,8 @@ nfc: nand@1c03000 {
clock-names = "ahb", "mod";
resets = <&ccu RST_BUS_NAND>;
reset-names = "ahb";
pinctrl-names = "default";
pinctrl-0 = <&nand_pins &nand_pins_cs0 &nand_pins_rb0>;
status = "disabled";
#address-cells = <1>;
#size-cells = <0>;
@ -315,6 +317,37 @@ mmc2_8bit_pins: mmc2_8bit {
bias-pull-up;
};
nand_pins: nand-pins {
pins = "PC0", "PC1", "PC2", "PC5",
"PC8", "PC9", "PC10", "PC11",
"PC12", "PC13", "PC14", "PC15";
function = "nand0";
};
nand_pins_cs0: nand-pins-cs0 {
pins = "PC4";
function = "nand0";
bias-pull-up;
};
nand_pins_cs1: nand-pins-cs1 {
pins = "PC3";
function = "nand0";
bias-pull-up;
};
nand_pins_rb0: nand-pins-rb0 {
pins = "PC6";
function = "nand0";
bias-pull-up;
};
nand_pins_rb1: nand-pins-rb1 {
pins = "PC7";
function = "nand0";
bias-pull-up;
};
pwm0_pins: pwm0 {
pins = "PH0";
function = "pwm0";

44
arch/arm/boot/dts/sun8i-a33.dtsi
View File

@ -236,6 +236,11 @@ tcon0_out: port@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
tcon0_out_dsi: endpoint@1 {
reg = <1>;
remote-endpoint = <&dsi_in_tcon0>;
};
};
};
};
@ -280,6 +285,45 @@ ths: ths@1c25000 {
#io-channel-cells = <0>;
};
dsi: dsi@1ca0000 {
compatible = "allwinner,sun6i-a31-mipi-dsi";
reg = <0x01ca0000 0x1000>;
interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&ccu CLK_BUS_MIPI_DSI>,
<&ccu CLK_DSI_SCLK>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_MIPI_DSI>;
phys = <&dphy>;
phy-names = "dphy";
status = "disabled";
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
dsi_in_tcon0: endpoint {
remote-endpoint = <&tcon0_out_dsi>;
};
};
};
};
dphy: d-phy@1ca1000 {
compatible = "allwinner,sun6i-a31-mipi-dphy";
reg = <0x01ca1000 0x1000>;
clocks = <&ccu CLK_BUS_MIPI_DSI>,
<&ccu CLK_DSI_DPHY>;
clock-names = "bus", "mod";
resets = <&ccu RST_BUS_MIPI_DSI>;
status = "disabled";
#phy-cells = <0>;
};
fe0: display-frontend@1e00000 {
compatible = "allwinner,sun8i-a33-display-frontend";
reg = <0x01e00000 0x20000>;

64
arch/arm/boot/dts/sun8i-a83t.dtsi
View File

@ -66,6 +66,8 @@ cpu0: cpu@0 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0>;
};
@ -73,6 +75,8 @@ cpu@1 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <1>;
};
@ -80,6 +84,8 @@ cpu@2 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <2>;
};
@ -87,6 +93,8 @@ cpu@3 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu0_opp_table>;
cci-control-port = <&cci_control0>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <3>;
};
@ -96,6 +104,8 @@ cpu100: cpu@100 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x100>;
};
@ -103,6 +113,8 @@ cpu@101 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x101>;
};
@ -110,6 +122,8 @@ cpu@102 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x102>;
};
@ -117,6 +131,8 @@ cpu@103 {
compatible = "arm,cortex-a7";
device_type = "cpu";
operating-points-v2 = <&cpu1_opp_table>;
cci-control-port = <&cci_control1>;
enable-method = "allwinner,sun8i-a83t-smp";
reg = <0x103>;
};
};
@ -349,6 +365,44 @@ mixer1_out_tcon1: endpoint {
};
};
cpucfg@1700000 {
compatible = "allwinner,sun8i-a83t-cpucfg";
reg = <0x01700000 0x400>;
};
cci@1790000 {
compatible = "arm,cci-400";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x01790000 0x10000>;
ranges = <0x0 0x01790000 0x10000>;
cci_control0: slave-if@4000 {
compatible = "arm,cci-400-ctrl-if";
interface-type = "ace";
reg = <0x4000 0x1000>;
};
cci_control1: slave-if@5000 {
compatible = "arm,cci-400-ctrl-if";
interface-type = "ace";
reg = <0x5000 0x1000>;
};
pmu@9000 {
compatible = "arm,cci-400-pmu,r1";
reg = <0x9000 0x5000>;
interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 134 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 151 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
};
};
syscon: syscon@1c00000 {
compatible = "allwinner,sun8i-a83t-system-controller",
"syscon";
@ -492,6 +546,11 @@ mmc2: mmc@1c11000 {
#size-cells = <0>;
};
sid: eeprom@1c14000 {
compatible = "allwinner,sun8i-a83t-sid";
reg = <0x1c14000 0x400>;
};
usb_otg: usb@1c19000 {
compatible = "allwinner,sun8i-a83t-musb",
"allwinner,sun8i-a33-musb";
@ -928,6 +987,11 @@ r_ccu: clock@1f01400 {
#reset-cells = <1>;
};
r_cpucfg@1f01c00 {
compatible = "allwinner,sun8i-a83t-r-cpucfg";
reg = <0x1f01c00 0x400>;
};
r_pio: pinctrl@1f02c00 {
compatible = "allwinner,sun8i-a83t-r-pinctrl";
reg = <0x01f02c00 0x400>;

56
arch/arm/boot/dts/sun8i-r16-nintendo-nes-classic.dts Normal file
View File

@ -0,0 +1,56 @@
// SPDX-License-Identifier: GPL-2.0 OR X11
/* Copyright (c) 2016 FUKAUMI Naoki <naobsd@gmail.com> */
/dts-v1/;
#include "sun8i-a33.dtsi"
#include "sunxi-common-regulators.dtsi"
/ {
model = "Nintendo NES Classic Edition";
compatible = "nintendo,nes-classic", "allwinner,sun8i-r16",
"allwinner,sun8i-a33";
aliases {
serial0 = &uart0;
};
chosen {
stdout-path = "serial0:115200n8";
};
};
&uart0 {
/*
* UART0 is available on two ports: PB and PF, both are accessible.
* PF can also be used for the SD card so PB is preferred.
*/
pinctrl-names = "default";
pinctrl-0 = <&uart0_pins_a>;
status = "okay";
};
&nfc {
status = "okay";
/* 2Gb Macronix MX30LF2G18AC (3V) */
nand@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
allwinner,rb = <0>;
nand-ecc-mode = "hw";
nand-ecc-strength = <16>;
nand-ecc-step-size = <1024>;
};
};
&usb_otg {
status = "okay";
dr_mode = "otg";
};
&usbphy {
/* VBUS is always on because it is wired to the power supply */
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};

11
arch/arm/boot/dts/sun8i-r16-nintendo-super-nes-classic.dts Normal file
View File

@ -0,0 +1,11 @@
// SPDX-License-Identifier: GPL-2.0 OR X11
/* Copyright (c) 2018 Miquèl RAYNAL <miquel.raynal@bootlin.com> */
/dts-v1/;
#include "sun8i-r16-nintendo-nes-classic.dts"
/ {
model = "Nintendo SuperNES Classic Edition";
compatible = "nintendo,super-nes-classic", "nintendo,nes-classic",
"allwinner,sun8i-r16", "allwinner,sun8i-a33";
};

99
arch/arm/boot/dts/sun8i-r40-bananapi-m2-ultra.dts
View File

@ -51,6 +51,7 @@ / {
compatible = "sinovoip,bpi-m2-ultra", "allwinner,sun8i-r40";
aliases {
ethernet0 = &gmac;
serial0 = &uart0;
};
@ -101,6 +102,22 @@ &ehci2 {
status = "okay";
};
&gmac {
pinctrl-names = "default";
pinctrl-0 = <&gmac_rgmii_pins>;
phy-handle = <&phy1>;
phy-mode = "rgmii";
phy-supply = <&reg_dc1sw>;
status = "okay";
};
&gmac_mdio {
phy1: ethernet-phy@1 {
compatible = "ethernet-phy-ieee802.3-c22";
reg = <1>;
};
};
&i2c0 {
status = "okay";
@ -114,6 +131,48 @@ axp22x: pmic@34 {
#include "axp22x.dtsi"
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 7 13 GPIO_ACTIVE_HIGH>; /* PH13 */
cd-inverted;
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pg_pins>;
vmmc-supply = <&reg_dldo2>;
vqmmc-supply = <&reg_dldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&mmc2 {
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&reg_aldo2 {
regulator-always-on;
regulator-min-microvolt = <2500000>;
regulator-max-microvolt = <2500000>;
regulator-name = "vcc-pa";
};
&reg_aldo3 {
regulator-always-on;
regulator-min-microvolt = <2700000>;
@ -121,6 +180,12 @@ &reg_aldo3 {
regulator-name = "avcc";
};
&reg_dc1sw {
regulator-min-microvolt = <3000000>;
regulator-max-microvolt = <3000000>;
regulator-name = "vcc-gmac-phy";
};
&reg_dcdc1 {
regulator-always-on;
regulator-min-microvolt = <3000000>;
@ -161,40 +226,6 @@ &reg_dldo2 {
regulator-name = "vcc-wifi";
};
&mmc0 {
vmmc-supply = <&reg_dcdc1>;
bus-width = <4>;
cd-gpios = <&pio 7 13 GPIO_ACTIVE_LOW>; /* PH13 */
status = "okay";
};
&mmc1 {
pinctrl-names = "default";
pinctrl-0 = <&mmc1_pg_pins>;
vmmc-supply = <&reg_dldo2>;
vqmmc-supply = <&reg_dldo1>;
mmc-pwrseq = <&wifi_pwrseq>;
bus-width = <4>;
non-removable;
status = "okay";
};
&mmc2 {
vmmc-supply = <&reg_dcdc1>;
vqmmc-supply = <&reg_dcdc1>;
bus-width = <8>;
non-removable;
status = "okay";
};
&ohci1 {
status = "okay";
};
&ohci2 {
status = "okay";
};
&uart0 {
pinctrl-names = "default";
pinctrl-0 = <&uart0_pb_pins>;

34
arch/arm/boot/dts/sun8i-r40.dtsi
View File

@ -265,6 +265,19 @@ pio: pinctrl@1c20800 {
#interrupt-cells = <3>;
#gpio-cells = <3>;
gmac_rgmii_pins: gmac-rgmii-pins {
pins = "PA0", "PA1", "PA2", "PA3",
"PA4", "PA5", "PA6", "PA7",
"PA8", "PA10", "PA11", "PA12",
"PA13", "PA15", "PA16";
function = "gmac";
/*
* data lines in RGMII mode use DDR mode
* and need a higher signal drive strength
*/
drive-strength = <40>;
};
i2c0_pins: i2c0-pins {
pins = "PB0", "PB1";
function = "i2c0";
@ -451,6 +464,27 @@ i2c4: i2c@1c2c000 {
#size-cells = <0>;
};
gmac: ethernet@1c50000 {
compatible = "allwinner,sun8i-r40-gmac";
syscon = <&ccu>;
reg = <0x01c50000 0x10000>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "macirq";
resets = <&ccu RST_BUS_GMAC>;
reset-names = "stmmaceth";
clocks = <&ccu CLK_BUS_GMAC>;
clock-names = "stmmaceth";
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
gmac_mdio: mdio {
compatible = "snps,dwmac-mdio";
#address-cells = <1>;
#size-cells = <0>;
};
};
gic: interrupt-controller@1c81000 {
compatible = "arm,gic-400";
reg = <0x01c81000 0x1000>,

10
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts
View File

@ -87,6 +87,11 @@ wifi_pwrseq: wifi_pwrseq {
};
};
&ehci1 {
/* Terminus Tech FE 1.1s 4-port USB 2.0 hub here */
status = "okay";
};
&i2c0 {
status = "okay";
@ -170,3 +175,8 @@ &uart0 {
pinctrl-0 = <&uart0_pb_pins>;
status = "okay";
};
&usbphy {
usb1_vbus-supply = <&reg_vcc5v0>;
status = "okay";
};