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MIPS: Reorder MIPS_L1_CACHE_SHIFT priorities
Enabling support for more than one BMIPS CPU in the same build may result in different L1_CACHE_SHIFT values, e.g. CPU_BMIPS5000 selects MIPS_L1_CACHE_SHIFT_7 CPU_BMIPS4380 selects MIPS_L1_CACHE_SHIFT_6 anything else defaults to MIPS_L1_CACHE_SHIFT_5 Ensure that if more than one MIPS_L1_CACHE_SHIFT_x option is selected, Kconfig sets CONFIG_MIPS_L1_CACHE_SHIFT to the highest value. Signed-off-by: Kevin Cernekee <cernekee@gmail.com> Cc: f.fainelli@gmail.com Cc: jaedon.shin@gmail.com Cc: abrestic@chromium.org Cc: tglx@linutronix.de Cc: jason@lakedaemon.net Cc: jogo@openwrt.org Cc: arnd@arndb.de Cc: computersforpeace@gmail.com Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -1233,10 +1233,10 @@ config MIPS_L1_CACHE_SHIFT_7
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config MIPS_L1_CACHE_SHIFT
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int
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default "4" if MIPS_L1_CACHE_SHIFT_4
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default "5" if MIPS_L1_CACHE_SHIFT_5
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default "6" if MIPS_L1_CACHE_SHIFT_6
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default "7" if MIPS_L1_CACHE_SHIFT_7
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default "6" if MIPS_L1_CACHE_SHIFT_6
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default "5" if MIPS_L1_CACHE_SHIFT_5
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default "4" if MIPS_L1_CACHE_SHIFT_4
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default "5"
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config HAVE_STD_PC_SERIAL_PORT
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