mirror of https://gitee.com/openkylin/linux.git
ARM: kirkwood: Relocate PCIe device tree nodes
Now that mbus has been added to the device tree, it's possible to move the PCIe nodes out of the ocp node, placing it directly below the mbus. This is a more accurate representation of the hardware. Moving the PCIe nodes, we now need to introduce an extra cell to encode the window target ID and attribute. Since this depends on the PCIe port, we split the ranges translation entries, to correspond to each MBus window. In addition, we encode the PCIe memory and I/O apertures in the MBus node, according to the MBus DT binding specification. The choice made is 0xe0000000-0xf0000000 for memory space, and 0xf200000-0xf2100000 for I/O space. These apertures can be changed in each per-board DT file. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-by: Andrew Lunn <andrew@lunn.ch> Tested-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Jason Cooper <jason@lakedaemon.net>
This commit is contained in:
parent
3ec81e7e03
commit
54397d8534
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@ -1,4 +1,39 @@
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/ {
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mbus {
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pcie-controller {
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compatible = "marvell,kirkwood-pcie";
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status = "disabled";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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ranges =
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<0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
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0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
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0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */>;
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pcie@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
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0x81000000 0 0 0x81000000 0x1 0 1 0>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 9>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 2>;
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status = "disabled";
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};
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};
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};
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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compatible = "marvell,88f6281-pinctrl";
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@ -41,37 +76,6 @@ pmx_sdio: pmx-sdio {
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};
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};
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pcie-controller {
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compatible = "marvell,kirkwood-pcie";
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status = "disabled";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
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0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
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0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
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pcie@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 9>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 2>;
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status = "disabled";
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};
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};
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rtc@10300 {
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compatible = "marvell,kirkwood-rtc", "marvell,orion-rtc";
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reg = <0x10300 0x20>;
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@ -1,4 +1,59 @@
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/ {
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mbus {
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pcie-controller {
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compatible = "marvell,kirkwood-pcie";
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status = "disabled";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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ranges =
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<0x82000000 0 0x40000 MBUS_ID(0xf0, 0x01) 0x40000 0 0x00002000
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0x82000000 0 0x44000 MBUS_ID(0xf0, 0x01) 0x44000 0 0x00002000
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0x82000000 0 0x80000 MBUS_ID(0xf0, 0x01) 0x80000 0 0x00002000
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0x82000000 0x1 0 MBUS_ID(0x04, 0xe8) 0 1 0 /* Port 0.0 MEM */
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0x81000000 0x1 0 MBUS_ID(0x04, 0xe0) 0 1 0 /* Port 0.0 IO */
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0x82000000 0x2 0 MBUS_ID(0x04, 0xd8) 0 1 0 /* Port 1.0 MEM */
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0x81000000 0x2 0 MBUS_ID(0x04, 0xd0) 0 1 0 /* Port 1.0 IO */>;
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pcie@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0
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0x81000000 0 0 0x81000000 0x1 0 1 0>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 9>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 2>;
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status = "disabled";
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};
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pcie@2,0 {
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device_type = "pci";
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assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0
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0x81000000 0 0 0x81000000 0x2 0 1 0>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 10>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 18>;
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status = "disabled";
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};
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};
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};
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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@ -94,52 +149,5 @@ i2c@11100 {
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status = "disabled";
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};
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pcie-controller {
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compatible = "marvell,kirkwood-pcie";
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status = "disabled";
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device_type = "pci";
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#address-cells = <3>;
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#size-cells = <2>;
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bus-range = <0x00 0xff>;
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ranges = <0x82000000 0 0x00040000 0x00040000 0 0x00002000 /* Port 0.0 registers */
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0x82000000 0 0x00044000 0x00044000 0 0x00002000 /* Port 1.0 registers */
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0x82000000 0 0xe0000000 0xe0000000 0 0x08000000 /* non-prefetchable memory */
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0x81000000 0 0 0xe8000000 0 0x00100000>; /* downstream I/O */
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pcie@1,0 {
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device_type = "pci";
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assigned-addresses = <0x82000800 0 0x00040000 0 0x2000>;
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reg = <0x0800 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 9>;
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marvell,pcie-port = <0>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 2>;
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status = "disabled";
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};
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pcie@2,0 {
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device_type = "pci";
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assigned-addresses = <0x82001000 0 0x00044000 0 0x2000>;
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reg = <0x1000 0 0 0 0>;
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#address-cells = <3>;
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#size-cells = <2>;
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#interrupt-cells = <1>;
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ranges;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &intc 10>;
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marvell,pcie-port = <1>;
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marvell,pcie-lane = <0>;
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clocks = <&gate_clk 18>;
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status = "disabled";
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};
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};
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};
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};
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@ -18,7 +18,8 @@ / {
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model = "Marvell DB-88F6281-BP Development Board";
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compatible = "marvell,db-88f6281-bp", "marvell,kirkwood-88f6281", "marvell,kirkwood";
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ocp@f1000000 {
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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@ -18,7 +18,8 @@ / {
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model = "Marvell DB-88F6282-BP Development Board";
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compatible = "marvell,db-88f6282-bp", "marvell,kirkwood-88f6282", "marvell,kirkwood";
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ocp@f1000000 {
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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@ -77,13 +77,5 @@ mvsdio@90000 {
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cd-gpios = <&gpio1 6 0>;
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status = "okay";
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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};
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@ -18,6 +18,17 @@ chosen {
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linux,initrd-end = <0x4800000>;
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};
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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pmx_button_reset: pmx-button-reset {
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@ -101,14 +112,6 @@ partition@980000 {
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reg = <0x980000 0x1f400000>;
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};
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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gpio-leds {
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@ -16,6 +16,17 @@ chosen {
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bootargs = "console=ttyS0,115200n8 earlyprintk";
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};
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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pmx_led_health: pmx-led-health {
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@ -134,14 +145,6 @@ mvsdio@90000 {
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cd-gpios = <&gpio1 15 1>;
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/* No WP GPIO */
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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gpio-leds {
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@ -16,6 +16,17 @@ chosen {
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bootargs = "console=ttyS0,115200n8 earlyprintk";
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};
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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pmx_button_power: pmx-button-power {
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@ -101,14 +112,6 @@ sata@80000 {
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status = "okay";
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nr-ports = <2>;
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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gpio-leds {
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@ -16,6 +16,17 @@ chosen {
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bootargs = "console=ttyS0,115200";
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};
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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pinctrl-0 = <&pmx_unknown>;
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@ -162,14 +173,6 @@ partition@5040000 {
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reg = <0x5040000 0x2fc0000>;
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};
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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gpio_keys {
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@ -5,6 +5,17 @@
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#include "kirkwood-ts219.dtsi"
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/ {
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mbus {
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ranges = <MBUS_ID(0xf0, 0x01) 0 0xf1000000 0x100000>;
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pcie-controller {
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status = "okay";
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pcie@2,0 {
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status = "okay";
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};
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};
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};
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ocp@f1000000 {
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pinctrl: pinctrl@10000 {
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@ -30,14 +41,6 @@ pmx_board_id: pmx-board-id {
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marvell,function = "gpio";
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};
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};
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pcie-controller {
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status = "okay";
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pcie@2,0 {
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status = "okay";
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};
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};
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};
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gpio_keys {
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@ -11,6 +11,16 @@ chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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mbus {
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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ocp@f1000000 {
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i2c@11000 {
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status = "okay";
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@ -87,12 +97,5 @@ sata@80000 {
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status = "okay";
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nr-ports = <2>;
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};
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pcie-controller {
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status = "okay";
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pcie@1,0 {
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status = "okay";
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};
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};
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};
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};
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@ -32,13 +32,16 @@ intc: interrupt-controller {
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mbus {
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compatible = "marvell,kirkwood-mbus", "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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controller = <&mbusc>;
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pcie-mem-aperture = <0xe0000000 0x10000000>; /* 256 MiB memory space */
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pcie-io-aperture = <0xf2000000 0x100000>; /* 1 MiB I/O space */
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};
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ocp@f1000000 {
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compatible = "simple-bus";
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ranges = <0x00000000 0xf1000000 0x0100000
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0xe0000000 0xe0000000 0x8100000 /* PCIE */
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0xf4000000 0xf4000000 0x0000400
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0xf5000000 0xf5000000 0x0000400>;
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#address-cells = <1>;
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