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drm/nouveau: switch to new-style timer macros 

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2015-08-20 14:54:11 +10:00
parent 37eabb030c
commit 5444204036
5 changed files with 35 additions and 48 deletions
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24
drivers/gpu/drm/nouveau/dispnv04/dac.c
View File

@ -66,7 +66,6 @@ int nv04_dac_output_offset(struct drm_encoder *encoder)
static int sample_load_twice(struct drm_device *dev, bool sense[2])
{
struct nvif_device *device = &nouveau_drm(dev)->device;
struct nvkm_timer *tmr = nvxx_timer(device);
int i;
for (i = 0; i < 2; i++) {
@ -80,17 +79,22 @@ static int sample_load_twice(struct drm_device *dev, bool sense[2])
* use a 10ms timeout (guards against crtc being inactive, in
* which case blank state would never change)
*/
if (!nvkm_timer_wait_eq(tmr, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
if (nvif_msec(device, 10,
if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1))
break;
) < 0)
return -EBUSY;
if (!nvkm_timer_wait_eq(tmr, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000001))
if (nvif_msec(device, 10,
if ( (nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1))
break;
) < 0)
return -EBUSY;
if (!nvkm_timer_wait_eq(tmr, 10000000,
NV_PRMCIO_INP0__COLOR,
0x00000001, 0x00000000))
if (nvif_msec(device, 10,
if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 1))
break;
) < 0)
return -EBUSY;
udelay(100);

11
drivers/gpu/drm/nouveau/dispnv04/hw.c
View File

@ -661,7 +661,6 @@ nv_load_state_ext(struct drm_device *dev, int head,
{
struct nouveau_drm *drm = nouveau_drm(dev);
struct nvif_device *device = &drm->device;
struct nvkm_timer *tmr = nvxx_timer(device);
struct nv04_crtc_reg *regp = &state->crtc_reg[head];
uint32_t reg900;
int i;
@ -741,8 +740,14 @@ nv_load_state_ext(struct drm_device *dev, int head,
if (drm->device.info.family < NV_DEVICE_INFO_V0_KELVIN) {
/* Not waiting for vertical retrace before modifying
CRE_53/CRE_54 causes lockups. */
nvkm_timer_wait_eq(tmr, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x8);
nvkm_timer_wait_eq(tmr, 650000000, NV_PRMCIO_INP0__COLOR, 0x8, 0x0);
nvif_msec(device, 650,
if ( (nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 8))
break;
);
nvif_msec(device, 650,
if (!(nvif_rd32(device, NV_PRMCIO_INP0__COLOR) & 8))
break;
);
}
wr_cio_state(dev, head, regp, NV_CIO_CRE_42);

2
drivers/gpu/drm/nouveau/include/nvif/device.h
View File

@ -68,8 +68,6 @@ u64 nvif_device_time(struct nvif_device *);
#define nvxx_clk(a) nvkm_clk(nvxx_device(a))
#define nvxx_i2c(a) nvkm_i2c(nvxx_device(a))
#define nvxx_timer(a) nvkm_timer(nvxx_device(a))
#define nvxx_wait(a,b,c,d) nv_wait(nvxx_timer(a), (b), (c), (d))
#define nvxx_wait_cb(a,b,c) nv_wait_cb(nvxx_timer(a), (b), (c))
#define nvxx_therm(a) nvkm_therm(nvxx_device(a))
#include <core/device.h>

30
drivers/gpu/drm/nouveau/include/nvkm/subdev/timer.h
View File

@ -51,36 +51,6 @@ void nvkm_timer_alarm_cancel(void *, struct nvkm_alarm *);
#define nvkm_usec(d,u,cond...) nvkm_nsec((d), (u) * 1000, ##cond)
#define nvkm_msec(d,m,cond...) nvkm_usec((d), (m) * 1000, ##cond)
#define nvkm_timer_wait_eq(o,n,a,m,v) ({ \
struct nvkm_device *__device = nv_device(o); \
nvkm_nsec(__device, (n), \
if ((nvkm_rd32(__device, (a)) & (m)) == (v)) \
break; \
) >= 0; \
})
#define nvkm_timer_wait_ne(o,n,a,m,v) ({ \
struct nvkm_device *__device = nv_device(o); \
nvkm_nsec(__device, (n), \
if ((nvkm_rd32(__device, (a)) & (m)) != (v)) \
break; \
) >= 0; \
})
#define nvkm_timer_wait_cb(o,n,c,d) ({ \
struct nvkm_device *__device = nv_device(o); \
nvkm_nsec(__device, (n), \
if (c(d)) \
break; \
) >= 0; \
})
#define NV_WAIT_DEFAULT 2000000000ULL
#define nv_wait(o,a,m,v) \
nvkm_timer_wait_eq((o), NV_WAIT_DEFAULT, (a), (m), (v))
#define nv_wait_ne(o,a,m,v) \
nvkm_timer_wait_ne((o), NV_WAIT_DEFAULT, (a), (m), (v))
#define nv_wait_cb(o,c,d) \
nvkm_timer_wait_cb((o), NV_WAIT_DEFAULT, (c), (d))
struct nvkm_timer {
struct nvkm_subdev subdev;
u64 (*read)(struct nvkm_timer *);

16
drivers/gpu/drm/nouveau/nv50_display.c
View File

@ -413,6 +413,7 @@ static u32 *
evo_wait(void *evoc, int nr)
{
struct nv50_dmac *dmac = evoc;
struct nvif_device *device = nvif_device(&dmac->base.user);
u32 put = nvif_rd32(&dmac->base.user, 0x0000) / 4;
mutex_lock(&dmac->lock);
@ -420,7 +421,10 @@ evo_wait(void *evoc, int nr)
dmac->ptr[put] = 0x20000000;
nvif_wr32(&dmac->base.user, 0x0000, 0x00000000);
if (!nvxx_wait(&dmac->base.user, 0x0004, ~0, 0x00000000)) {
if (nvif_msec(device, 2000,
if (!nvif_rd32(&dmac->base.user, 0x0004))
break;
) < 0) {
mutex_unlock(&dmac->lock);
nv_error(nvxx_object(&dmac->base.user), "channel stalled\n");
return NULL;
@ -480,7 +484,10 @@ evo_sync(struct drm_device *dev)
evo_data(push, 0x00000000);
evo_data(push, 0x00000000);
evo_kick(push, mast);
if (nv_wait_cb(nvxx_device(device), evo_sync_wait, disp->sync))
if (nvif_msec(device, 2000,
if (evo_sync_wait(disp->sync))
break;
) >= 0)
return 0;
}
@ -535,7 +542,10 @@ nv50_display_flip_stop(struct drm_crtc *crtc)
evo_kick(push, flip.chan);
}
nv_wait_cb(nvxx_device(device), nv50_display_flip_wait, &flip);
nvif_msec(device, 2000,
if (nv50_display_flip_wait(&flip))
break;
);
}
int