mirror of https://gitee.com/openkylin/linux.git
drm/i915: remove HAS_eDP as unnecessary and inconsistent indirection
Signed-off-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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547dc041df
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@ -41,8 +41,6 @@
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#include <drm/drm_crtc_helper.h>
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#include <drm/drm_crtc_helper.h>
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#include <linux/dma_remapping.h>
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#include <linux/dma_remapping.h>
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#define HAS_eDP (intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))
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bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
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bool intel_pipe_has_type(struct drm_crtc *crtc, int type);
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static void intel_increase_pllclock(struct drm_crtc *crtc);
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static void intel_increase_pllclock(struct drm_crtc *crtc);
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static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
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static void intel_crtc_update_cursor(struct drm_crtc *crtc, bool on);
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@ -541,7 +539,7 @@ static const intel_limit_t *intel_ironlake_limit(struct drm_crtc *crtc,
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limit = &intel_limits_ironlake_single_lvds;
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limit = &intel_limits_ironlake_single_lvds;
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}
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}
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} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
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} else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_DISPLAYPORT) ||
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HAS_eDP)
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intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))
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limit = &intel_limits_ironlake_display_port;
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limit = &intel_limits_ironlake_display_port;
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else
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else
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limit = &intel_limits_ironlake_dac;
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limit = &intel_limits_ironlake_dac;
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@ -3398,7 +3396,8 @@ static void ironlake_crtc_enable(struct drm_crtc *crtc)
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/* Enable panel fitting for LVDS */
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/* Enable panel fitting for LVDS */
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if (dev_priv->pch_pf_size &&
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if (dev_priv->pch_pf_size &&
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(intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) || HAS_eDP)) {
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(intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) ||
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intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP))) {
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/* Force use of hard-coded filter coefficients
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/* Force use of hard-coded filter coefficients
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* as some pre-programmed values are broken,
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* as some pre-programmed values are broken,
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* e.g. x201.
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* e.g. x201.
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@ -3473,7 +3472,8 @@ static void haswell_crtc_enable(struct drm_crtc *crtc)
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intel_ddi_enable_pipe_clock(intel_crtc);
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intel_ddi_enable_pipe_clock(intel_crtc);
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/* Enable panel fitting for eDP */
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/* Enable panel fitting for eDP */
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if (dev_priv->pch_pf_size && HAS_eDP) {
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if (dev_priv->pch_pf_size &&
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intel_pipe_has_type(crtc, INTEL_OUTPUT_EDP)) {
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/* Force use of hard-coded filter coefficients
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/* Force use of hard-coded filter coefficients
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* as some pre-programmed values are broken,
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* as some pre-programmed values are broken,
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* e.g. x201.
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* e.g. x201.
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