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Documentation: fix typo and update version in cachetlb.txt 

Fix a typo, and the reference to a proposed v2.7 kernel, as
that in itself is dated.

Signed-off-by: Paul Gortmaker <paul.gortmaker@windriver.com>
Acked-by: Rob Landley <rob@landley.net>
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
This commit is contained in:
Paul Gortmaker 2013-08-12 19:55:49 -04:00 committed by Jiri Kosina
parent 0dc5d4f708
commit 548a1950f8
1 changed files with 3 additions and 3 deletions
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Documentation/cachetlb.txt
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@ -57,7 +57,7 @@ changes occur:
interface must make sure that any previous page table
modifications for the address space 'vma->vm_mm' in the range
'start' to 'end-1' will be visible to the cpu. That is, after
running, here will be no entries in the TLB for 'mm' for
running, there will be no entries in the TLB for 'mm' for
virtual addresses in the range 'start' to 'end-1'.
The "vma" is the backing store being used for the region.
@ -375,8 +375,8 @@ maps this page at its virtual address.
void flush_icache_page(struct vm_area_struct *vma, struct page *page)
All the functionality of flush_icache_page can be implemented in
flush_dcache_page and update_mmu_cache. In 2.7 the hope is to
remove this interface completely.
flush_dcache_page and update_mmu_cache. In the future, the hope
is to remove this interface completely.
The final category of APIs is for I/O to deliberately aliased address
ranges inside the kernel. Such aliases are set up by use of the