Merge branch 'dts-cpus-updates' of git://linux-arm.org/linux-2.6-lp into next/dt

From Lorenzo Pieralisi, this is a series of patches that cleans up the CPU
nodes in most of the SoC dtsi files to conform to the standard bindings.

* 'dts-cpus-updates' of git://linux-arm.org/linux-2.6-lp:
  ARM: dts: sunxi: cpus/cpu nodes dts updates
  ARM: dts: spear: cpus/cpu nodes dts updates
  ARM: dts: sh7372: cpus/cpu nodes dts updates
  ARM: dts: r8a7740: cpus/cpu nodes dts updates
  ARM: dts: pxa2xx: cpus/cpu nodes dts updates
  ARM: dts: prima2: cpus/cpu node dts updates
  ARM: dts: picoxcell: cpus/cpu nodes dts updates
  ARM: dts: omap: cpus/cpu nodes dts updates
  ARM: dts: lpc32xx: cpus/cpu nodes dts updates
  ARM: dts: imx: cpus/cpu nodes dts updates
  ARM: dts: exynos5440: cpus/cpu nodes dts updates
  ARM: dts: at91: cpus/cpu node dts updates
  ARM: dts: armada-370-xp: cpus/cpu node dts updates
  ARM: dts: am33xx: cpus/cpu nodes dts updates

Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson 2013-06-07 16:38:54 -07:00
commit 54edc2524d
30 changed files with 139 additions and 32 deletions

View File

@ -26,8 +26,12 @@ aliases {
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a8";
device_type = "cpu";
reg = <0>;
/*
* To consider voltage drop between PMIC and SoC,

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@ -23,8 +23,12 @@ / {
compatible = "marvell,armada-370-xp";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "marvell,sheeva-v7";
device_type = "cpu";
reg = <0>;
};
};

View File

@ -38,8 +38,12 @@ aliases {
ssc2 = &ssc2;
};
cpus {
cpu@0 {
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm920t";
device_type = "cpu";
};
};

View File

@ -35,8 +35,12 @@ aliases {
ssc0 = &ssc0;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

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@ -32,8 +32,12 @@ aliases {
ssc1 = &ssc1;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

View File

@ -38,8 +38,12 @@ aliases {
ssc1 = &ssc1;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

View File

@ -34,8 +34,12 @@ aliases {
ssc0 = &ssc0;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

View File

@ -36,8 +36,12 @@ aliases {
ssc0 = &ssc0;
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

View File

@ -38,18 +38,22 @@ cpus {
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <1>;
};
cpu@2 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <2>;
};
cpu@3 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <3>;
};

View File

@ -23,8 +23,12 @@ aliases {
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

View File

@ -32,8 +32,12 @@ aliases {
};
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

View File

@ -18,12 +18,14 @@ cpus {
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};

View File

@ -18,6 +18,7 @@ cpus {
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
operating-points = <
@ -39,18 +40,21 @@ cpu@0 {
cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};
cpu@2 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <2>;
next-level-cache = <&L2>;
};
cpu@3 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <3>;
next-level-cache = <&L2>;
};

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@ -18,8 +18,12 @@ / {
interrupt-parent = <&mic>;
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

View File

@ -21,8 +21,12 @@ aliases {
};
cpus {
cpu@0 {
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm1136jf-s";
device_type = "cpu";
};
};

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@ -21,8 +21,13 @@ aliases {
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a8";
device_type = "cpu";
reg = <0x0>;
};
};

View File

@ -28,13 +28,20 @@ aliases {
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
next-level-cache = <&L2>;
reg = <0x0>;
};
cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
next-level-cache = <&L2>;
reg = <0x1>;
};
};

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@ -34,11 +34,18 @@ aliases {
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x0>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a15";
reg = <0x1>;
};
};

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@ -18,13 +18,13 @@ / {
#size-cells = <1>;
cpus {
#address-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,1176jz-s";
cpu {
compatible = "arm,arm1176jz-s";
device_type = "cpu";
clock-frequency = <400000000>;
reg = <0>;
d-cache-line-size = <32>;
d-cache-size = <32768>;
i-cache-line-size = <32>;

View File

@ -18,13 +18,13 @@ / {
#size-cells = <1>;
cpus {
#address-cells = <1>;
#address-cells = <0>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,1176jz-s";
cpu {
compatible = "arm,arm1176jz-s";
device_type = "cpu";
cpu-clock = <&arm_clk>, "cpu";
reg = <0>;
d-cache-line-size = <32>;
d-cache-size = <32768>;
i-cache-line-size = <32>;

View File

@ -18,6 +18,8 @@ cpus {
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x0>;
d-cache-line-size = <32>;
i-cache-line-size = <32>;

View File

@ -23,8 +23,11 @@ aliases {
};
cpus {
cpu@0 {
compatible = "arm,xscale";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "marvell,xscale";
device_type = "cpu";
};
};

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@ -14,8 +14,12 @@ / {
compatible = "renesas,r8a7740";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0x0>;
};
};
};

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@ -39,7 +39,9 @@ aliases {
};
cpus {
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a5";
reg = <0x0>;
};
};

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@ -14,8 +14,13 @@ / {
compatible = "renesas,sh7372";
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a8";
device_type = "cpu";
reg = <0x0>;
};
};
};

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@ -22,12 +22,14 @@ cpus {
cpu@0 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <0>;
next-level-cache = <&L2>;
};
cpu@1 {
compatible = "arm,cortex-a9";
device_type = "cpu";
reg = <1>;
next-level-cache = <&L2>;
};

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@ -17,8 +17,12 @@ / {
interrupt-parent = <&vic>;
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

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@ -15,8 +15,12 @@ / {
compatible = "st,spear600";
cpus {
cpu@0 {
compatible = "arm,arm926ejs";
#address-cells = <0>;
#size-cells = <0>;
cpu {
compatible = "arm,arm926ej-s";
device_type = "cpu";
};
};

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@ -17,7 +17,9 @@ / {
cpus {
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a8";
reg = <0x0>;
};
};

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@ -18,7 +18,9 @@ / {
cpus {
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a8";
reg = <0x0>;
};
};