mirror of https://gitee.com/openkylin/linux.git
ARM: dts: armada388-clearfog: move second PCIe port
Move the second PCIe port to the clearfog .dts file as this is only present on the pro models. Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Signed-off-by: Gregory CLEMENT <gregory.clement@free-electrons.com>
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@ -54,6 +54,23 @@ / {
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compatible = "solidrun,clearfog-a1", "marvell,armada388",
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"marvell,armada385", "marvell,armada380";
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soc {
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internal-regs {
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usb3@f0000 {
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/* CON2, nearest CPU, USB2 only. */
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status = "okay";
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};
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};
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pcie-controller {
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pcie@3,0 {
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/* Port 2, Lane 0. CON2, nearest CPU. */
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reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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};
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};
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dsa@0 {
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compatible = "marvell,dsa";
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dsa,ethernet = <ð1>;
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@ -119,6 +136,40 @@ fixed-link {
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};
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};
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&expander0 {
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/*
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* PCA9655 GPIO expander:
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* 0-CON3 CLKREQ#
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* 1-CON3 PERST#
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* 2-CON2 PERST#
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* 3-CON3 W_DISABLE
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* 4-CON2 CLKREQ#
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* 5-USB3 overcurrent
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* 6-USB3 power
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* 7-CON2 W_DISABLE
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* 8-JP4 P1
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* 9-JP4 P4
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* 10-JP4 P5
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* 11-m.2 DEVSLP
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* 12-SFP_LOS
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* 13-SFP_TX_FAULT
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* 14-SFP_TX_DISABLE
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* 15-SFP_MOD_DEF0
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*/
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pcie2_0_clkreq {
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gpio-hog;
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gpios = <4 GPIO_ACTIVE_LOW>;
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input;
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line-name = "pcie2.0-clkreq";
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};
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pcie2_0_w_disable {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "pcie2.0-w-disable";
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};
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};
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&pinctrl {
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clearfog_dsa0_clk_pins: clearfog-dsa0-clk-pins {
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marvell,pins = "mpp46";
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@ -103,12 +103,12 @@ i2c@11000 {
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* PCA9655 GPIO expander, up to 1MHz clock.
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* 0-CON3 CLKREQ#
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* 1-CON3 PERST#
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* 2-CON2 PERST#
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* 2-
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* 3-CON3 W_DISABLE
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* 4-CON2 CLKREQ#
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* 4-
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* 5-USB3 overcurrent
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* 6-USB3 power
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* 7-CON2 W_DISABLE
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* 7-
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* 8-JP4 P1
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* 9-JP4 P4
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* 10-JP4 P5
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@ -143,18 +143,6 @@ pcie1_0_w_disable {
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output-low;
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line-name = "pcie1.0-w-disable";
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};
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pcie2_0_clkreq {
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gpio-hog;
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gpios = <4 GPIO_ACTIVE_LOW>;
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input;
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line-name = "pcie2.0-clkreq";
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};
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pcie2_0_w_disable {
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gpio-hog;
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gpios = <7 GPIO_ACTIVE_LOW>;
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output-low;
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line-name = "pcie2.0-w-disable";
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};
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usb3_ilimit {
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gpio-hog;
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gpios = <5 GPIO_ACTIVE_LOW>;
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@ -296,11 +284,6 @@ usb@58000 {
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status = "okay";
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};
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usb3@f0000 {
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/* CON2, nearest CPU, USB2 only. */
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status = "okay";
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};
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usb3@f8000 {
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/* CON7 */
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status = "okay";
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@ -318,11 +301,6 @@ pcie@2,0 {
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reset-gpios = <&expander0 1 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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pcie@3,0 {
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/* Port 2, Lane 0. CON2, nearest CPU. */
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reset-gpios = <&expander0 2 GPIO_ACTIVE_LOW>;
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status = "okay";
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};
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};
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};
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