mirror of https://gitee.com/openkylin/linux.git
clk: renesas: r8a7795: add OSC and RINT clocks
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -26,6 +26,7 @@
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#include "renesas-cpg-mssr.h"
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#define CPG_RCKCR 0x240
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enum clk_ids {
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/* Core Clock Outputs exported to DT */
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@ -50,6 +51,7 @@ enum clk_ids {
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CLK_S3,
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CLK_SDSRC,
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CLK_SSPSRC,
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CLK_RINT,
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/* Module Clocks */
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MOD_CLK_BASE
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@ -116,6 +118,9 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = {
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DEF_DIV6P1("mso", R8A7795_CLK_MSO, CLK_PLL1_DIV4, 0x014),
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DEF_DIV6P1("hdmi", R8A7795_CLK_HDMI, CLK_PLL1_DIV2, 0x250),
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DEF_DIV6P1("canfd", R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),
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DEF_DIV6_RO("osc", R8A7795_CLK_OSC, CLK_EXTAL, CPG_RCKCR, 8),
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DEF_DIV6_RO("r_int", CLK_RINT, CLK_EXTAL, CPG_RCKCR, 32),
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};
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static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = {
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