mirror of https://gitee.com/openkylin/linux.git
mwifiex: few more register offset entries for sdio card structure
This patch adds some more defitions to card specific register structure and removes static defines for these registers. Signed-off-by: Avinash Patil <patila@marvell.com> Signed-off-by: Cathy Luo <cluo@marvell.com> Signed-off-by: Amitkumar Karwar <akarwar@marvell.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Avinash Patil
John W. Linville
parent
dba4b74d2d
commit
554a0113cc
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@ -448,28 +448,31 @@ static int mwifiex_pm_wakeup_card_complete(struct mwifiex_adapter *adapter)
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static int mwifiex_init_sdio_new_mode(struct mwifiex_adapter *adapter)
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{
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u8 reg;
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struct sdio_mmc_card *card = adapter->card;
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adapter->ioport = MEM_PORT;
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/* enable sdio new mode */
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if (mwifiex_read_reg(adapter, CARD_CONFIG_2_1_REG, ®))
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if (mwifiex_read_reg(adapter, card->reg->card_cfg_2_1_reg, ®))
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return -1;
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if (mwifiex_write_reg(adapter, CARD_CONFIG_2_1_REG,
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if (mwifiex_write_reg(adapter, card->reg->card_cfg_2_1_reg,
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reg | CMD53_NEW_MODE))
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return -1;
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/* Configure cmd port and enable reading rx length from the register */
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if (mwifiex_read_reg(adapter, CMD_CONFIG_0, ®))
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if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_0, ®))
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return -1;
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if (mwifiex_write_reg(adapter, CMD_CONFIG_0, reg | CMD_PORT_RD_LEN_EN))
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if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_0,
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reg | CMD_PORT_RD_LEN_EN))
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return -1;
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/* Enable Dnld/Upld ready auto reset for cmd port after cmd53 is
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* completed
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*/
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if (mwifiex_read_reg(adapter, CMD_CONFIG_1, ®))
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if (mwifiex_read_reg(adapter, card->reg->cmd_cfg_1, ®))
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return -1;
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if (mwifiex_write_reg(adapter, CMD_CONFIG_1, reg | CMD_PORT_AUTO_EN))
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if (mwifiex_write_reg(adapter, card->reg->cmd_cfg_1,
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reg | CMD_PORT_AUTO_EN))
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return -1;
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return 0;
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@ -496,17 +499,17 @@ static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
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}
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/* Read the IO port */
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if (!mwifiex_read_reg(adapter, IO_PORT_0_REG, ®))
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if (!mwifiex_read_reg(adapter, card->reg->io_port_0_reg, ®))
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adapter->ioport |= (reg & 0xff);
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else
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return -1;
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if (!mwifiex_read_reg(adapter, IO_PORT_1_REG, ®))
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if (!mwifiex_read_reg(adapter, card->reg->io_port_1_reg, ®))
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adapter->ioport |= ((reg & 0xff) << 8);
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else
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return -1;
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if (!mwifiex_read_reg(adapter, IO_PORT_2_REG, ®))
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if (!mwifiex_read_reg(adapter, card->reg->io_port_2_reg, ®))
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adapter->ioport |= ((reg & 0xff) << 16);
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else
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return -1;
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@ -514,8 +517,8 @@ static int mwifiex_init_sdio_ioport(struct mwifiex_adapter *adapter)
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pr_debug("info: SDIO FUNC1 IO port: %#x\n", adapter->ioport);
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/* Set Host interrupt reset to read to clear */
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if (!mwifiex_read_reg(adapter, HOST_INT_RSR_REG, ®))
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mwifiex_write_reg(adapter, HOST_INT_RSR_REG,
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if (!mwifiex_read_reg(adapter, card->reg->host_int_rsr_reg, ®))
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mwifiex_write_reg(adapter, card->reg->host_int_rsr_reg,
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reg | card->reg->sdio_int_mask);
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else
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return -1;
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@ -708,7 +711,7 @@ static void mwifiex_sdio_disable_host_int(struct mwifiex_adapter *adapter)
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struct sdio_func *func = card->func;
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sdio_claim_host(func);
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mwifiex_write_reg_locked(func, HOST_INT_MASK_REG, 0);
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mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg, 0);
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sdio_release_irq(func);
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sdio_release_host(func);
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}
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@ -729,7 +732,7 @@ static void mwifiex_interrupt_status(struct mwifiex_adapter *adapter)
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return;
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}
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sdio_ireg = card->mp_regs[HOST_INTSTATUS_REG];
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sdio_ireg = card->mp_regs[card->reg->host_int_status_reg];
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if (sdio_ireg) {
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/*
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* DN_LD_HOST_INT_STATUS and/or UP_LD_HOST_INT_STATUS
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@ -794,7 +797,7 @@ static int mwifiex_sdio_enable_host_int(struct mwifiex_adapter *adapter)
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}
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/* Simply write the mask to the register */
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ret = mwifiex_write_reg_locked(func, HOST_INT_MASK_REG,
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ret = mwifiex_write_reg_locked(func, card->reg->host_int_mask_reg,
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card->reg->host_int_enable);
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if (ret) {
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dev_err(adapter->dev, "enable host interrupt failed\n");
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@ -1334,8 +1337,8 @@ static int mwifiex_process_int_status(struct mwifiex_adapter *adapter)
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u32 pkt_type;
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/* read the len of control packet */
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rx_len = card->mp_regs[CMD_RD_LEN_1] << 8;
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rx_len |= (u16) card->mp_regs[CMD_RD_LEN_0];
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rx_len = card->mp_regs[reg->cmd_rd_len_1] << 8;
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rx_len |= (u16)card->mp_regs[reg->cmd_rd_len_0];
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rx_blocks = DIV_ROUND_UP(rx_len, MWIFIEX_SDIO_BLOCK_SIZE);
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if (rx_len <= INTF_HEADER_LEN ||
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(rx_blocks * MWIFIEX_SDIO_BLOCK_SIZE) >
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@ -1823,11 +1826,11 @@ static int mwifiex_init_sdio(struct mwifiex_adapter *adapter)
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sdio_set_drvdata(card->func, card);
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/*
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* Read the HOST_INT_STATUS_REG for ACK the first interrupt got
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* Read the host_int_status_reg for ACK the first interrupt got
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* from the bootloader. If we don't do this we get a interrupt
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* as soon as we register the irq.
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*/
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mwifiex_read_reg(adapter, HOST_INTSTATUS_REG, &sdio_ireg);
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mwifiex_read_reg(adapter, card->reg->host_int_status_reg, &sdio_ireg);
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/* Get SDIO ioport */
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mwifiex_init_sdio_ioport(adapter);
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@ -52,13 +52,9 @@
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#define HOST_TERM_CMD53 (0x1U << 2)
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#define REG_PORT 0
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#define MEM_PORT 0x10000
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#define CMD_RD_LEN_0 0xB4
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#define CMD_RD_LEN_1 0xB5
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#define CARD_CONFIG_2_1_REG 0xCD
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#define CMD53_NEW_MODE (0x1U << 0)
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#define CMD_CONFIG_0 0xB8
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#define CMD_PORT_RD_LEN_EN (0x1U << 2)
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#define CMD_CONFIG_1 0xB9
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#define CMD_PORT_AUTO_EN (0x1U << 0)
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#define CMD_PORT_SLCT 0x8000
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#define UP_LD_CMD_PORT_HOST_INT_STATUS (0x40U)
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@ -70,38 +66,23 @@
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/* Misc. Config Register : Auto Re-enable interrupts */
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#define AUTO_RE_ENABLE_INT BIT(4)
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/* Host Control Registers */
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/* Host Control Registers : I/O port 0 */
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#define IO_PORT_0_REG 0x78
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/* Host Control Registers : I/O port 1 */
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#define IO_PORT_1_REG 0x79
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/* Host Control Registers : I/O port 2 */
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#define IO_PORT_2_REG 0x7A
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/* Host Control Registers : Configuration */
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#define CONFIGURATION_REG 0x00
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/* Host Control Registers : Host power up */
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#define HOST_POWER_UP (0x1U << 1)
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/* Host Control Registers : Host interrupt mask */
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#define HOST_INT_MASK_REG 0x02
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/* Host Control Registers : Upload host interrupt mask */
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#define UP_LD_HOST_INT_MASK (0x1U)
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/* Host Control Registers : Download host interrupt mask */
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#define DN_LD_HOST_INT_MASK (0x2U)
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/* Host Control Registers : Host interrupt status */
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#define HOST_INTSTATUS_REG 0x03
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/* Host Control Registers : Upload host interrupt status */
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#define UP_LD_HOST_INT_STATUS (0x1U)
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/* Host Control Registers : Download host interrupt status */
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#define DN_LD_HOST_INT_STATUS (0x2U)
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/* Host Control Registers : Host interrupt RSR */
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#define HOST_INT_RSR_REG 0x01
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/* Host Control Registers : Host interrupt status */
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#define HOST_INT_STATUS_REG 0x28
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#define CARD_INT_STATUS_REG 0x28
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/* Card Control Registers : Card I/O ready */
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#define CARD_IO_READY (0x1U << 3)
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@ -203,10 +184,16 @@ struct mwifiex_sdio_card_reg {
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u8 base_1_reg;
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u8 poll_reg;
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u8 host_int_enable;
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u8 host_int_rsr_reg;
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u8 host_int_status_reg;
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u8 host_int_mask_reg;
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u8 status_reg_0;
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u8 status_reg_1;
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u8 sdio_int_mask;
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u32 data_port_mask;
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u8 io_port_0_reg;
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u8 io_port_1_reg;
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u8 io_port_2_reg;
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u8 max_mp_regs;
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u8 rd_bitmap_l;
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u8 rd_bitmap_u;
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@ -219,6 +206,15 @@ struct mwifiex_sdio_card_reg {
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u8 rd_len_p0_l;
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u8 rd_len_p0_u;
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u8 card_misc_cfg_reg;
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u8 card_cfg_2_1_reg;
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u8 cmd_rd_len_0;
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u8 cmd_rd_len_1;
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u8 cmd_rd_len_2;
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u8 cmd_rd_len_3;
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u8 cmd_cfg_0;
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u8 cmd_cfg_1;
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u8 cmd_cfg_2;
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u8 cmd_cfg_3;
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u8 fw_dump_ctrl;
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u8 fw_dump_start;
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u8 fw_dump_end;
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@ -274,10 +270,16 @@ static const struct mwifiex_sdio_card_reg mwifiex_reg_sd87xx = {
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.base_1_reg = 0x0041,
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.poll_reg = 0x30,
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.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK,
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.host_int_rsr_reg = 0x1,
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.host_int_mask_reg = 0x02,
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.host_int_status_reg = 0x03,
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.status_reg_0 = 0x60,
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.status_reg_1 = 0x61,
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.sdio_int_mask = 0x3f,
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.data_port_mask = 0x0000fffe,
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.io_port_0_reg = 0x78,
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.io_port_1_reg = 0x79,
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.io_port_2_reg = 0x7A,
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.max_mp_regs = 64,
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.rd_bitmap_l = 0x04,
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.rd_bitmap_u = 0x05,
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@ -296,10 +298,16 @@ static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
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.poll_reg = 0x50,
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.host_int_enable = UP_LD_HOST_INT_MASK | DN_LD_HOST_INT_MASK |
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CMD_PORT_UPLD_INT_MASK | CMD_PORT_DNLD_INT_MASK,
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.host_int_rsr_reg = 0x1,
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.host_int_status_reg = 0x03,
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.host_int_mask_reg = 0x02,
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.status_reg_0 = 0xc0,
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.status_reg_1 = 0xc1,
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.sdio_int_mask = 0xff,
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.data_port_mask = 0xffffffff,
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.io_port_0_reg = 0xD8,
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.io_port_1_reg = 0xD9,
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.io_port_2_reg = 0xDA,
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.max_mp_regs = 184,
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.rd_bitmap_l = 0x04,
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.rd_bitmap_u = 0x05,
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@ -312,6 +320,15 @@ static const struct mwifiex_sdio_card_reg mwifiex_reg_sd8897 = {
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.rd_len_p0_l = 0x0c,
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.rd_len_p0_u = 0x0d,
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.card_misc_cfg_reg = 0xcc,
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.card_cfg_2_1_reg = 0xcd,
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.cmd_rd_len_0 = 0xb4,
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.cmd_rd_len_1 = 0xb5,
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.cmd_rd_len_2 = 0xb6,
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.cmd_rd_len_3 = 0xb7,
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.cmd_cfg_0 = 0xb8,
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.cmd_cfg_1 = 0xb9,
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.cmd_cfg_2 = 0xba,
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.cmd_cfg_3 = 0xbb,
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.fw_dump_ctrl = 0xe2,
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.fw_dump_start = 0xe3,
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.fw_dump_end = 0xea,
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