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drm/i915: Removing TV Out modes. 

These modes are no longer needed or are not according to TV timing standards.

Intel PRM Vol 3 - Display Registers Updated -
	Section 5 TV-Out Programming /
		5.2.1 Television Standards /
			5.2.1.1 Timing tables

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@gmail.com>
Reviewed-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Signed-off-by: Keith Packard <keithp@keithp.com>
This commit is contained in:
Rodrigo Vivi 2011-12-15 14:47:33 -02:00 committed by Keith Packard
parent 23bd15ec66
commit 55a6713b3f
1 changed files with 0 additions and 122 deletions
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122
drivers/gpu/drm/i915/intel_tv.c
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@ -673,78 +673,6 @@ static const struct tv_mode tv_modes[] = {
.filter_table = filter_table, .filter_table = filter_table,
}, },
{
.name = "480p@59.94Hz",
.clock = 107520,
.refresh = 59940,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
.hsync_end = 64, .hblank_end = 122,
.hblank_start = 842, .htotal = 857,
.progressive = true, .trilevel_sync = false,
.vsync_start_f1 = 12, .vsync_start_f2 = 12,
.vsync_len = 12,
.veq_ena = false,
.vi_end_f1 = 44, .vi_end_f2 = 44,
.nbr_end = 479,
.burst_ena = false,
.filter_table = filter_table,
},
{
.name = "480p@60Hz",
.clock = 107520,
.refresh = 60000,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
.hsync_end = 64, .hblank_end = 122,
.hblank_start = 842, .htotal = 856,
.progressive = true, .trilevel_sync = false,
.vsync_start_f1 = 12, .vsync_start_f2 = 12,
.vsync_len = 12,
.veq_ena = false,
.vi_end_f1 = 44, .vi_end_f2 = 44,
.nbr_end = 479,
.burst_ena = false,
.filter_table = filter_table,
},
{
.name = "576p",
.clock = 107520,
.refresh = 50000,
.oversample = TV_OVERSAMPLE_4X,
.component_only = 1,
.hsync_end = 64, .hblank_end = 139,
.hblank_start = 859, .htotal = 863,
.progressive = true, .trilevel_sync = false,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
.veq_ena = false,
.vi_end_f1 = 48, .vi_end_f2 = 48,
.nbr_end = 575,
.burst_ena = false,
.filter_table = filter_table,
},
{ {
.name = "720p@60Hz", .name = "720p@60Hz",
.clock = 148800, .clock = 148800,
@ -769,30 +697,6 @@ static const struct tv_mode tv_modes[] = {
.filter_table = filter_table, .filter_table = filter_table,
}, },
{
.name = "720p@59.94Hz",
.clock = 148800,
.refresh = 59940,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
.hsync_end = 80, .hblank_end = 300,
.hblank_start = 1580, .htotal = 1651,
.progressive = true, .trilevel_sync = true,
.vsync_start_f1 = 10, .vsync_start_f2 = 10,
.vsync_len = 10,
.veq_ena = false,
.vi_end_f1 = 29, .vi_end_f2 = 29,
.nbr_end = 719,
.burst_ena = false,
.filter_table = filter_table,
},
{ {
.name = "720p@50Hz", .name = "720p@50Hz",
.clock = 148800, .clock = 148800,
@ -868,32 +772,6 @@ static const struct tv_mode tv_modes[] = {
.burst_ena = false, .burst_ena = false,
.filter_table = filter_table,
},
{
.name = "1080i@59.94Hz",
.clock = 148800,
.refresh = 29970,
.oversample = TV_OVERSAMPLE_2X,
.component_only = 1,
.hsync_end = 88, .hblank_end = 235,
.hblank_start = 2155, .htotal = 2201,
.progressive = false, .trilevel_sync = true,
.vsync_start_f1 = 4, .vsync_start_f2 = 5,
.vsync_len = 10,
.veq_ena = true, .veq_start_f1 = 4,
.veq_start_f2 = 4, .veq_len = 10,
.vi_end_f1 = 21, .vi_end_f2 = 22,
.nbr_end = 539,
.burst_ena = false,
.filter_table = filter_table, .filter_table = filter_table,
}, },
}; };