mirror of https://gitee.com/openkylin/linux.git
drm/i915: Make INTEL_GEN only take dev_priv
Saves 968 bytes of .rodata strings. v2: Add parantheses around dev_priv. (Ville Syrjala) v3: Rebase. Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Reviewed-by: David Weinehall <david.weinehall@linux.intel.com> Acked-by: Daniel Vetter <daniel.vetter@ffwll.ch> Acked-by: Jani Nikula <jani.nikula@linux.intel.com> Acked-by: Chris Wilson <chris@chris-wilson.co.uk> Acked-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
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@ -2600,8 +2600,8 @@ struct drm_i915_cmd_table {
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__p; \
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})
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#define INTEL_INFO(p) (&__I915__(p)->info)
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#define INTEL_GEN(p) (INTEL_INFO(p)->gen)
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#define INTEL_GEN(dev_priv) ((dev_priv)->info.gen)
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#define INTEL_DEVID(dev_priv) ((dev_priv)->info.device_id)
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#define REVID_FOREVER 0xff
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@ -72,9 +72,9 @@ render_state_get_rodata(const struct drm_i915_gem_request *req)
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static int render_state_setup(struct render_state *so)
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{
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struct drm_device *dev = so->vma->vm->dev;
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struct drm_i915_private *dev_priv = to_i915(so->vma->vm->dev);
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const struct intel_renderstate_rodata *rodata = so->rodata;
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const bool has_64bit_reloc = INTEL_GEN(dev) >= 8;
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const bool has_64bit_reloc = INTEL_GEN(dev_priv) >= 8;
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unsigned int i = 0, reloc_index = 0;
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struct page *page;
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u32 *d;
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@ -115,7 +115,7 @@ static int render_state_setup(struct render_state *so)
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so->aux_batch_offset = i * sizeof(u32);
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if (HAS_POOLED_EU(dev)) {
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if (HAS_POOLED_EU(dev_priv)) {
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/*
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* We always program 3x6 pool config but depending upon which
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* subslice is disabled HW drops down to appropriate config
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@ -2748,7 +2748,7 @@ static int ironlake_enable_vblank(struct drm_device *dev, unsigned int pipe)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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unsigned long irqflags;
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uint32_t bit = INTEL_GEN(dev) >= 7 ?
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uint32_t bit = INTEL_GEN(dev_priv) >= 7 ?
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DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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@ -2798,7 +2798,7 @@ static void ironlake_disable_vblank(struct drm_device *dev, unsigned int pipe)
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{
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struct drm_i915_private *dev_priv = to_i915(dev);
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unsigned long irqflags;
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uint32_t bit = INTEL_GEN(dev) >= 7 ?
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uint32_t bit = INTEL_GEN(dev_priv) >= 7 ?
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DE_PIPE_VBLANK_IVB(pipe) : DE_PIPE_VBLANK(pipe);
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spin_lock_irqsave(&dev_priv->irq_lock, irqflags);
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@ -12450,7 +12450,7 @@ int intel_plane_atomic_calc_changes(struct drm_crtc_state *crtc_state,
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struct drm_framebuffer *fb = plane_state->fb;
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int ret;
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if (INTEL_GEN(dev) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) {
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if (INTEL_GEN(dev_priv) >= 9 && plane->type != DRM_PLANE_TYPE_CURSOR) {
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ret = skl_update_scaler_plane(
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to_intel_crtc_state(crtc_state),
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to_intel_plane_state(plane_state));
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@ -753,7 +753,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
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struct intel_crtc_state *crtc_state,
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struct intel_plane_state *state)
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{
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struct drm_device *dev = plane->dev;
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struct drm_i915_private *dev_priv = to_i915(plane->dev);
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struct drm_crtc *crtc = state->base.crtc;
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struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
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struct intel_plane *intel_plane = to_intel_plane(plane);
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@ -797,7 +797,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
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}
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/* setup can_scale, min_scale, max_scale */
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if (INTEL_INFO(dev)->gen >= 9) {
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if (INTEL_GEN(dev_priv) >= 9) {
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/* use scaler when colorkey is not required */
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if (state->ckey.flags == I915_SET_COLORKEY_NONE) {
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can_scale = 1;
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@ -913,7 +913,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
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width_bytes = ((src_x * cpp) & 63) + src_w * cpp;
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if (INTEL_INFO(dev)->gen < 9 && (src_w > 2048 || src_h > 2048 ||
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if (INTEL_GEN(dev_priv) < 9 && (src_w > 2048 || src_h > 2048 ||
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width_bytes > 4096 || fb->pitches[0] > 4096)) {
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DRM_DEBUG_KMS("Source dimensions exceed hardware limits\n");
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return -EINVAL;
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@ -932,7 +932,7 @@ intel_check_sprite_plane(struct drm_plane *plane,
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dst->y1 = crtc_y;
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dst->y2 = crtc_y + crtc_h;
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if (INTEL_GEN(dev) >= 9) {
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if (INTEL_GEN(dev_priv) >= 9) {
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ret = skl_check_plane_surface(state);
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if (ret)
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return ret;
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