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ARM: tegra: Add video decoder node on Tegra30 

Add device tree node for the Video Decoder Engine found on Tegra30 SoC's.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
This commit is contained in:
Dmitry Osipenko 2018-02-18 20:01:46 +03:00 committed by Thierry Reding
parent ea8570362a
commit 55f939c2eb
1 changed files with 27 additions and 0 deletions
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27
arch/arm/boot/dts/tegra30.dtsi
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@ -97,6 +97,11 @@ iram@40000000 {
#address-cells = <1>;
#size-cells = <1>;
ranges = <0 0x40000000 0x40000>;
vde_pool: vde@400 {
reg = <0x400 0x3fc00>;
pool;
};
};
host1x@50000000 {
@ -366,6 +371,28 @@ gpio: gpio@6000d000 {
*/
};
vde@6001a000 {
compatible = "nvidia,tegra30-vde", "nvidia,tegra20-vde";
reg = <0x6001a000 0x1000 /* Syntax Engine */
0x6001b000 0x1000 /* Video Bitstream Engine */
0x6001c000 0x100 /* Macroblock Engine */
0x6001c200 0x100 /* Post-processing Engine */
0x6001c400 0x100 /* Motion Compensation Engine */
0x6001c600 0x100 /* Transform Engine */
0x6001c800 0x100 /* Pixel prediction block */
0x6001ca00 0x100 /* Video DMA */
0x6001d800 0x400>; /* Video frame controls */
reg-names = "sxe", "bsev", "mbe", "ppe", "mce",
"tfe", "ppb", "vdma", "frameid";
iram = <&vde_pool>; /* IRAM region */
interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, /* Sync token interrupt */
<GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>, /* BSE-V interrupt */
<GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; /* SXE interrupt */
interrupt-names = "sync-token", "bsev", "sxe";
clocks = <&tegra_car TEGRA30_CLK_VDE>;
resets = <&tegra_car 61>;
};
apbmisc@70000800 {
compatible = "nvidia,tegra30-apbmisc", "nvidia,tegra20-apbmisc";
reg = <0x70000800 0x64 /* Chip revision */