mirror of https://gitee.com/openkylin/linux.git
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
4.11, please pull the following changes: - Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference board. He also updates the reserved memory entry for the Nitro firmware, required to get the on-chip NICs to work. Finally he adds support for the BCM958712DxXMC reference board which is a subset of existing boards. -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJYfsSQAAoJEIfQlpxEBwcEGDUP+gLIXb7EJ7rzNOYskYuf5blU Uidfec5wbdu8Tnm4KbqWxopKdfvg13tx6YTwVjmtVwNP06iG9g9ytC3XA/YTYbLw Gs8S0QhMpPn9mJ94ix0+DUT8NwTFLxPS/veCqpQLG/usOkXkt8xR36DfA63C+qK/ s6G87AZklsjUtkJn06FtrtvdyxRDHsl7Tj/7U+J9/mGoWdmZDbtooMP6GXDMS34N XDMU1L18Kr74R5YUyTotzu2D0y/CG1edSTGPpHbrVKnI8YGTkLHyL9V1anbGS7v0 z+E+K6Lbe4M0xBqDVH/fOejwOxg30qDc4t9SDjMV813txZChwyVhNswNH6Nnn+3I zcN5bRs9fT71B7H2Q+zkqRDf0nLx6fJt3rvQ/iPHOHil3wgpa1yckHnAi11BE1gp hBEZPZkMw4ZPjtPc+CUoE9vWRzdJtoGYlE6dOxzz4UbP9QYmU0ai7F7OhxsQ+lKM LpVM7jAf+E4lRBsOSkKuV/3uDzLqwIKdEBqjYaSe83MIO1uC1XIgN2lHU4Q3BITx nyYdiJymr2AwXjyi8W7nN9neAmDiNlfi7fPZvYy0crd8GWn3uoROBLR7NoL+alPo eBjiKJe6WJen+0VQR67a17kZ7WCkqCR0QUrXZTl8yVdzDZWaPHLXcCR8dulYwvMT zvT+oFf7yA+DB3bCykd5 =JBHv -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64 This pull request contains Broadcom ARM64-based SoC Device Tree changes for 4.11, please pull the following changes: - Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference board. He also updates the reserved memory entry for the Nitro firmware, required to get the on-chip NICs to work. Finally he adds support for the BCM958712DxXMC reference board which is a subset of existing boards. * tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux: arm64: dts: NS2: add support for XMC form factor arm64: dts: NS2: reserve memory for Nitro firmware arm64: dts: NS2: enable PAXC on NS2 SVK arm64: dts: NS2: enable GICv2m for PAXB/PAXC interfaces Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
560741d7d9
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@ -1,5 +1,5 @@
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dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb
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dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb
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dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb
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dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
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always := $(dtb-y)
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@ -76,6 +76,10 @@ &pcie4 {
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status = "ok";
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};
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&pcie8 {
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status = "ok";
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};
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&i2c0 {
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status = "ok";
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};
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@ -0,0 +1,191 @@
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/*
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* BSD LICENSE
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*
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* Copyright(c) 2016 Broadcom. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/dts-v1/;
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#include "ns2.dtsi"
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/ {
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model = "Broadcom NS2 XMC";
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compatible = "brcm,ns2-xmc", "brcm,ns2";
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aliases {
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serial0 = &uart3;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x66130000";
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};
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memory {
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device_type = "memory";
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reg = <0x000000000 0x80000000 0x00000001 0x00000000>;
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};
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};
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&enet {
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status = "ok";
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};
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&i2c0 {
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status = "ok";
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};
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&i2c1 {
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status = "ok";
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};
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&mdio_mux_iproc {
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mdio@10 {
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gphy0: eth-phy@10 {
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reg = <0x10>;
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};
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};
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};
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&nand {
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nandcs@0 {
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compatible = "brcm,nandcs";
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reg = <0>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <8>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <16>;
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brcm,nand-oob-sector-size = <16>;
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "nboot";
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reg = <0x00000000 0x00280000>; /* 2.5MB */
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read-only;
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};
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partition@280000 {
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label = "nenv";
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reg = <0x00280000 0x00040000>; /* 0.25MB */
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read-only;
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};
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partition@2c0000 {
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label = "ndtb";
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reg = <0x002c0000 0x00040000>; /* 0.25MB */
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read-only;
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};
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partition@300000 {
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label = "nsystem";
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reg = <0x00300000 0x03d00000>; /* 61MB */
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read-only;
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};
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partition@4000000 {
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label = "nrootfs";
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reg = <0x04000000 0x06400000>; /* 100MB */
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};
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partition@0a400000{
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label = "ncustfs";
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reg = <0x0a400000 0x35c00000>; /* 860MB */
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};
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};
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};
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&pci_phy0 {
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status = "ok";
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};
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&pcie0 {
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status = "ok";
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};
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&pcie8 {
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status = "ok";
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};
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&sata_phy0 {
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status = "ok";
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};
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&sata_phy1 {
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status = "ok";
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};
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&sata {
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status = "ok";
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};
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&qspi {
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flash: m25p80@0 {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "m25p80";
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spi-max-frequency = <62500000>;
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m25p,default-addr-width = <3>;
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reg = <0x0 0x0>;
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partition@0 {
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label = "bl0";
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reg = <0x00000000 0x00080000>; /* 512KB */
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};
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partition@80000 {
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label = "fip";
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reg = <0x00080000 0x00150000>; /* 1344KB */
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};
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partition@1e0000 {
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label = "env";
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reg = <0x001e0000 0x00010000>;/* 64KB */
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};
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partition@1f0000 {
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label = "dtb";
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reg = <0x001f0000 0x00010000>; /* 64KB */
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};
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partition@200000 {
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label = "kernel";
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reg = <0x00200000 0x00e00000>; /* 14MB */
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};
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partition@1000000 {
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label = "rootfs";
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reg = <0x01000000 0x01000000>; /* 16MB */
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};
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};
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};
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&uart3 {
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status = "ok";
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};
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@ -30,6 +30,8 @@
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/memreserve/ 0x81000000 0x00200000;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/clock/bcm-ns2.h>
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@ -115,7 +117,7 @@ pcie0: pcie@20020000 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 281 IRQ_TYPE_NONE>;
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interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_NONE>;
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linux,pci-domain = <0>;
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@ -136,18 +138,7 @@ pcie0: pcie@20020000 {
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phys = <&pci_phy0>;
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phy-names = "pcie-phy";
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msi-parent = <&msi0>;
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msi0: msi@20020000 {
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compatible = "brcm,iproc-msi";
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msi-controller;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 277 IRQ_TYPE_NONE>,
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<GIC_SPI 278 IRQ_TYPE_NONE>,
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<GIC_SPI 279 IRQ_TYPE_NONE>,
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<GIC_SPI 280 IRQ_TYPE_NONE>;
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brcm,num-eq-region = <1>;
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brcm,num-msi-msg-region = <1>;
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};
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msi-parent = <&v2m0>;
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};
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pcie4: pcie@50020000 {
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@ -156,7 +147,7 @@ pcie4: pcie@50020000 {
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#interrupt-cells = <1>;
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interrupt-map-mask = <0 0 0 0>;
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interrupt-map = <0 0 0 0 &gic GIC_SPI 305 IRQ_TYPE_NONE>;
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interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_NONE>;
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linux,pci-domain = <4>;
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@ -177,16 +168,24 @@ pcie4: pcie@50020000 {
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phys = <&pci_phy1>;
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phy-names = "pcie-phy";
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msi-parent = <&msi4>;
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msi4: msi@50020000 {
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compatible = "brcm,iproc-msi";
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msi-controller;
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 301 IRQ_TYPE_NONE>,
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<GIC_SPI 302 IRQ_TYPE_NONE>,
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<GIC_SPI 303 IRQ_TYPE_NONE>,
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<GIC_SPI 304 IRQ_TYPE_NONE>;
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};
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msi-parent = <&v2m0>;
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};
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pcie8: pcie@60c00000 {
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compatible = "brcm,iproc-pcie-paxc";
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reg = <0 0x60c00000 0 0x1000>;
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linux,pci-domain = <8>;
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bus-range = <0x0 0x1>;
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#address-cells = <3>;
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#size-cells = <2>;
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device_type = "pci";
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ranges = <0x83000000 0 0x00000000 0 0x60000000 0 0x00c00000>;
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status = "disabled";
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msi-parent = <&v2m0>;
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};
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soc: soc {
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@ -331,6 +330,82 @@ gic: interrupt-controller@65210000 {
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<0x65260000 0x1000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
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IRQ_TYPE_LEVEL_HIGH)>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x652e0000 0x80000>;
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v2m0: v2m@00000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x00000 0x1000>;
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arm,msi-base-spi = <72>;
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arm,msi-num-spis = <16>;
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};
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v2m1: v2m@10000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x10000 0x1000>;
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arm,msi-base-spi = <88>;
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arm,msi-num-spis = <16>;
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};
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v2m2: v2m@20000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x20000 0x1000>;
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arm,msi-base-spi = <104>;
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arm,msi-num-spis = <16>;
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};
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v2m3: v2m@30000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x30000 0x1000>;
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arm,msi-base-spi = <120>;
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arm,msi-num-spis = <16>;
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};
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v2m4: v2m@40000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x40000 0x1000>;
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arm,msi-base-spi = <136>;
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arm,msi-num-spis = <16>;
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};
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v2m5: v2m@50000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x50000 0x1000>;
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arm,msi-base-spi = <152>;
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arm,msi-num-spis = <16>;
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};
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v2m6: v2m@60000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x60000 0x1000>;
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arm,msi-base-spi = <168>;
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arm,msi-num-spis = <16>;
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};
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v2m7: v2m@70000 {
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compatible = "arm,gic-v2m-frame";
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interrupt-parent = <&gic>;
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msi-controller;
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reg = <0x70000 0x1000>;
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arm,msi-base-spi = <184>;
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arm,msi-num-spis = <16>;
|
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};
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};
|
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||||
cci@65590000 {
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||||
|
|
|
|||
Loading…
Reference in New Issue