mirror of https://gitee.com/openkylin/linux.git
This pull request contains Broadcom ARM64-based SoC Device Tree changes for
4.11, please pull the following changes: - Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference board. He also updates the reserved memory entry for the Nitro firmware, required to get the on-chip NICs to work. Finally he adds support for the BCM958712DxXMC reference board which is a subset of existing boards. -----BEGIN PGP SIGNATURE----- iQIcBAABCAAGBQJYfsSQAAoJEIfQlpxEBwcEGDUP+gLIXb7EJ7rzNOYskYuf5blU Uidfec5wbdu8Tnm4KbqWxopKdfvg13tx6YTwVjmtVwNP06iG9g9ytC3XA/YTYbLw Gs8S0QhMpPn9mJ94ix0+DUT8NwTFLxPS/veCqpQLG/usOkXkt8xR36DfA63C+qK/ s6G87AZklsjUtkJn06FtrtvdyxRDHsl7Tj/7U+J9/mGoWdmZDbtooMP6GXDMS34N XDMU1L18Kr74R5YUyTotzu2D0y/CG1edSTGPpHbrVKnI8YGTkLHyL9V1anbGS7v0 z+E+K6Lbe4M0xBqDVH/fOejwOxg30qDc4t9SDjMV813txZChwyVhNswNH6Nnn+3I zcN5bRs9fT71B7H2Q+zkqRDf0nLx6fJt3rvQ/iPHOHil3wgpa1yckHnAi11BE1gp hBEZPZkMw4ZPjtPc+CUoE9vWRzdJtoGYlE6dOxzz4UbP9QYmU0ai7F7OhxsQ+lKM LpVM7jAf+E4lRBsOSkKuV/3uDzLqwIKdEBqjYaSe83MIO1uC1XIgN2lHU4Q3BITx nyYdiJymr2AwXjyi8W7nN9neAmDiNlfi7fPZvYy0crd8GWn3uoROBLR7NoL+alPo eBjiKJe6WJen+0VQR67a17kZ7WCkqCR0QUrXZTl8yVdzDZWaPHLXcCR8dulYwvMT zvT+oFf7yA+DB3bCykd5 =JBHv -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64 This pull request contains Broadcom ARM64-based SoC Device Tree changes for 4.11, please pull the following changes: - Jon adds Device Tree nodes for the GICv2m and PAXB/PAXC PCIe interfaces on the Northstar 2 SoCs, he also enables PAXC on the Northstar 2 SVK reference board. He also updates the reserved memory entry for the Nitro firmware, required to get the on-chip NICs to work. Finally he adds support for the BCM958712DxXMC reference board which is a subset of existing boards. * tag 'arm-soc/for-4.11/devicetree-arm64' of http://github.com/Broadcom/stblinux: arm64: dts: NS2: add support for XMC form factor arm64: dts: NS2: reserve memory for Nitro firmware arm64: dts: NS2: enable PAXC on NS2 SVK arm64: dts: NS2: enable GICv2m for PAXB/PAXC interfaces Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
560741d7d9
|
|
@ -1,5 +1,5 @@
|
||||||
dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb
|
dtb-$(CONFIG_ARCH_BCM2835) += bcm2837-rpi-3-b.dtb
|
||||||
dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb
|
dtb-$(CONFIG_ARCH_BCM_IPROC) += ns2-svk.dtb ns2-xmc.dtb
|
||||||
dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
|
dtb-$(CONFIG_ARCH_VULCAN) += vulcan-eval.dtb
|
||||||
|
|
||||||
always := $(dtb-y)
|
always := $(dtb-y)
|
||||||
|
|
|
||||||
|
|
@ -76,6 +76,10 @@ &pcie4 {
|
||||||
status = "ok";
|
status = "ok";
|
||||||
};
|
};
|
||||||
|
|
||||||
|
&pcie8 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
&i2c0 {
|
&i2c0 {
|
||||||
status = "ok";
|
status = "ok";
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,191 @@
|
||||||
|
/*
|
||||||
|
* BSD LICENSE
|
||||||
|
*
|
||||||
|
* Copyright(c) 2016 Broadcom. All rights reserved.
|
||||||
|
*
|
||||||
|
* Redistribution and use in source and binary forms, with or without
|
||||||
|
* modification, are permitted provided that the following conditions
|
||||||
|
* are met:
|
||||||
|
*
|
||||||
|
* * Redistributions of source code must retain the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer.
|
||||||
|
* * Redistributions in binary form must reproduce the above copyright
|
||||||
|
* notice, this list of conditions and the following disclaimer in
|
||||||
|
* the documentation and/or other materials provided with the
|
||||||
|
* distribution.
|
||||||
|
* * Neither the name of Broadcom Corporation nor the names of its
|
||||||
|
* contributors may be used to endorse or promote products derived
|
||||||
|
* from this software without specific prior written permission.
|
||||||
|
*
|
||||||
|
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
|
||||||
|
* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
|
||||||
|
* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
|
||||||
|
* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
|
||||||
|
* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
||||||
|
* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
|
||||||
|
* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
|
||||||
|
* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||||
|
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
|
||||||
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
|
*/
|
||||||
|
|
||||||
|
/dts-v1/;
|
||||||
|
|
||||||
|
#include "ns2.dtsi"
|
||||||
|
|
||||||
|
/ {
|
||||||
|
model = "Broadcom NS2 XMC";
|
||||||
|
compatible = "brcm,ns2-xmc", "brcm,ns2";
|
||||||
|
|
||||||
|
aliases {
|
||||||
|
serial0 = &uart3;
|
||||||
|
};
|
||||||
|
|
||||||
|
chosen {
|
||||||
|
stdout-path = "serial0:115200n8";
|
||||||
|
bootargs = "earlycon=uart8250,mmio32,0x66130000";
|
||||||
|
};
|
||||||
|
|
||||||
|
memory {
|
||||||
|
device_type = "memory";
|
||||||
|
reg = <0x000000000 0x80000000 0x00000001 0x00000000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&enet {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c0 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&i2c1 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&mdio_mux_iproc {
|
||||||
|
mdio@10 {
|
||||||
|
gphy0: eth-phy@10 {
|
||||||
|
reg = <0x10>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&nand {
|
||||||
|
nandcs@0 {
|
||||||
|
compatible = "brcm,nandcs";
|
||||||
|
reg = <0>;
|
||||||
|
nand-ecc-mode = "hw";
|
||||||
|
nand-ecc-strength = <8>;
|
||||||
|
nand-ecc-step-size = <512>;
|
||||||
|
nand-bus-width = <16>;
|
||||||
|
brcm,nand-oob-sector-size = <16>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
label = "nboot";
|
||||||
|
reg = <0x00000000 0x00280000>; /* 2.5MB */
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@280000 {
|
||||||
|
label = "nenv";
|
||||||
|
reg = <0x00280000 0x00040000>; /* 0.25MB */
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@2c0000 {
|
||||||
|
label = "ndtb";
|
||||||
|
reg = <0x002c0000 0x00040000>; /* 0.25MB */
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@300000 {
|
||||||
|
label = "nsystem";
|
||||||
|
reg = <0x00300000 0x03d00000>; /* 61MB */
|
||||||
|
read-only;
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@4000000 {
|
||||||
|
label = "nrootfs";
|
||||||
|
reg = <0x04000000 0x06400000>; /* 100MB */
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@0a400000{
|
||||||
|
label = "ncustfs";
|
||||||
|
reg = <0x0a400000 0x35c00000>; /* 860MB */
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&pci_phy0 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&pcie0 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&pcie8 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&sata_phy0 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&sata_phy1 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&sata {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
||||||
|
&qspi {
|
||||||
|
flash: m25p80@0 {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
compatible = "m25p80";
|
||||||
|
spi-max-frequency = <62500000>;
|
||||||
|
m25p,default-addr-width = <3>;
|
||||||
|
reg = <0x0 0x0>;
|
||||||
|
|
||||||
|
partition@0 {
|
||||||
|
label = "bl0";
|
||||||
|
reg = <0x00000000 0x00080000>; /* 512KB */
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@80000 {
|
||||||
|
label = "fip";
|
||||||
|
reg = <0x00080000 0x00150000>; /* 1344KB */
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@1e0000 {
|
||||||
|
label = "env";
|
||||||
|
reg = <0x001e0000 0x00010000>;/* 64KB */
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@1f0000 {
|
||||||
|
label = "dtb";
|
||||||
|
reg = <0x001f0000 0x00010000>; /* 64KB */
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@200000 {
|
||||||
|
label = "kernel";
|
||||||
|
reg = <0x00200000 0x00e00000>; /* 14MB */
|
||||||
|
};
|
||||||
|
|
||||||
|
partition@1000000 {
|
||||||
|
label = "rootfs";
|
||||||
|
reg = <0x01000000 0x01000000>; /* 16MB */
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
&uart3 {
|
||||||
|
status = "ok";
|
||||||
|
};
|
||||||
|
|
@ -30,6 +30,8 @@
|
||||||
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
/memreserve/ 0x81000000 0x00200000;
|
||||||
|
|
||||||
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
#include <dt-bindings/clock/bcm-ns2.h>
|
#include <dt-bindings/clock/bcm-ns2.h>
|
||||||
|
|
||||||
|
|
@ -115,7 +117,7 @@ pcie0: pcie@20020000 {
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
interrupt-map-mask = <0 0 0 0>;
|
interrupt-map-mask = <0 0 0 0>;
|
||||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 281 IRQ_TYPE_NONE>;
|
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 281 IRQ_TYPE_NONE>;
|
||||||
|
|
||||||
linux,pci-domain = <0>;
|
linux,pci-domain = <0>;
|
||||||
|
|
||||||
|
|
@ -136,18 +138,7 @@ pcie0: pcie@20020000 {
|
||||||
phys = <&pci_phy0>;
|
phys = <&pci_phy0>;
|
||||||
phy-names = "pcie-phy";
|
phy-names = "pcie-phy";
|
||||||
|
|
||||||
msi-parent = <&msi0>;
|
msi-parent = <&v2m0>;
|
||||||
msi0: msi@20020000 {
|
|
||||||
compatible = "brcm,iproc-msi";
|
|
||||||
msi-controller;
|
|
||||||
interrupt-parent = <&gic>;
|
|
||||||
interrupts = <GIC_SPI 277 IRQ_TYPE_NONE>,
|
|
||||||
<GIC_SPI 278 IRQ_TYPE_NONE>,
|
|
||||||
<GIC_SPI 279 IRQ_TYPE_NONE>,
|
|
||||||
<GIC_SPI 280 IRQ_TYPE_NONE>;
|
|
||||||
brcm,num-eq-region = <1>;
|
|
||||||
brcm,num-msi-msg-region = <1>;
|
|
||||||
};
|
|
||||||
};
|
};
|
||||||
|
|
||||||
pcie4: pcie@50020000 {
|
pcie4: pcie@50020000 {
|
||||||
|
|
@ -156,7 +147,7 @@ pcie4: pcie@50020000 {
|
||||||
|
|
||||||
#interrupt-cells = <1>;
|
#interrupt-cells = <1>;
|
||||||
interrupt-map-mask = <0 0 0 0>;
|
interrupt-map-mask = <0 0 0 0>;
|
||||||
interrupt-map = <0 0 0 0 &gic GIC_SPI 305 IRQ_TYPE_NONE>;
|
interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 305 IRQ_TYPE_NONE>;
|
||||||
|
|
||||||
linux,pci-domain = <4>;
|
linux,pci-domain = <4>;
|
||||||
|
|
||||||
|
|
@ -177,16 +168,24 @@ pcie4: pcie@50020000 {
|
||||||
phys = <&pci_phy1>;
|
phys = <&pci_phy1>;
|
||||||
phy-names = "pcie-phy";
|
phy-names = "pcie-phy";
|
||||||
|
|
||||||
msi-parent = <&msi4>;
|
msi-parent = <&v2m0>;
|
||||||
msi4: msi@50020000 {
|
};
|
||||||
compatible = "brcm,iproc-msi";
|
|
||||||
msi-controller;
|
pcie8: pcie@60c00000 {
|
||||||
interrupt-parent = <&gic>;
|
compatible = "brcm,iproc-pcie-paxc";
|
||||||
interrupts = <GIC_SPI 301 IRQ_TYPE_NONE>,
|
reg = <0 0x60c00000 0 0x1000>;
|
||||||
<GIC_SPI 302 IRQ_TYPE_NONE>,
|
linux,pci-domain = <8>;
|
||||||
<GIC_SPI 303 IRQ_TYPE_NONE>,
|
|
||||||
<GIC_SPI 304 IRQ_TYPE_NONE>;
|
bus-range = <0x0 0x1>;
|
||||||
};
|
|
||||||
|
#address-cells = <3>;
|
||||||
|
#size-cells = <2>;
|
||||||
|
device_type = "pci";
|
||||||
|
ranges = <0x83000000 0 0x00000000 0 0x60000000 0 0x00c00000>;
|
||||||
|
|
||||||
|
status = "disabled";
|
||||||
|
|
||||||
|
msi-parent = <&v2m0>;
|
||||||
};
|
};
|
||||||
|
|
||||||
soc: soc {
|
soc: soc {
|
||||||
|
|
@ -331,6 +330,82 @@ gic: interrupt-controller@65210000 {
|
||||||
<0x65260000 0x1000>;
|
<0x65260000 0x1000>;
|
||||||
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
|
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |
|
||||||
IRQ_TYPE_LEVEL_HIGH)>;
|
IRQ_TYPE_LEVEL_HIGH)>;
|
||||||
|
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
ranges = <0 0x652e0000 0x80000>;
|
||||||
|
|
||||||
|
v2m0: v2m@00000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x00000 0x1000>;
|
||||||
|
arm,msi-base-spi = <72>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
v2m1: v2m@10000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x10000 0x1000>;
|
||||||
|
arm,msi-base-spi = <88>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
v2m2: v2m@20000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x20000 0x1000>;
|
||||||
|
arm,msi-base-spi = <104>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
v2m3: v2m@30000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x30000 0x1000>;
|
||||||
|
arm,msi-base-spi = <120>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
v2m4: v2m@40000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x40000 0x1000>;
|
||||||
|
arm,msi-base-spi = <136>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
v2m5: v2m@50000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x50000 0x1000>;
|
||||||
|
arm,msi-base-spi = <152>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
v2m6: v2m@60000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x60000 0x1000>;
|
||||||
|
arm,msi-base-spi = <168>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
|
|
||||||
|
v2m7: v2m@70000 {
|
||||||
|
compatible = "arm,gic-v2m-frame";
|
||||||
|
interrupt-parent = <&gic>;
|
||||||
|
msi-controller;
|
||||||
|
reg = <0x70000 0x1000>;
|
||||||
|
arm,msi-base-spi = <184>;
|
||||||
|
arm,msi-num-spis = <16>;
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
cci@65590000 {
|
cci@65590000 {
|
||||||
|
|
|
||||||
Loading…
Reference in New Issue