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omapdrm changes for v4.13 

* dmabuf fence support
 * TILER rotation fixes
 * big pile of various cleanups and refactorings
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Merge tag 'omapdrm-4.13-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux into drm-next

omapdrm changes for v4.13

* dmabuf fence support
* TILER rotation fixes
* big pile of various cleanups and refactorings

* tag 'omapdrm-4.13-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/tomba/linux: (64 commits)
  drm/omap: fix tiled buffer stride calculations
  drm/omap: fix YUV422 90/270 rotation with mirroring
  drm/omap: fix YUV422 rotation with TILER
  drm/omap: pass rotation to dispc
  drm/omap: DRM_MODE_REFLECT_* instead of mirror boolean
  drm/omap: use DRM_MODE_ROTATE_* instead of OMAP_DSS_ROT_*
  drm/omap: remove omap_drm_win
  drm/omap: add drm_rotation_to_tiler helper()
  drm/omap: rename color_mode to fourcc
  drm/omap: cleanup formats array
  drm/omap: remove omap_framebuffer_get_formats()
  drm/omap: use DRM_FORMAT_* instead of OMAP_DSS_COLOR_*
  drm/omap: use u32 instead of enum omap_color_mode
  drm/omap: change supported_modes to an array
  drm/omap: remove unneeded prototypes
  drm/omap: add format_is_yuv() helper
  drm/omap: cleanup offset calculation
  drm/omap: remove dma & vrfb rotation
  drm/omap: ratelimit OCP error
  drm/omap: remove CLUT
  ...
This commit is contained in:
Dave Airlie 2017-06-03 11:30:42 +10:00
parent 2a1720376a cc8dd7661c
commit 562ff059bd
50 changed files with 708 additions and 3406 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

51
drivers/gpu/drm/omapdrm/displays/connector-analog-tv.c
View File

@ -14,8 +14,6 @@
#include <linux/platform_device.h>
#include <linux/of.h>
#include <video/omap-panel-data.h>
#include "../dss/omapdss.h"
struct panel_drv_data {
@ -25,8 +23,6 @@ struct panel_drv_data {
struct device *dev;
struct videomode vm;
bool invert_polarity;
};
static const struct videomode tvc_pal_vm = {
@ -95,13 +91,6 @@ static int tvc_enable(struct omap_dss_device *dssdev)
in->ops.atv->set_timings(in, &ddata->vm);
if (!ddata->dev->of_node) {
in->ops.atv->set_type(in, OMAP_DSS_VENC_TYPE_COMPOSITE);
in->ops.atv->invert_vid_out_polarity(in,
ddata->invert_polarity);
}
r = in->ops.atv->enable(in);
if (r)
return r;
@ -182,36 +171,10 @@ static struct omap_dss_driver tvc_driver = {
.get_timings = tvc_get_timings,
.check_timings = tvc_check_timings,
.get_resolution = omapdss_default_get_resolution,
.get_wss = tvc_get_wss,
.set_wss = tvc_set_wss,
};
static int tvc_probe_pdata(struct platform_device *pdev)
{
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
struct connector_atv_platform_data *pdata;
struct omap_dss_device *in, *dssdev;
pdata = dev_get_platdata(&pdev->dev);
in = omap_dss_find_output(pdata->source);
if (in == NULL) {
dev_err(&pdev->dev, "Failed to find video source\n");
return -EPROBE_DEFER;
}
ddata->in = in;
ddata->invert_polarity = pdata->invert_polarity;
dssdev = &ddata->dssdev;
dssdev->name = pdata->name;
return 0;
}
static int tvc_probe_of(struct platform_device *pdev)
{
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
@ -242,17 +205,9 @@ static int tvc_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, ddata);
ddata->dev = &pdev->dev;
if (dev_get_platdata(&pdev->dev)) {
r = tvc_probe_pdata(pdev);
if (r)
return r;
} else if (pdev->dev.of_node) {
r = tvc_probe_of(pdev);
if (r)
return r;
} else {
return -ENODEV;
}
r = tvc_probe_of(pdev);
if (r)
return r;
ddata->vm = tvc_pal_vm;

3
drivers/gpu/drm/omapdrm/displays/connector-dvi.c
View File

@ -15,7 +15,6 @@
#include <linux/slab.h>
#include <drm/drm_edid.h>
#include <video/omap-panel-data.h>
#include "../dss/omapdss.h"
@ -228,8 +227,6 @@ static struct omap_dss_driver dvic_driver = {
.get_timings = dvic_get_timings,
.check_timings = dvic_check_timings,
.get_resolution = omapdss_default_get_resolution,
.read_edid = dvic_read_edid,
.detect = dvic_detect,
};

3
drivers/gpu/drm/omapdrm/displays/connector-hdmi.c
View File

@ -17,7 +17,6 @@
#include <linux/of_gpio.h>
#include <drm/drm_edid.h>
#include <video/omap-panel-data.h>
#include "../dss/omapdss.h"
@ -196,8 +195,6 @@ static struct omap_dss_driver hdmic_driver = {
.get_timings = hdmic_get_timings,
.check_timings = hdmic_check_timings,
.get_resolution = omapdss_default_get_resolution,
.read_edid = hdmic_read_edid,
.detect = hdmic_detect,
.set_hdmi_mode = hdmic_set_hdmi_mode,

10
drivers/gpu/drm/omapdrm/displays/encoder-opa362.c
View File

@ -157,14 +157,6 @@ static int opa362_check_timings(struct omap_dss_device *dssdev,
return in->ops.atv->check_timings(in, vm);
}
static void opa362_set_type(struct omap_dss_device *dssdev,
enum omap_dss_venc_type type)
{
/* we can only drive a COMPOSITE output */
WARN_ON(type != OMAP_DSS_VENC_TYPE_COMPOSITE);
}
static const struct omapdss_atv_ops opa362_atv_ops = {
.connect = opa362_connect,
.disconnect = opa362_disconnect,
@ -175,8 +167,6 @@ static const struct omapdss_atv_ops opa362_atv_ops = {
.check_timings = opa362_check_timings,
.set_timings = opa362_set_timings,
.get_timings = opa362_get_timings,
.set_type = opa362_set_type,
};
static int opa362_probe(struct platform_device *pdev)

4
drivers/gpu/drm/omapdrm/displays/encoder-tfp410.c
View File

@ -22,7 +22,6 @@ struct panel_drv_data {
struct omap_dss_device *in;
int pd_gpio;
int data_lines;
struct videomode vm;
};
@ -82,8 +81,6 @@ static int tfp410_enable(struct omap_dss_device *dssdev)
return 0;
in->ops.dpi->set_timings(in, &ddata->vm);
if (ddata->data_lines)
in->ops.dpi->set_data_lines(in, ddata->data_lines);
r = in->ops.dpi->enable(in);
if (r)
@ -226,7 +223,6 @@ static int tfp410_probe(struct platform_device *pdev)
dssdev->type = OMAP_DISPLAY_TYPE_DPI;
dssdev->output_type = OMAP_DISPLAY_TYPE_DVI;
dssdev->owner = THIS_MODULE;
dssdev->phy.dpi.data_lines = ddata->data_lines;
dssdev->port_num = 1;
r = omapdss_register_output(dssdev);

83
drivers/gpu/drm/omapdrm/displays/panel-dpi.c
View File

@ -14,11 +14,9 @@
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/regulator/consumer.h>
#include <linux/backlight.h>
#include <video/omap-panel-data.h>
#include <video/of_display_timing.h>
#include "../dss/omapdss.h"
@ -27,15 +25,10 @@ struct panel_drv_data {
struct omap_dss_device dssdev;
struct omap_dss_device *in;
int data_lines;
struct videomode vm;
struct backlight_device *backlight;
/* used for non-DT boot, to be removed */
int backlight_gpio;
struct gpio_desc *enable_gpio;
struct regulator *vcc_supply;
};
@ -81,8 +74,6 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev)
if (omapdss_device_is_enabled(dssdev))
return 0;
if (ddata->data_lines)
in->ops.dpi->set_data_lines(in, ddata->data_lines);
in->ops.dpi->set_timings(in, &ddata->vm);
r = in->ops.dpi->enable(in);
@ -97,9 +88,6 @@ static int panel_dpi_enable(struct omap_dss_device *dssdev)
gpiod_set_value_cansleep(ddata->enable_gpio, 1);
if (gpio_is_valid(ddata->backlight_gpio))
gpio_set_value_cansleep(ddata->backlight_gpio, 1);
if (ddata->backlight) {
ddata->backlight->props.power = FB_BLANK_UNBLANK;
backlight_update_status(ddata->backlight);
@ -118,9 +106,6 @@ static void panel_dpi_disable(struct omap_dss_device *dssdev)
if (!omapdss_device_is_enabled(dssdev))
return;
if (gpio_is_valid(ddata->backlight_gpio))
gpio_set_value_cansleep(ddata->backlight_gpio, 0);
if (ddata->backlight) {
ddata->backlight->props.power = FB_BLANK_POWERDOWN;
backlight_update_status(ddata->backlight);
@ -173,51 +158,8 @@ static struct omap_dss_driver panel_dpi_ops = {
.set_timings = panel_dpi_set_timings,
.get_timings = panel_dpi_get_timings,
.check_timings = panel_dpi_check_timings,
.get_resolution = omapdss_default_get_resolution,
};
static int panel_dpi_probe_pdata(struct platform_device *pdev)
{
const struct panel_dpi_platform_data *pdata;
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
struct omap_dss_device *dssdev, *in;
int r;
pdata = dev_get_platdata(&pdev->dev);
in = omap_dss_find_output(pdata->source);
if (in == NULL) {
dev_err(&pdev->dev, "failed to find video source '%s'\n",
pdata->source);
return -EPROBE_DEFER;
}
ddata->in = in;
ddata->data_lines = pdata->data_lines;
videomode_from_timing(pdata->display_timing, &ddata->vm);
dssdev = &ddata->dssdev;
dssdev->name = pdata->name;
r = devm_gpio_request_one(&pdev->dev, pdata->enable_gpio,
GPIOF_OUT_INIT_LOW, "panel enable");
if (r)
goto err_gpio;
ddata->enable_gpio = gpio_to_desc(pdata->enable_gpio);
ddata->backlight_gpio = pdata->backlight_gpio;
return 0;
err_gpio:
omap_dss_put_device(ddata->in);
return r;
}
static int panel_dpi_probe_of(struct platform_device *pdev)
{
struct panel_drv_data *ddata = platform_get_drvdata(pdev);
@ -248,8 +190,6 @@ static int panel_dpi_probe_of(struct platform_device *pdev)
if (IS_ERR(ddata->vcc_supply))
return PTR_ERR(ddata->vcc_supply);
ddata->backlight_gpio = -ENOENT;
bl_node = of_parse_phandle(node, "backlight", 0);
if (bl_node) {
ddata->backlight = of_find_backlight_by_node(bl_node);
@ -297,24 +237,9 @@ static int panel_dpi_probe(struct platform_device *pdev)
platform_set_drvdata(pdev, ddata);
if (dev_get_platdata(&pdev->dev)) {
r = panel_dpi_probe_pdata(pdev);
if (r)
return r;
} else if (pdev->dev.of_node) {
r = panel_dpi_probe_of(pdev);
if (r)
return r;
} else {
return -ENODEV;
}
if (gpio_is_valid(ddata->backlight_gpio)) {
r = devm_gpio_request_one(&pdev->dev, ddata->backlight_gpio,
GPIOF_OUT_INIT_LOW, "panel backlight");
if (r)
goto err_gpio;
}
r = panel_dpi_probe_of(pdev);
if (r)
return r;
dssdev = &ddata->dssdev;
dssdev->dev = &pdev->dev;
@ -322,7 +247,6 @@ static int panel_dpi_probe(struct platform_device *pdev)
dssdev->type = OMAP_DISPLAY_TYPE_DPI;
dssdev->owner = THIS_MODULE;
dssdev->panel.vm = ddata->vm;
dssdev->phy.dpi.data_lines = ddata->data_lines;
r = omapdss_register_display(dssdev);
if (r) {
@ -333,7 +257,6 @@ static int panel_dpi_probe(struct platform_device *pdev)
return 0;
err_reg:
err_gpio:
omap_dss_put_device(ddata->in);
return r;
}

10
drivers/gpu/drm/omapdrm/displays/panel-dsi-cm.c
View File

@ -379,13 +379,6 @@ static const struct backlight_ops dsicm_bl_ops = {
.update_status = dsicm_bl_update_status,
};
static void dsicm_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres)
{
*xres = dssdev->panel.vm.hactive;
*yres = dssdev->panel.vm.vactive;
}
static ssize_t dsicm_num_errors_show(struct device *dev,
struct device_attribute *attr, char *buf)
{
@ -1116,9 +1109,6 @@ static struct omap_dss_driver dsicm_ops = {
.update = dsicm_update,
.sync = dsicm_sync,
.get_resolution = dsicm_get_resolution,
.get_recommended_bpp = omapdss_default_get_recommended_bpp,
.enable_te = dsicm_enable_te,
.get_te = dsicm_get_te,

7
drivers/gpu/drm/omapdrm/displays/panel-lgphilips-lb035q02.c
View File

@ -49,8 +49,6 @@ struct panel_drv_data {
struct spi_device *spi;
int data_lines;
struct videomode vm;
struct gpio_desc *enable_gpio;
@ -159,8 +157,6 @@ static int lb035q02_enable(struct omap_dss_device *dssdev)
if (omapdss_device_is_enabled(dssdev))
return 0;
if (ddata->data_lines)
in->ops.dpi->set_data_lines(in, ddata->data_lines);
in->ops.dpi->set_timings(in, &ddata->vm);
r = in->ops.dpi->enable(in);
@ -230,8 +226,6 @@ static struct omap_dss_driver lb035q02_ops = {
.set_timings = lb035q02_set_timings,
.get_timings = lb035q02_get_timings,
.check_timings = lb035q02_check_timings,
.get_resolution = omapdss_default_get_resolution,
};
static int lb035q02_probe_of(struct spi_device *spi)
@ -289,7 +283,6 @@ static int lb035q02_panel_spi_probe(struct spi_device *spi)
dssdev->type = OMAP_DISPLAY_TYPE_DPI;
dssdev->owner = THIS_MODULE;
dssdev->panel.vm = ddata->vm;
dssdev->phy.dpi.data_lines = ddata->data_lines;
r = omapdss_register_display(dssdev);
if (r) {

6
drivers/gpu/drm/omapdrm/displays/panel-nec-nl8048hl11.c
View File

@ -25,8 +25,6 @@ struct panel_drv_data {
struct videomode vm;
int data_lines;
int res_gpio;
int qvga_gpio;
@ -153,8 +151,6 @@ static int nec_8048_enable(struct omap_dss_device *dssdev)
if (omapdss_device_is_enabled(dssdev))
return 0;
if (ddata->data_lines)
in->ops.dpi->set_data_lines(in, ddata->data_lines);
in->ops.dpi->set_timings(in, &ddata->vm);
r = in->ops.dpi->enable(in);
@ -224,8 +220,6 @@ static struct omap_dss_driver nec_8048_ops = {
.set_timings = nec_8048_set_timings,
.get_timings = nec_8048_get_timings,
.check_timings = nec_8048_check_timings,
.get_resolution = omapdss_default_get_resolution,
};
static int nec_8048_probe_of(struct spi_device *spi)

7
drivers/gpu/drm/omapdrm/displays/panel-sharp-ls037v7dw01.c
View File

@ -24,8 +24,6 @@ struct panel_drv_data {
struct omap_dss_device *in;
struct regulator *vcc;
int data_lines;
struct videomode vm;
struct gpio_desc *resb_gpio; /* low = reset active min 20 us */
@ -99,8 +97,6 @@ static int sharp_ls_enable(struct omap_dss_device *dssdev)
if (omapdss_device_is_enabled(dssdev))
return 0;
if (ddata->data_lines)
in->ops.dpi->set_data_lines(in, ddata->data_lines);
in->ops.dpi->set_timings(in, &ddata->vm);
if (ddata->vcc) {
@ -194,8 +190,6 @@ static struct omap_dss_driver sharp_ls_ops = {
.set_timings = sharp_ls_set_timings,
.get_timings = sharp_ls_get_timings,
.check_timings = sharp_ls_check_timings,
.get_resolution = omapdss_default_get_resolution,
};
static int sharp_ls_get_gpio_of(struct device *dev, int index, int val,
@ -289,7 +283,6 @@ static int sharp_ls_probe(struct platform_device *pdev)
dssdev->type = OMAP_DISPLAY_TYPE_DPI;
dssdev->owner = THIS_MODULE;
dssdev->panel.vm = ddata->vm;
dssdev->phy.dpi.data_lines = ddata->data_lines;
r = omapdss_register_display(dssdev);
if (r) {

49
drivers/gpu/drm/omapdrm/displays/panel-sony-acx565akm.c
View File

@ -32,8 +32,6 @@
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <video/omap-panel-data.h>
#include "../dss/omapdss.h"
#define MIPID_CMD_READ_DISP_ID 0x04
@ -69,7 +67,6 @@ struct panel_drv_data {
struct omap_dss_device *in;
int reset_gpio;
int datapairs;
struct videomode vm;
@ -547,9 +544,6 @@ static int acx565akm_panel_power_on(struct omap_dss_device *dssdev)
in->ops.sdi->set_timings(in, &ddata->vm);
if (ddata->datapairs > 0)
in->ops.sdi->set_datapairs(in, ddata->datapairs);
r = in->ops.sdi->enable(in);
if (r) {
pr_err("%s sdi enable failed\n", __func__);
@ -697,36 +691,8 @@ static struct omap_dss_driver acx565akm_ops = {
.set_timings = acx565akm_set_timings,
.get_timings = acx565akm_get_timings,
.check_timings = acx565akm_check_timings,
.get_resolution = omapdss_default_get_resolution,
};
static int acx565akm_probe_pdata(struct spi_device *spi)
{
const struct panel_acx565akm_platform_data *pdata;
struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
struct omap_dss_device *dssdev, *in;
pdata = dev_get_platdata(&spi->dev);
ddata->reset_gpio = pdata->reset_gpio;
in = omap_dss_find_output(pdata->source);
if (in == NULL) {
dev_err(&spi->dev, "failed to find video source '%s'\n",
pdata->source);
return -EPROBE_DEFER;
}
ddata->in = in;
ddata->datapairs = pdata->datapairs;
dssdev = &ddata->dssdev;
dssdev->name = pdata->name;
return 0;
}
static int acx565akm_probe_of(struct spi_device *spi)
{
struct panel_drv_data *ddata = dev_get_drvdata(&spi->dev);
@ -766,18 +732,9 @@ static int acx565akm_probe(struct spi_device *spi)
mutex_init(&ddata->mutex);
if (dev_get_platdata(&spi->dev)) {
r = acx565akm_probe_pdata(spi);
if (r)
return r;
} else if (spi->dev.of_node) {
r = acx565akm_probe_of(spi);
if (r)
return r;
} else {
dev_err(&spi->dev, "platform data missing!\n");
return -ENODEV;
}
r = acx565akm_probe_of(spi);
if (r)
return r;
if (gpio_is_valid(ddata->reset_gpio)) {
r = devm_gpio_request_one(&spi->dev, ddata->reset_gpio,

5
drivers/gpu/drm/omapdrm/displays/panel-tpo-td028ttec1.c
View File

@ -35,8 +35,6 @@ struct panel_drv_data {
struct omap_dss_device dssdev;
struct omap_dss_device *in;
int data_lines;
struct videomode vm;
struct spi_device *spi_dev;
@ -207,8 +205,6 @@ static int td028ttec1_panel_enable(struct omap_dss_device *dssdev)
if (omapdss_device_is_enabled(dssdev))
return 0;
if (ddata->data_lines)
in->ops.dpi->set_data_lines(in, ddata->data_lines);
in->ops.dpi->set_timings(in, &ddata->vm);
r = in->ops.dpi->enable(in);
@ -423,7 +419,6 @@ static int td028ttec1_panel_probe(struct spi_device *spi)
dssdev->type = OMAP_DISPLAY_TYPE_DPI;
dssdev->owner = THIS_MODULE;
dssdev->panel.vm = ddata->vm;
dssdev->phy.dpi.data_lines = ddata->data_lines;
r = omapdss_register_display(dssdev);
if (r) {

6
drivers/gpu/drm/omapdrm/displays/panel-tpo-td043mtea1.c
View File

@ -58,8 +58,6 @@ struct panel_drv_data {
struct videomode vm;
int data_lines;
struct spi_device *spi;
struct regulator *vcc_reg;
int nreset_gpio;
@ -378,8 +376,6 @@ static int tpo_td043_enable(struct omap_dss_device *dssdev)
if (omapdss_device_is_enabled(dssdev))
return 0;
if (ddata->data_lines)
in->ops.dpi->set_data_lines(in, ddata->data_lines);
in->ops.dpi->set_timings(in, &ddata->vm);
r = in->ops.dpi->enable(in);
@ -461,8 +457,6 @@ static struct omap_dss_driver tpo_td043_ops = {
.set_mirror = tpo_td043_set_hmirror,
.get_mirror = tpo_td043_get_hmirror,
.get_resolution = omapdss_default_get_resolution,
};
static int tpo_td043_probe_of(struct spi_device *spi)

13
drivers/gpu/drm/omapdrm/dss/Kconfig
View File

@ -49,19 +49,6 @@ config OMAP2_DSS_DPI
help
DPI Interface. This is the Parallel Display Interface.
config OMAP2_DSS_RFBI
bool "RFBI support"
depends on BROKEN
default n
help
MIPI DBI support (RFBI, Remote Framebuffer Interface, in Texas
Instrument's terminology).
DBI is a bus between the host processor and a peripheral,
such as a display or a framebuffer chip.
See http://www.mipi.org/ for DBI specifications.
config OMAP2_DSS_VENC
bool "VENC support"
default y

1
drivers/gpu/drm/omapdrm/dss/Makefile
View File

@ -8,7 +8,6 @@ obj-$(CONFIG_OMAP2_DSS) += omapdss.o
omapdss-y := core.o dss.o dss_features.o dispc.o dispc_coefs.o \
pll.o video-pll.o
omapdss-$(CONFIG_OMAP2_DSS_DPI) += dpi.o
omapdss-$(CONFIG_OMAP2_DSS_RFBI) += rfbi.o
omapdss-$(CONFIG_OMAP2_DSS_VENC) += venc.o
omapdss-$(CONFIG_OMAP2_DSS_SDI) += sdi.o
omapdss-$(CONFIG_OMAP2_DSS_DSI) += dsi.o

41
drivers/gpu/drm/omapdrm/dss/core.c
View File

@ -41,20 +41,8 @@
static struct {
struct platform_device *pdev;
const char *default_display_name;
} core;
static char *def_disp_name;
module_param_named(def_disp, def_disp_name, charp, 0);
MODULE_PARM_DESC(def_disp, "default display name");
const char *omapdss_get_default_display_name(void)
{
return core.default_display_name;
}
EXPORT_SYMBOL(omapdss_get_default_display_name);
enum omapdss_version omapdss_get_version(void)
{
struct omap_dss_board_info *pdata = core.pdev->dev.platform_data;
@ -62,11 +50,6 @@ enum omapdss_version omapdss_get_version(void)
}
EXPORT_SYMBOL(omapdss_get_version);
struct platform_device *dss_get_core_pdev(void)
{
return core.pdev;
}
int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask)
{
struct omap_dss_board_info *board_data = core.pdev->dev.platform_data;
@ -180,7 +163,6 @@ static void dss_disable_all_devices(void)
static int __init omap_dss_probe(struct platform_device *pdev)
{
struct omap_dss_board_info *pdata = pdev->dev.platform_data;
int r;
core.pdev = pdev;
@ -191,11 +173,6 @@ static int __init omap_dss_probe(struct platform_device *pdev)
if (r)
goto err_debugfs;
if (def_disp_name)
core.default_display_name = def_disp_name;
else if (pdata->default_display_name)
core.default_display_name = pdata->default_display_name;
return 0;
err_debugfs:
@ -231,15 +208,6 @@ static int (*dss_output_drv_reg_funcs[])(void) __initdata = {
#ifdef CONFIG_OMAP2_DSS_DSI
dsi_init_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_DPI
dpi_init_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_SDI
sdi_init_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_RFBI
rfbi_init_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_VENC
venc_init_platform_driver,
#endif
@ -261,15 +229,6 @@ static void (*dss_output_drv_unreg_funcs[])(void) = {
#ifdef CONFIG_OMAP2_DSS_VENC
venc_uninit_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_RFBI
rfbi_uninit_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_SDI
sdi_uninit_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_DPI
dpi_uninit_platform_driver,
#endif
#ifdef CONFIG_OMAP2_DSS_DSI
dsi_uninit_platform_driver,
#endif

715
drivers/gpu/drm/omapdrm/dss/dispc.c
View File

File diff suppressed because it is too large Load Diff

62
drivers/gpu/drm/omapdrm/dss/display.c
View File

@ -30,45 +30,6 @@
#include "omapdss.h"
void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres)
{
*xres = dssdev->panel.vm.hactive;
*yres = dssdev->panel.vm.vactive;
}
EXPORT_SYMBOL(omapdss_default_get_resolution);
int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev)
{
switch (dssdev->type) {
case OMAP_DISPLAY_TYPE_DPI:
if (dssdev->phy.dpi.data_lines == 24)
return 24;
else
return 16;
case OMAP_DISPLAY_TYPE_DBI:
if (dssdev->ctrl.pixel_size == 24)
return 24;
else
return 16;
case OMAP_DISPLAY_TYPE_DSI:
if (dssdev->panel.dsi_pix_fmt == OMAP_DSS_DSI_FMT_RGB565)
return 16;
else
return 24;
case OMAP_DISPLAY_TYPE_VENC:
case OMAP_DISPLAY_TYPE_SDI:
case OMAP_DISPLAY_TYPE_HDMI:
case OMAP_DISPLAY_TYPE_DVI:
return 24;
default:
BUG();
return 0;
}
}
EXPORT_SYMBOL(omapdss_default_get_recommended_bpp);
void omapdss_default_get_timings(struct omap_dss_device *dssdev,
struct videomode *vm)
{
@ -87,34 +48,21 @@ int omapdss_register_display(struct omap_dss_device *dssdev)
int id;
/*
* Note: this presumes all the displays are either using DT or non-DT,
* which normally should be the case. This also presumes that all
* displays either have an DT alias, or none has.
* Note: this presumes that all displays either have an DT alias, or
* none has.
*/
if (dssdev->dev->of_node) {
id = of_alias_get_id(dssdev->dev->of_node, "display");
if (id < 0)
id = disp_num_counter++;
} else {
id = of_alias_get_id(dssdev->dev->of_node, "display");
if (id < 0)
id = disp_num_counter++;
}
snprintf(dssdev->alias, sizeof(dssdev->alias), "display%d", id);
/* Use 'label' property for name, if it exists */
if (dssdev->dev->of_node)
of_property_read_string(dssdev->dev->of_node, "label",
&dssdev->name);
of_property_read_string(dssdev->dev->of_node, "label", &dssdev->name);
if (dssdev->name == NULL)
dssdev->name = dssdev->alias;
if (drv && drv->get_resolution == NULL)
drv->get_resolution = omapdss_default_get_resolution;
if (drv && drv->get_recommended_bpp == NULL)
drv->get_recommended_bpp = omapdss_default_get_recommended_bpp;
if (drv && drv->get_timings == NULL)
drv->get_timings = omapdss_default_get_timings;

106
drivers/gpu/drm/omapdrm/dss/dpi.c
View File

@ -32,7 +32,6 @@
#include <linux/string.h>
#include <linux/of.h>
#include <linux/clk.h>
#include <linux/component.h>
#include "omapdss.h"
#include "dss.h"
@ -61,12 +60,6 @@ static struct dpi_data *dpi_get_data_from_dssdev(struct omap_dss_device *dssdev)
return container_of(dssdev, struct dpi_data, output);
}
/* only used in non-DT mode */
static struct dpi_data *dpi_get_data_from_pdev(struct platform_device *pdev)
{
return dev_get_drvdata(&pdev->dev);
}
static enum dss_clk_source dpi_get_clk_src_dra7xx(enum omap_channel channel)
{
/*
@ -567,17 +560,6 @@ static int dpi_check_timings(struct omap_dss_device *dssdev,
return 0;
}
static void dpi_set_data_lines(struct omap_dss_device *dssdev, int data_lines)
{
struct dpi_data *dpi = dpi_get_data_from_dssdev(dssdev);
mutex_lock(&dpi->lock);
dpi->data_lines = data_lines;
mutex_unlock(&dpi->lock);
}
static int dpi_verify_pll(struct dss_pll *pll)
{
int r;
@ -732,34 +714,8 @@ static const struct omapdss_dpi_ops dpi_ops = {
.check_timings = dpi_check_timings,
.set_timings = dpi_set_timings,
.get_timings = dpi_get_timings,
.set_data_lines = dpi_set_data_lines,
};
static void dpi_init_output(struct platform_device *pdev)
{
struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
struct omap_dss_device *out = &dpi->output;
out->dev = &pdev->dev;
out->id = OMAP_DSS_OUTPUT_DPI;
out->output_type = OMAP_DISPLAY_TYPE_DPI;
out->name = "dpi.0";
out->dispc_channel = dpi_get_channel(0);
out->ops.dpi = &dpi_ops;
out->owner = THIS_MODULE;
omapdss_register_output(out);
}
static void dpi_uninit_output(struct platform_device *pdev)
{
struct dpi_data *dpi = dpi_get_data_from_pdev(pdev);
struct omap_dss_device *out = &dpi->output;
omapdss_unregister_output(out);
}
static void dpi_init_output_port(struct platform_device *pdev,
struct device_node *port)
{
@ -804,68 +760,6 @@ static void dpi_uninit_output_port(struct device_node *port)
omapdss_unregister_output(out);
}
static int dpi_bind(struct device *dev, struct device *master, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
struct dpi_data *dpi;
dpi = devm_kzalloc(&pdev->dev, sizeof(*dpi), GFP_KERNEL);
if (!dpi)
return -ENOMEM;
dpi->pdev = pdev;
dev_set_drvdata(&pdev->dev, dpi);
mutex_init(&dpi->lock);
dpi_init_output(pdev);
return 0;
}
static void dpi_unbind(struct device *dev, struct device *master, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
dpi_uninit_output(pdev);
}
static const struct component_ops dpi_component_ops = {
.bind = dpi_bind,
.unbind = dpi_unbind,
};
static int dpi_probe(struct platform_device *pdev)
{
return component_add(&pdev->dev, &dpi_component_ops);
}
static int dpi_remove(struct platform_device *pdev)
{
component_del(&pdev->dev, &dpi_component_ops);
return 0;
}
static struct platform_driver omap_dpi_driver = {
.probe = dpi_probe,
.remove = dpi_remove,
.driver = {
.name = "omapdss_dpi",
.suppress_bind_attrs = true,
},
};
int __init dpi_init_platform_driver(void)
{
return platform_driver_register(&omap_dpi_driver);
}
void dpi_uninit_platform_driver(void)
{
platform_driver_unregister(&omap_dpi_driver);
}
int dpi_init_port(struct platform_device *pdev, struct device_node *port)
{
struct dpi_data *dpi;

118
drivers/gpu/drm/omapdrm/dss/dsi.c
View File

@ -5276,12 +5276,12 @@ static int dsi_init_pll_data(struct platform_device *dsidev)
static int dsi_bind(struct device *dev, struct device *master, void *data)
{
struct platform_device *dsidev = to_platform_device(dev);
const struct dsi_module_id_data *d;
u32 rev;
int r, i;
struct dsi_data *dsi;
struct resource *dsi_mem;
struct resource *res;
struct resource temp_res;
dsi = devm_kzalloc(&dsidev->dev, sizeof(*dsi), GFP_KERNEL);
if (!dsi)
@ -5311,67 +5311,20 @@ static int dsi_bind(struct device *dev, struct device *master, void *data)
dsi->te_timer.data = 0;
#endif
res = platform_get_resource_byname(dsidev, IORESOURCE_MEM, "proto");
if (!res) {
res = platform_get_resource(dsidev, IORESOURCE_MEM, 0);
if (!res) {
DSSERR("can't get IORESOURCE_MEM DSI\n");
return -EINVAL;
}
temp_res.start = res->start;
temp_res.end = temp_res.start + DSI_PROTO_SZ - 1;
res = &temp_res;
}
dsi_mem = res;
dsi->proto_base = devm_ioremap(&dsidev->dev, res->start,
resource_size(res));
if (!dsi->proto_base) {
DSSERR("can't ioremap DSI protocol engine\n");
return -ENOMEM;
}
dsi_mem = platform_get_resource_byname(dsidev, IORESOURCE_MEM, "proto");
dsi->proto_base = devm_ioremap_resource(&dsidev->dev, dsi_mem);
if (IS_ERR(dsi->proto_base))
return PTR_ERR(dsi->proto_base);
res = platform_get_resource_byname(dsidev, IORESOURCE_MEM, "phy");
if (!res) {
res = platform_get_resource(dsidev, IORESOURCE_MEM, 0);
if (!res) {
DSSERR("can't get IORESOURCE_MEM DSI\n");
return -EINVAL;
}
temp_res.start = res->start + DSI_PHY_OFFSET;
temp_res.end = temp_res.start + DSI_PHY_SZ - 1;
res = &temp_res;
}
dsi->phy_base = devm_ioremap(&dsidev->dev, res->start,
resource_size(res));
if (!dsi->phy_base) {
DSSERR("can't ioremap DSI PHY\n");
return -ENOMEM;
}
dsi->phy_base = devm_ioremap_resource(&dsidev->dev, res);
if (IS_ERR(dsi->phy_base))
return PTR_ERR(dsi->phy_base);
res = platform_get_resource_byname(dsidev, IORESOURCE_MEM, "pll");
if (!res) {
res = platform_get_resource(dsidev, IORESOURCE_MEM, 0);
if (!res) {
DSSERR("can't get IORESOURCE_MEM DSI\n");
return -EINVAL;
}
temp_res.start = res->start + DSI_PLL_OFFSET;
temp_res.end = temp_res.start + DSI_PLL_SZ - 1;
res = &temp_res;
}
dsi->pll_base = devm_ioremap(&dsidev->dev, res->start,
resource_size(res));
if (!dsi->pll_base) {
DSSERR("can't ioremap DSI PLL\n");
return -ENOMEM;
}
dsi->pll_base = devm_ioremap_resource(&dsidev->dev, res);
if (IS_ERR(dsi->pll_base))
return PTR_ERR(dsi->pll_base);
dsi->irq = platform_get_irq(dsi->pdev, 0);
if (dsi->irq < 0) {
@ -5386,31 +5339,17 @@ static int dsi_bind(struct device *dev, struct device *master, void *data)
return r;
}
if (dsidev->dev.of_node) {
const struct of_device_id *match;
const struct dsi_module_id_data *d;
d = of_match_node(dsi_of_match, dsidev->dev.of_node)->data;
while (d->address != 0 && d->address != dsi_mem->start)
d++;
match = of_match_node(dsi_of_match, dsidev->dev.of_node);
if (!match) {
DSSERR("unsupported DSI module\n");
return -ENODEV;
}
d = match->data;
while (d->address != 0 && d->address != dsi_mem->start)
d++;
if (d->address == 0) {
DSSERR("unsupported DSI module\n");
return -ENODEV;
}
dsi->module_id = d->id;
} else {
dsi->module_id = dsidev->id;
if (d->address == 0) {
DSSERR("unsupported DSI module\n");
return -ENODEV;
}
dsi->module_id = d->id;
/* DSI VCs initialization */
for (i = 0; i < ARRAY_SIZE(dsi->vc); i++) {
dsi->vc[i].source = DSI_VC_SOURCE_L4;
@ -5446,19 +5385,16 @@ static int dsi_bind(struct device *dev, struct device *master, void *data)
dsi_init_output(dsidev);
if (dsidev->dev.of_node) {
r = dsi_probe_of(dsidev);
if (r) {
DSSERR("Invalid DSI DT data\n");
goto err_probe_of;
}
r = of_platform_populate(dsidev->dev.of_node, NULL, NULL,
&dsidev->dev);
if (r)
DSSERR("Failed to populate DSI child devices: %d\n", r);
r = dsi_probe_of(dsidev);
if (r) {
DSSERR("Invalid DSI DT data\n");
goto err_probe_of;
}
r = of_platform_populate(dsidev->dev.of_node, NULL, NULL, &dsidev->dev);
if (r)
DSSERR("Failed to populate DSI child devices: %d\n", r);
dsi_runtime_put(dsidev);
if (dsi->module_id == 0)

14
drivers/gpu/drm/omapdrm/dss/dss.c
View File

@ -1158,17 +1158,9 @@ static int dss_bind(struct device *dev)
return r;
dss_mem = platform_get_resource(dss.pdev, IORESOURCE_MEM, 0);
if (!dss_mem) {
DSSERR("can't get IORESOURCE_MEM DSS\n");
return -EINVAL;
}
dss.base = devm_ioremap(&pdev->dev, dss_mem->start,
resource_size(dss_mem));
if (!dss.base) {
DSSERR("can't ioremap DSS\n");
return -ENOMEM;
}
dss.base = devm_ioremap_resource(&pdev->dev, dss_mem);
if (IS_ERR(dss.base))
return PTR_ERR(dss.base);
r = dss_get_clocks();
if (r)

11
drivers/gpu/drm/omapdrm/dss/dss.h
View File

@ -219,7 +219,6 @@ struct seq_file;
struct platform_device;
/* core */
struct platform_device *dss_get_core_pdev(void);
int dss_dsi_enable_pads(int dsi_id, unsigned lane_mask);
void dss_dsi_disable_pads(int dsi_id, unsigned lane_mask);
int dss_set_min_bus_tput(struct device *dev, unsigned long tput);
@ -281,9 +280,6 @@ bool dss_div_calc(unsigned long pck, unsigned long fck_min,
dss_div_calc_func func, void *data);
/* SDI */
int sdi_init_platform_driver(void) __init;
void sdi_uninit_platform_driver(void);
#ifdef CONFIG_OMAP2_DSS_SDI
int sdi_init_port(struct platform_device *pdev, struct device_node *port);
void sdi_uninit_port(struct device_node *port);
@ -315,9 +311,6 @@ void dsi_irq_handler(void);
#endif
/* DPI */
int dpi_init_platform_driver(void) __init;
void dpi_uninit_platform_driver(void);
#ifdef CONFIG_OMAP2_DSS_DPI
int dpi_init_port(struct platform_device *pdev, struct device_node *port);
void dpi_uninit_port(struct device_node *port);
@ -389,10 +382,6 @@ void hdmi4_uninit_platform_driver(void);
int hdmi5_init_platform_driver(void) __init;
void hdmi5_uninit_platform_driver(void);
/* RFBI */
int rfbi_init_platform_driver(void) __init;
void rfbi_uninit_platform_driver(void);
#ifdef CONFIG_OMAP2_DSS_COLLECT_IRQ_STATS
static inline void dss_collect_irq_stats(u32 irqstatus, unsigned *irq_arr)

179
drivers/gpu/drm/omapdrm/dss/dss_features.c
View File

@ -22,6 +22,7 @@
#include <linux/types.h>
#include <linux/err.h>
#include <linux/slab.h>
#include <drm/drm_fourcc.h>
#include "omapdss.h"
#include "dss.h"
@ -47,12 +48,10 @@ struct omap_dss_features {
const int num_ovls;
const enum omap_display_type *supported_displays;
const enum omap_dss_output_id *supported_outputs;
const enum omap_color_mode *supported_color_modes;
const u32 **supported_color_modes;
const enum omap_overlay_caps *overlay_caps;
const struct dss_param_range *dss_params;
const enum omap_dss_rotation_type supported_rotation_types;
const u32 buffer_size_unit;
const u32 burst_size_unit;
};
@ -231,96 +230,104 @@ static const enum omap_dss_output_id omap5_dss_supported_outputs[] = {
OMAP_DSS_OUTPUT_DSI2,
};
static const enum omap_color_mode omap2_dss_supported_color_modes[] = {
#define COLOR_ARRAY(arr...) (const u32[]) { arr, 0 }
static const u32 *omap2_dss_supported_color_modes[] = {
/* OMAP_DSS_GFX */
OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P,
COLOR_ARRAY(
DRM_FORMAT_RGBX4444, DRM_FORMAT_RGB565,
DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB888),
/* OMAP_DSS_VIDEO1 */
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
OMAP_DSS_COLOR_UYVY,
COLOR_ARRAY(
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_YUYV,
DRM_FORMAT_UYVY),
/* OMAP_DSS_VIDEO2 */
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
OMAP_DSS_COLOR_UYVY,
COLOR_ARRAY(
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_YUYV,
DRM_FORMAT_UYVY),
};
static const enum omap_color_mode omap3_dss_supported_color_modes[] = {
static const u32 *omap3_dss_supported_color_modes[] = {
/* OMAP_DSS_GFX */
OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
COLOR_ARRAY(
DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444,
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO1 */
OMAP_DSS_COLOR_RGB24U | OMAP_DSS_COLOR_RGB24P |
OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_RGB16 |
OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_UYVY,
COLOR_ARRAY(
DRM_FORMAT_XRGB8888, DRM_FORMAT_RGB888,
DRM_FORMAT_RGBX4444, DRM_FORMAT_RGB565,
DRM_FORMAT_YUYV, DRM_FORMAT_UYVY),
/* OMAP_DSS_VIDEO2 */
OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_YUV2 |
OMAP_DSS_COLOR_UYVY | OMAP_DSS_COLOR_ARGB32 |
OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32,
COLOR_ARRAY(
DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444,
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_YUYV,
DRM_FORMAT_UYVY, DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888),
};
static const enum omap_color_mode omap4_dss_supported_color_modes[] = {
static const u32 *omap4_dss_supported_color_modes[] = {
/* OMAP_DSS_GFX */
OMAP_DSS_COLOR_CLUT1 | OMAP_DSS_COLOR_CLUT2 |
OMAP_DSS_COLOR_CLUT4 | OMAP_DSS_COLOR_CLUT8 |
OMAP_DSS_COLOR_RGB12U | OMAP_DSS_COLOR_ARGB16 |
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_ARGB32 |
OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_RGBX32 |
OMAP_DSS_COLOR_ARGB16_1555 | OMAP_DSS_COLOR_RGBX16 |
OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_XRGB16_1555,
COLOR_ARRAY(
DRM_FORMAT_RGBX4444, DRM_FORMAT_ARGB4444,
DRM_FORMAT_RGB565, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_ARGB8888,
DRM_FORMAT_RGBA8888, DRM_FORMAT_RGBX8888,
DRM_FORMAT_ARGB1555, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB1555),
/* OMAP_DSS_VIDEO1 */
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
OMAP_DSS_COLOR_RGBX32,
COLOR_ARRAY(
DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO2 */
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
OMAP_DSS_COLOR_RGBX32,
COLOR_ARRAY(
DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBX8888),
/* OMAP_DSS_VIDEO3 */
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
OMAP_DSS_COLOR_RGBX32,
COLOR_ARRAY(
DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBX8888),
/* OMAP_DSS_WB */
OMAP_DSS_COLOR_RGB16 | OMAP_DSS_COLOR_RGB12U |
OMAP_DSS_COLOR_YUV2 | OMAP_DSS_COLOR_ARGB16_1555 |
OMAP_DSS_COLOR_RGBA32 | OMAP_DSS_COLOR_NV12 |
OMAP_DSS_COLOR_RGBA16 | OMAP_DSS_COLOR_RGB24U |
OMAP_DSS_COLOR_RGB24P | OMAP_DSS_COLOR_UYVY |
OMAP_DSS_COLOR_ARGB16 | OMAP_DSS_COLOR_XRGB16_1555 |
OMAP_DSS_COLOR_ARGB32 | OMAP_DSS_COLOR_RGBX16 |
OMAP_DSS_COLOR_RGBX32,
COLOR_ARRAY(
DRM_FORMAT_RGB565, DRM_FORMAT_RGBX4444,
DRM_FORMAT_YUYV, DRM_FORMAT_ARGB1555,
DRM_FORMAT_RGBA8888, DRM_FORMAT_NV12,
DRM_FORMAT_RGBA4444, DRM_FORMAT_XRGB8888,
DRM_FORMAT_RGB888, DRM_FORMAT_UYVY,
DRM_FORMAT_ARGB4444, DRM_FORMAT_XRGB1555,
DRM_FORMAT_ARGB8888, DRM_FORMAT_XRGB4444,
DRM_FORMAT_RGBX8888),
};
static const enum omap_overlay_caps omap2_dss_overlay_caps[] = {
@ -602,7 +609,6 @@ static const struct omap_dss_features omap2_dss_features = {
.supported_color_modes = omap2_dss_supported_color_modes,
.overlay_caps = omap2_dss_overlay_caps,
.dss_params = omap2_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
.buffer_size_unit = 1,
.burst_size_unit = 8,
};
@ -622,7 +628,6 @@ static const struct omap_dss_features omap3430_dss_features = {
.supported_color_modes = omap3_dss_supported_color_modes,
.overlay_caps = omap3430_dss_overlay_caps,
.dss_params = omap3_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
.buffer_size_unit = 1,
.burst_size_unit = 8,
};
@ -645,7 +650,6 @@ static const struct omap_dss_features am35xx_dss_features = {
.supported_color_modes = omap3_dss_supported_color_modes,
.overlay_caps = omap3430_dss_overlay_caps,
.dss_params = omap3_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
.buffer_size_unit = 1,
.burst_size_unit = 8,
};
@ -664,7 +668,6 @@ static const struct omap_dss_features am43xx_dss_features = {
.supported_color_modes = omap3_dss_supported_color_modes,
.overlay_caps = omap3430_dss_overlay_caps,
.dss_params = am43xx_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA,
.buffer_size_unit = 1,
.burst_size_unit = 8,
};
@ -683,7 +686,6 @@ static const struct omap_dss_features omap3630_dss_features = {
.supported_color_modes = omap3_dss_supported_color_modes,
.overlay_caps = omap3630_dss_overlay_caps,
.dss_params = omap3_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_VRFB,
.buffer_size_unit = 1,
.burst_size_unit = 8,
};
@ -704,7 +706,6 @@ static const struct omap_dss_features omap4430_es1_0_dss_features = {
.supported_color_modes = omap4_dss_supported_color_modes,
.overlay_caps = omap4_dss_overlay_caps,
.dss_params = omap4_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
.buffer_size_unit = 16,
.burst_size_unit = 16,
};
@ -724,7 +725,6 @@ static const struct omap_dss_features omap4430_es2_0_1_2_dss_features = {
.supported_color_modes = omap4_dss_supported_color_modes,
.overlay_caps = omap4_dss_overlay_caps,
.dss_params = omap4_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
.buffer_size_unit = 16,
.burst_size_unit = 16,
};
@ -744,7 +744,6 @@ static const struct omap_dss_features omap4_dss_features = {
.supported_color_modes = omap4_dss_supported_color_modes,
.overlay_caps = omap4_dss_overlay_caps,
.dss_params = omap4_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
.buffer_size_unit = 16,
.burst_size_unit = 16,
};
@ -764,7 +763,6 @@ static const struct omap_dss_features omap5_dss_features = {
.supported_color_modes = omap4_dss_supported_color_modes,
.overlay_caps = omap4_dss_overlay_caps,
.dss_params = omap5_dss_param_range,
.supported_rotation_types = OMAP_DSS_ROT_DMA | OMAP_DSS_ROT_TILER,
.buffer_size_unit = 16,
.burst_size_unit = 16,
};
@ -800,7 +798,7 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel
return omap_current_dss_features->supported_outputs[channel];
}
enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane)
const u32 *dss_feat_get_supported_color_modes(enum omap_plane_id plane)
{
return omap_current_dss_features->supported_color_modes[plane];
}
@ -810,11 +808,19 @@ enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane)
return omap_current_dss_features->overlay_caps[plane];
}
bool dss_feat_color_mode_supported(enum omap_plane_id plane,
enum omap_color_mode color_mode)
bool dss_feat_color_mode_supported(enum omap_plane_id plane, u32 fourcc)
{
return omap_current_dss_features->supported_color_modes[plane] &
color_mode;
const u32 *modes;
unsigned int i;
modes = omap_current_dss_features->supported_color_modes[plane];
for (i = 0; modes[i]; ++i) {
if (modes[i] == fourcc)
return true;
}
return false;
}
u32 dss_feat_get_buffer_size_unit(void)
@ -851,11 +857,6 @@ void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end)
*end = omap_current_dss_features->reg_fields[id].end;
}
bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type)
{
return omap_current_dss_features->supported_rotation_types & rot_type;
}
void dss_features_init(enum omapdss_version version)
{
switch (version) {

6
drivers/gpu/drm/omapdrm/dss/dss_features.h
View File

@ -90,13 +90,11 @@ unsigned long dss_feat_get_param_min(enum dss_range_param param);
unsigned long dss_feat_get_param_max(enum dss_range_param param);
enum omap_overlay_caps dss_feat_get_overlay_caps(enum omap_plane_id plane);
bool dss_feat_color_mode_supported(enum omap_plane_id plane,
enum omap_color_mode color_mode);
u32 fourcc);
u32 dss_feat_get_buffer_size_unit(void); /* in bytes */
u32 dss_feat_get_burst_size_unit(void); /* in bytes */
bool dss_feat_rotation_type_supported(enum omap_dss_rotation_type rot_type);
bool dss_has_feature(enum dss_feat_id id);
void dss_feat_get_reg_field(enum dss_feat_reg_field id, u8 *start, u8 *end);
void dss_features_init(enum omapdss_version version);
@ -106,6 +104,6 @@ enum omap_dss_output_id dss_feat_get_supported_outputs(enum omap_channel channel
int dss_feat_get_num_mgrs(void);
int dss_feat_get_num_ovls(void);
enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane);
const u32 *dss_feat_get_supported_color_modes(enum omap_plane_id plane);
#endif

8
drivers/gpu/drm/omapdrm/dss/hdmi4.c
View File

@ -696,11 +696,9 @@ static int hdmi4_bind(struct device *dev, struct device *master, void *data)
mutex_init(&hdmi.lock);
spin_lock_init(&hdmi.audio_playing_lock);
if (pdev->dev.of_node) {
r = hdmi_probe_of(pdev);
if (r)
return r;
}
r = hdmi_probe_of(pdev);
if (r)
return r;
r = hdmi_wp_init(pdev, &hdmi.wp);
if (r)

9
drivers/gpu/drm/omapdrm/dss/hdmi4_core.c
View File

@ -889,16 +889,9 @@ int hdmi4_core_init(struct platform_device *pdev, struct hdmi_core_data *core)
struct resource *res;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core");
if (!res) {
DSSERR("can't get CORE mem resource\n");
return -EINVAL;
}
core->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(core->base)) {
DSSERR("can't ioremap CORE\n");
if (IS_ERR(core->base))
return PTR_ERR(core->base);
}
return 0;
}

8
drivers/gpu/drm/omapdrm/dss/hdmi5.c
View File

@ -728,11 +728,9 @@ static int hdmi5_bind(struct device *dev, struct device *master, void *data)
mutex_init(&hdmi.lock);
spin_lock_init(&hdmi.audio_playing_lock);
if (pdev->dev.of_node) {
r = hdmi_probe_of(pdev);
if (r)
return r;
}
r = hdmi_probe_of(pdev);
if (r)
return r;
r = hdmi_wp_init(pdev, &hdmi.wp);
if (r)

9
drivers/gpu/drm/omapdrm/dss/hdmi5_core.c
View File

@ -910,16 +910,9 @@ int hdmi5_core_init(struct platform_device *pdev, struct hdmi_core_data *core)
struct resource *res;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "core");
if (!res) {
DSSERR("can't get CORE IORESOURCE_MEM HDMI\n");
return -EINVAL;
}
core->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(core->base)) {
DSSERR("can't ioremap HDMI core\n");
if (IS_ERR(core->base))
return PTR_ERR(core->base);
}
return 0;
}

9
drivers/gpu/drm/omapdrm/dss/hdmi_phy.c
View File

@ -233,16 +233,9 @@ int hdmi_phy_init(struct platform_device *pdev, struct hdmi_phy_data *phy)
return r;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "phy");
if (!res) {
DSSERR("can't get PHY mem resource\n");
return -EINVAL;
}
phy->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(phy->base)) {
DSSERR("can't ioremap TX PHY\n");
if (IS_ERR(phy->base))
return PTR_ERR(phy->base);
}
return 0;
}

9
drivers/gpu/drm/omapdrm/dss/hdmi_pll.c
View File

@ -180,16 +180,9 @@ int hdmi_pll_init(struct platform_device *pdev, struct hdmi_pll_data *pll,
pll->wp = wp;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pll");
if (!res) {
DSSERR("can't get PLL mem resource\n");
return -EINVAL;
}
pll->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(pll->base)) {
DSSERR("can't ioremap PLLCTRL\n");
if (IS_ERR(pll->base))
return PTR_ERR(pll->base);
}
r = dsi_init_pll_data(pdev, pll);
if (r) {

12
drivers/gpu/drm/omapdrm/dss/hdmi_wp.c
View File

@ -287,17 +287,11 @@ int hdmi_wp_init(struct platform_device *pdev, struct hdmi_wp_data *wp)
struct resource *res;
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "wp");
if (!res) {
DSSERR("can't get WP mem resource\n");
return -EINVAL;
}
wp->phys_base = res->start;
wp->base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(wp->base)) {
DSSERR("can't ioremap HDMI WP\n");
if (IS_ERR(wp->base))
return PTR_ERR(wp->base);
}
wp->phys_base = res->start;
return 0;
}

226
drivers/gpu/drm/omapdrm/dss/omapdss.h
View File

@ -59,7 +59,6 @@
#define DISPC_IRQ_FRAMEDONE3 (1 << 30)
struct omap_dss_device;
struct omap_overlay_manager;
struct dss_lcd_mgr_config;
struct snd_aes_iec958;
struct snd_cea_861_aud_if;
@ -93,25 +92,7 @@ enum omap_channel {
};
enum omap_color_mode {
OMAP_DSS_COLOR_CLUT1 = 1 << 0, /* BITMAP 1 */
OMAP_DSS_COLOR_CLUT2 = 1 << 1, /* BITMAP 2 */
OMAP_DSS_COLOR_CLUT4 = 1 << 2, /* BITMAP 4 */
OMAP_DSS_COLOR_CLUT8 = 1 << 3, /* BITMAP 8 */
OMAP_DSS_COLOR_RGB12U = 1 << 4, /* RGB12, 16-bit container */
OMAP_DSS_COLOR_ARGB16 = 1 << 5, /* ARGB16 */
OMAP_DSS_COLOR_RGB16 = 1 << 6, /* RGB16 */
OMAP_DSS_COLOR_RGB24U = 1 << 7, /* RGB24, 32-bit container */
OMAP_DSS_COLOR_RGB24P = 1 << 8, /* RGB24, 24-bit container */
OMAP_DSS_COLOR_YUV2 = 1 << 9, /* YUV2 4:2:2 co-sited */
OMAP_DSS_COLOR_UYVY = 1 << 10, /* UYVY 4:2:2 co-sited */
OMAP_DSS_COLOR_ARGB32 = 1 << 11, /* ARGB32 */
OMAP_DSS_COLOR_RGBA32 = 1 << 12, /* RGBA32 */
OMAP_DSS_COLOR_RGBX32 = 1 << 13, /* RGBx32 */
OMAP_DSS_COLOR_NV12 = 1 << 14, /* NV12 format: YUV 4:2:0 */
OMAP_DSS_COLOR_RGBA16 = 1 << 15, /* RGBA16 - 4444 */
OMAP_DSS_COLOR_RGBX16 = 1 << 16, /* RGBx16 - 4444 */
OMAP_DSS_COLOR_ARGB16_1555 = 1 << 17, /* ARGB16 - 1555 */
OMAP_DSS_COLOR_XRGB16_1555 = 1 << 18, /* xRGB16 - 1555 */
_UNUSED_,
};
enum omap_dss_load_mode {
@ -126,11 +107,6 @@ enum omap_dss_trans_key_type {
OMAP_DSS_COLOR_KEY_VID_SRC = 1,
};
enum omap_rfbi_te_mode {
OMAP_DSS_RFBI_TE_MODE_1 = 1,
OMAP_DSS_RFBI_TE_MODE_2 = 2,
};
enum omap_dss_signal_level {
OMAPDSS_SIG_ACTIVE_LOW,
OMAPDSS_SIG_ACTIVE_HIGH,
@ -169,17 +145,8 @@ enum omap_dss_display_state {
};
enum omap_dss_rotation_type {
OMAP_DSS_ROT_DMA = 1 << 0,
OMAP_DSS_ROT_VRFB = 1 << 1,
OMAP_DSS_ROT_TILER = 1 << 2,
};
/* clockwise rotation angle */
enum omap_dss_rotation_angle {
OMAP_DSS_ROT_0 = 0,
OMAP_DSS_ROT_90 = 1,
OMAP_DSS_ROT_180 = 2,
OMAP_DSS_ROT_270 = 3,
OMAP_DSS_ROT_NONE = 0,
OMAP_DSS_ROT_TILER = 1 << 0,
};
enum omap_overlay_caps {
@ -191,10 +158,6 @@ enum omap_overlay_caps {
OMAP_DSS_OVL_CAP_REPLICATION = 1 << 5,
};
enum omap_overlay_manager_caps {
OMAP_DSS_DUMMY_VALUE, /* add a dummy value to prevent compiler error */
};
enum omap_dss_clk_source {
OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK
* OMAP4: DSS_FCLK */
@ -220,27 +183,6 @@ enum omap_dss_output_id {
OMAP_DSS_OUTPUT_HDMI = 1 << 6,
};
/* RFBI */
struct rfbi_timings {
int cs_on_time;
int cs_off_time;
int we_on_time;
int we_off_time;
int re_on_time;
int re_off_time;
int we_cycle_time;
int re_cycle_time;
int cs_pulse_width;
int access_time;
int clk_div;
u32 tim[5]; /* set by rfbi_convert_timings() */
int converted;
};
/* DSI */
enum omap_dss_dsi_trans_mode {
@ -318,10 +260,9 @@ struct omap_overlay_info {
u16 screen_width;
u16 width;
u16 height;
enum omap_color_mode color_mode;
u32 fourcc;
u8 rotation;
enum omap_dss_rotation_type rotation_type;
bool mirror;
u16 pos_x;
u16 pos_y;
@ -332,48 +273,6 @@ struct omap_overlay_info {
u8 zorder;
};
struct omap_overlay {
struct kobject kobj;
struct list_head list;
/* static fields */
const char *name;
enum omap_plane_id id;
enum omap_color_mode supported_modes;
enum omap_overlay_caps caps;
/* dynamic fields */
struct omap_overlay_manager *manager;
/*
* The following functions do not block:
*
* is_enabled
* set_overlay_info
* get_overlay_info
*
* The rest of the functions may block and cannot be called from
* interrupt context
*/
int (*enable)(struct omap_overlay *ovl);
int (*disable)(struct omap_overlay *ovl);
bool (*is_enabled)(struct omap_overlay *ovl);
int (*set_manager)(struct omap_overlay *ovl,
struct omap_overlay_manager *mgr);
int (*unset_manager)(struct omap_overlay *ovl);
int (*set_overlay_info)(struct omap_overlay *ovl,
struct omap_overlay_info *info);
void (*get_overlay_info)(struct omap_overlay *ovl,
struct omap_overlay_info *info);
int (*wait_for_go)(struct omap_overlay *ovl);
struct omap_dss_device *(*get_device)(struct omap_overlay *ovl);
};
struct omap_overlay_manager_info {
u32 default_color;
@ -387,47 +286,6 @@ struct omap_overlay_manager_info {
struct omap_dss_cpr_coefs cpr_coefs;
};
struct omap_overlay_manager {
struct kobject kobj;
/* static fields */
const char *name;
enum omap_channel id;
enum omap_overlay_manager_caps caps;
struct list_head overlays;
enum omap_display_type supported_displays;
enum omap_dss_output_id supported_outputs;
/* dynamic fields */
struct omap_dss_device *output;
/*
* The following functions do not block:
*
* set_manager_info
* get_manager_info
* apply
*
* The rest of the functions may block and cannot be called from
* interrupt context
*/
int (*set_output)(struct omap_overlay_manager *mgr,
struct omap_dss_device *output);
int (*unset_output)(struct omap_overlay_manager *mgr);
int (*set_manager_info)(struct omap_overlay_manager *mgr,
struct omap_overlay_manager_info *info);
void (*get_manager_info)(struct omap_overlay_manager *mgr,
struct omap_overlay_manager_info *info);
int (*apply)(struct omap_overlay_manager *mgr);
int (*wait_for_go)(struct omap_overlay_manager *mgr);
int (*wait_for_vsync)(struct omap_overlay_manager *mgr);
struct omap_dss_device *(*get_device)(struct omap_overlay_manager *mgr);
};
/* 22 pins means 1 clk lane and 10 data lanes */
#define OMAP_DSS_MAX_DSI_PINS 22
@ -449,10 +307,9 @@ struct omap_dss_writeback_info {
u16 buf_width;
u16 width;
u16 height;
enum omap_color_mode color_mode;
u32 fourcc;
u8 rotation;
enum omap_dss_rotation_type rotation_type;
bool mirror;
u8 pre_mult_alpha;
};
@ -471,8 +328,6 @@ struct omapdss_dpi_ops {
struct videomode *vm);
void (*get_timings)(struct omap_dss_device *dssdev,
struct videomode *vm);
void (*set_data_lines)(struct omap_dss_device *dssdev, int data_lines);
};
struct omapdss_sdi_ops {
@ -490,8 +345,6 @@ struct omapdss_sdi_ops {
struct videomode *vm);
void (*get_timings)(struct omap_dss_device *dssdev,
struct videomode *vm);
void (*set_datapairs)(struct omap_dss_device *dssdev, int datapairs);
};
struct omapdss_dvi_ops {
@ -527,11 +380,6 @@ struct omapdss_atv_ops {
void (*get_timings)(struct omap_dss_device *dssdev,
struct videomode *vm);
void (*set_type)(struct omap_dss_device *dssdev,
enum omap_dss_venc_type type);
void (*invert_vid_out_polarity)(struct omap_dss_device *dssdev,
bool invert_polarity);
int (*set_wss)(struct omap_dss_device *dssdev, u32 wss);
u32 (*get_wss)(struct omap_dss_device *dssdev);
};
@ -631,30 +479,6 @@ struct omap_dss_device {
enum omap_display_type type;
enum omap_display_type output_type;
union {
struct {
u8 data_lines;
} dpi;
struct {
u8 channel;
u8 data_lines;
} rfbi;
struct {
u8 datapairs;
} sdi;
struct {
int module;
} dsi;
struct {
enum omap_dss_venc_type type;
bool invert_polarity;
} venc;
} phy;
struct {
struct videomode vm;
@ -662,18 +486,8 @@ struct omap_dss_device {
enum omap_dss_dsi_mode dsi_mode;
} panel;
struct {
u8 pixel_size;
struct rfbi_timings rfbi_timings;
} ctrl;
const char *name;
/* used to match device to driver */
const char *driver_name;
void *data;
struct omap_dss_driver *driver;
union {
@ -709,8 +523,6 @@ struct omap_dss_device {
int port_num;
/* dynamic fields */
struct omap_overlay_manager *manager;
struct omap_dss_device *dst;
};
@ -742,12 +554,6 @@ struct omap_dss_driver {
void *buf, size_t size,
u16 x, u16 y, u16 w, u16 h);
void (*get_resolution)(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres);
void (*get_dimensions)(struct omap_dss_device *dssdev,
u32 *width, u32 *height);
int (*get_recommended_bpp)(struct omap_dss_device *dssdev);
int (*check_timings)(struct omap_dss_device *dssdev,
struct videomode *vm);
void (*set_timings)(struct omap_dss_device *dssdev,
@ -781,35 +587,22 @@ void omap_dss_put_device(struct omap_dss_device *dssdev);
struct omap_dss_device *omap_dss_get_next_device(struct omap_dss_device *from);
struct omap_dss_device *omap_dss_find_device(void *data,
int (*match)(struct omap_dss_device *dssdev, void *data));
const char *omapdss_get_default_display_name(void);
int dss_feat_get_num_mgrs(void);
int dss_feat_get_num_ovls(void);
enum omap_color_mode dss_feat_get_supported_color_modes(enum omap_plane_id plane);
int omap_dss_get_num_overlay_managers(void);
struct omap_overlay_manager *omap_dss_get_overlay_manager(int num);
int omap_dss_get_num_overlays(void);
struct omap_overlay *omap_dss_get_overlay(int num);
int omapdss_register_output(struct omap_dss_device *output);
void omapdss_unregister_output(struct omap_dss_device *output);
struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id);
struct omap_dss_device *omap_dss_find_output(const char *name);
struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port);
int omapdss_output_set_device(struct omap_dss_device *out,
struct omap_dss_device *dssdev);
int omapdss_output_unset_device(struct omap_dss_device *out);
struct omap_dss_device *omapdss_find_output_from_display(struct omap_dss_device *dssdev);
struct omap_overlay_manager *omapdss_find_mgr_from_display(struct omap_dss_device *dssdev);
void omapdss_default_get_resolution(struct omap_dss_device *dssdev,
u16 *xres, u16 *yres);
int omapdss_default_get_recommended_bpp(struct omap_dss_device *dssdev);
void omapdss_default_get_timings(struct omap_dss_device *dssdev,
struct videomode *vm);
@ -881,7 +674,6 @@ void dss_mgr_unregister_framedone_handler(enum omap_channel channel,
struct dispc_ops {
u32 (*read_irqstatus)(void);
void (*clear_irqstatus)(u32 mask);
u32 (*read_irqenable)(void);
void (*write_irqenable)(u32 mask);
int (*request_irq)(irq_handler_t handler, void *dev_id);
@ -913,14 +705,12 @@ struct dispc_ops {
unsigned int length);
int (*ovl_enable)(enum omap_plane_id plane, bool enable);
bool (*ovl_enabled)(enum omap_plane_id plane);
void (*ovl_set_channel_out)(enum omap_plane_id plane,
enum omap_channel channel);
int (*ovl_setup)(enum omap_plane_id plane,
const struct omap_overlay_info *oi,
const struct videomode *vm, bool mem_to_mem);
const struct videomode *vm, bool mem_to_mem,
enum omap_channel channel);
enum omap_color_mode (*ovl_get_color_modes)(enum omap_plane_id plane);
const u32 *(*ovl_get_color_modes)(enum omap_plane_id plane);
};
void dispc_set_ops(const struct dispc_ops *o);

13
drivers/gpu/drm/omapdrm/dss/output.c
View File

@ -133,19 +133,6 @@ struct omap_dss_device *omap_dss_get_output(enum omap_dss_output_id id)
}
EXPORT_SYMBOL(omap_dss_get_output);
struct omap_dss_device *omap_dss_find_output(const char *name)
{
struct omap_dss_device *out;
list_for_each_entry(out, &output_list, list) {
if (strcmp(out->name, name) == 0)
return omap_dss_get_device(out);
}
return NULL;
}
EXPORT_SYMBOL(omap_dss_find_output);
struct omap_dss_device *omap_dss_find_output_by_port_node(struct device_node *port)
{
struct device_node *src_node;

1083
drivers/gpu/drm/omapdrm/dss/rfbi.c
View File

File diff suppressed because it is too large Load Diff

61
drivers/gpu/drm/omapdrm/dss/sdi.c
View File

@ -27,7 +27,6 @@
#include <linux/platform_device.h>
#include <linux/string.h>
#include <linux/of.h>
#include <linux/component.h>
#include "omapdss.h"
#include "dss.h"
@ -253,11 +252,6 @@ static int sdi_check_timings(struct omap_dss_device *dssdev,
return 0;
}
static void sdi_set_datapairs(struct omap_dss_device *dssdev, int datapairs)
{
sdi.datapairs = datapairs;
}
static int sdi_init_regulator(void)
{
struct regulator *vdds_sdi;
@ -327,8 +321,6 @@ static const struct omapdss_sdi_ops sdi_ops = {
.check_timings = sdi_check_timings,
.set_timings = sdi_set_timings,
.get_timings = sdi_get_timings,
.set_datapairs = sdi_set_datapairs,
};
static void sdi_init_output(struct platform_device *pdev)
@ -355,59 +347,6 @@ static void sdi_uninit_output(struct platform_device *pdev)
omapdss_unregister_output(out);
}
static int sdi_bind(struct device *dev, struct device *master, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
sdi.pdev = pdev;
sdi_init_output(pdev);
return 0;
}
static void sdi_unbind(struct device *dev, struct device *master, void *data)
{
struct platform_device *pdev = to_platform_device(dev);
sdi_uninit_output(pdev);
}
static const struct component_ops sdi_component_ops = {
.bind = sdi_bind,
.unbind = sdi_unbind,
};
static int sdi_probe(struct platform_device *pdev)
{
return component_add(&pdev->dev, &sdi_component_ops);
}
static int sdi_remove(struct platform_device *pdev)
{
component_del(&pdev->dev, &sdi_component_ops);
return 0;
}
static struct platform_driver omap_sdi_driver = {
.probe = sdi_probe,
.remove = sdi_remove,
.driver = {
.name = "omapdss_sdi",
.suppress_bind_attrs = true,
},
};
int __init sdi_init_platform_driver(void)
{
return platform_driver_register(&omap_sdi_driver);
}
void sdi_uninit_platform_driver(void)
{
platform_driver_unregister(&omap_sdi_driver);
}
int sdi_init_port(struct platform_device *pdev, struct device_node *port)
{
struct device_node *ep;

53
drivers/gpu/drm/omapdrm/dss/venc.c
View File

@ -616,26 +616,6 @@ static int venc_set_wss(struct omap_dss_device *dssdev, u32 wss)
return r;
}
static void venc_set_type(struct omap_dss_device *dssdev,
enum omap_dss_venc_type type)
{
mutex_lock(&venc.venc_lock);
venc.type = type;
mutex_unlock(&venc.venc_lock);
}
static void venc_invert_vid_out_polarity(struct omap_dss_device *dssdev,
bool invert_polarity)
{
mutex_lock(&venc.venc_lock);
venc.invert_polarity = invert_polarity;
mutex_unlock(&venc.venc_lock);
}
static int venc_init_regulator(void)
{
struct regulator *vdda_dac;
@ -643,11 +623,7 @@ static int venc_init_regulator(void)
if (venc.vdda_dac_reg != NULL)
return 0;
if (venc.pdev->dev.of_node)
vdda_dac = devm_regulator_get(&venc.pdev->dev, "vdda");
else
vdda_dac = devm_regulator_get(&venc.pdev->dev, "vdda_dac");
vdda_dac = devm_regulator_get(&venc.pdev->dev, "vdda");
if (IS_ERR(vdda_dac)) {
if (PTR_ERR(vdda_dac) != -EPROBE_DEFER)
DSSERR("can't get VDDA_DAC regulator\n");
@ -783,9 +759,6 @@ static const struct omapdss_atv_ops venc_ops = {
.set_timings = venc_set_timings,
.get_timings = venc_get_timings,
.set_type = venc_set_type,
.invert_vid_out_polarity = venc_invert_vid_out_polarity,
.set_wss = venc_set_wss,
.get_wss = venc_get_wss,
};
@ -869,17 +842,9 @@ static int venc_bind(struct device *dev, struct device *master, void *data)
venc.wss_data = 0;
venc_mem = platform_get_resource(venc.pdev, IORESOURCE_MEM, 0);
if (!venc_mem) {
DSSERR("can't get IORESOURCE_MEM VENC\n");
return -EINVAL;
}
venc.base = devm_ioremap(&pdev->dev, venc_mem->start,
resource_size(venc_mem));
if (!venc.base) {
DSSERR("can't ioremap VENC\n");
return -ENOMEM;
}
venc.base = devm_ioremap_resource(&pdev->dev, venc_mem);
if (IS_ERR(venc.base))
return PTR_ERR(venc.base);
r = venc_get_clocks(pdev);
if (r)
@ -896,12 +861,10 @@ static int venc_bind(struct device *dev, struct device *master, void *data)
venc_runtime_put();
if (pdev->dev.of_node) {
r = venc_probe_of(pdev);
if (r) {
DSSERR("Invalid DT data\n");
goto err_probe_of;
}
r = venc_probe_of(pdev);
if (r) {
DSSERR("Invalid DT data\n");
goto err_probe_of;
}
dss_debugfs_create_file("venc", venc_dump_regs);

20
drivers/gpu/drm/omapdrm/dss/video-pll.c
View File

@ -150,33 +150,17 @@ struct dss_pll *dss_video_pll_init(struct platform_device *pdev, int id,
/* PLL CONTROL */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM, reg_name[id]);
if (!res) {
dev_err(&pdev->dev,
"missing platform resource data for pll%d\n", id);
return ERR_PTR(-ENODEV);
}
pll_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(pll_base)) {
dev_err(&pdev->dev, "failed to ioremap pll%d reg_name\n", id);
if (IS_ERR(pll_base))
return ERR_CAST(pll_base);
}
/* CLOCK CONTROL */
res = platform_get_resource_byname(pdev, IORESOURCE_MEM,
clkctrl_name[id]);
if (!res) {
dev_err(&pdev->dev,
"missing platform resource data for pll%d\n", id);
return ERR_PTR(-ENODEV);
}
clkctrl_base = devm_ioremap_resource(&pdev->dev, res);
if (IS_ERR(clkctrl_base)) {
dev_err(&pdev->dev, "failed to ioremap pll%d clkctrl\n", id);
if (IS_ERR(clkctrl_base))
return ERR_CAST(clkctrl_base);
}
/* CLKIN */

30
drivers/gpu/drm/omapdrm/omap_crtc.c
View File

@ -343,6 +343,19 @@ static void omap_crtc_destroy(struct drm_crtc *crtc)
kfree(omap_crtc);
}
static void omap_crtc_arm_event(struct drm_crtc *crtc)
{
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
WARN_ON(omap_crtc->pending);
omap_crtc->pending = true;
if (crtc->state->event) {
omap_crtc->event = crtc->state->event;
crtc->state->event = NULL;
}
}
static void omap_crtc_enable(struct drm_crtc *crtc)
{
struct omap_crtc *omap_crtc = to_omap_crtc(crtc);
@ -355,8 +368,7 @@ static void omap_crtc_enable(struct drm_crtc *crtc)
ret = drm_crtc_vblank_get(crtc);
WARN_ON(ret != 0);
WARN_ON(omap_crtc->pending);
omap_crtc->pending = true;
omap_crtc_arm_event(crtc);
spin_unlock_irq(&crtc->dev->event_lock);
}
@ -366,6 +378,13 @@ static void omap_crtc_disable(struct drm_crtc *crtc)
DBG("%s", omap_crtc->name);
spin_lock_irq(&crtc->dev->event_lock);
if (crtc->state->event) {
drm_crtc_send_vblank_event(crtc, crtc->state->event);
crtc->state->event = NULL;
}
spin_unlock_irq(&crtc->dev->event_lock);
drm_crtc_vblank_off(crtc);
}
@ -473,12 +492,7 @@ static void omap_crtc_atomic_flush(struct drm_crtc *crtc,
spin_lock_irq(&crtc->dev->event_lock);
priv->dispc_ops->mgr_go(omap_crtc->channel);
WARN_ON(omap_crtc->pending);
omap_crtc->pending = true;
if (crtc->state->event)
omap_crtc->event = crtc->state->event;
omap_crtc_arm_event(crtc);
spin_unlock_irq(&crtc->dev->event_lock);
}

2
drivers/gpu/drm/omapdrm/omap_dmm_tiler.c
View File

@ -388,7 +388,7 @@ struct tiler_block *tiler_reserve_2d(enum tiler_fmt fmt, uint16_t w,
u32 min_align = 128;
int ret;
unsigned long flags;
size_t slot_bytes;
u32 slot_bytes;
BUG_ON(!validfmt(fmt));

191
drivers/gpu/drm/omapdrm/omap_drv.c
View File

@ -17,7 +17,7 @@
* this program. If not, see <http://www.gnu.org/licenses/>.
*/
#include <linux/wait.h>
#include <linux/sys_soc.h>
#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
@ -54,13 +54,6 @@ static void omap_fb_output_poll_changed(struct drm_device *dev)
drm_fb_helper_hotplug_event(priv->fbdev);
}
struct omap_atomic_state_commit {
struct work_struct work;
struct drm_device *dev;
struct drm_atomic_state *state;
u32 crtcs;
};
static void omap_atomic_wait_for_completion(struct drm_device *dev,
struct drm_atomic_state *old_state)
{
@ -81,15 +74,14 @@ static void omap_atomic_wait_for_completion(struct drm_device *dev,
}
}
static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
static void omap_atomic_commit_tail(struct drm_atomic_state *old_state)
{
struct drm_device *dev = commit->dev;
struct drm_device *dev = old_state->dev;
struct omap_drm_private *priv = dev->dev_private;
struct drm_atomic_state *old_state = commit->state;
/* Apply the atomic update. */
priv->dispc_ops->runtime_get();
/* Apply the atomic update. */
drm_atomic_helper_commit_modeset_disables(dev, old_state);
/* With the current dss dispc implementation we have to enable
@ -108,101 +100,28 @@ static void omap_atomic_complete(struct omap_atomic_state_commit *commit)
drm_atomic_helper_commit_planes(dev, old_state, 0);
drm_atomic_helper_commit_hw_done(old_state);
/*
* Wait for completion of the page flips to ensure that old buffers
* can't be touched by the hardware anymore before cleaning up planes.
*/
omap_atomic_wait_for_completion(dev, old_state);
drm_atomic_helper_cleanup_planes(dev, old_state);
priv->dispc_ops->runtime_put();
drm_atomic_state_put(old_state);
/* Complete the commit, wake up any waiter. */
spin_lock(&priv->commit.lock);
priv->commit.pending &= ~commit->crtcs;
spin_unlock(&priv->commit.lock);
wake_up_all(&priv->commit.wait);
kfree(commit);
}
static void omap_atomic_work(struct work_struct *work)
{
struct omap_atomic_state_commit *commit =
container_of(work, struct omap_atomic_state_commit, work);
omap_atomic_complete(commit);
}
static bool omap_atomic_is_pending(struct omap_drm_private *priv,
struct omap_atomic_state_commit *commit)
{
bool pending;
spin_lock(&priv->commit.lock);
pending = priv->commit.pending & commit->crtcs;
spin_unlock(&priv->commit.lock);
return pending;
}
static int omap_atomic_commit(struct drm_device *dev,
struct drm_atomic_state *state, bool nonblock)
{
struct omap_drm_private *priv = dev->dev_private;
struct omap_atomic_state_commit *commit;
struct drm_crtc *crtc;
struct drm_crtc_state *crtc_state;
int i, ret;
ret = drm_atomic_helper_prepare_planes(dev, state);
if (ret)
return ret;
/* Allocate the commit object. */
commit = kzalloc(sizeof(*commit), GFP_KERNEL);
if (commit == NULL) {
ret = -ENOMEM;
goto error;
}
INIT_WORK(&commit->work, omap_atomic_work);
commit->dev = dev;
commit->state = state;
/* Wait until all affected CRTCs have completed previous commits and
* mark them as pending.
*/
for_each_crtc_in_state(state, crtc, crtc_state, i)
commit->crtcs |= drm_crtc_mask(crtc);
wait_event(priv->commit.wait, !omap_atomic_is_pending(priv, commit));
spin_lock(&priv->commit.lock);
priv->commit.pending |= commit->crtcs;
spin_unlock(&priv->commit.lock);
/* Swap the state, this is the point of no return. */
drm_atomic_helper_swap_state(state, true);
drm_atomic_state_get(state);
if (nonblock)
schedule_work(&commit->work);
else
omap_atomic_complete(commit);
return 0;
error:
drm_atomic_helper_cleanup_planes(dev, state);
return ret;
}
static const struct drm_mode_config_helper_funcs omap_mode_config_helper_funcs = {
.atomic_commit_tail = omap_atomic_commit_tail,
};
static const struct drm_mode_config_funcs omap_mode_config_funcs = {
.fb_create = omap_framebuffer_create,
.output_poll_changed = omap_fb_output_poll_changed,
.atomic_check = drm_atomic_helper_check,
.atomic_commit = omap_atomic_commit,
.atomic_commit = drm_atomic_helper_commit,
};
static int get_connector_type(struct omap_dss_device *dssdev)
@ -214,6 +133,14 @@ static int get_connector_type(struct omap_dss_device *dssdev)
return DRM_MODE_CONNECTOR_DVID;
case OMAP_DISPLAY_TYPE_DSI:
return DRM_MODE_CONNECTOR_DSI;
case OMAP_DISPLAY_TYPE_DPI:
case OMAP_DISPLAY_TYPE_DBI:
return DRM_MODE_CONNECTOR_DPI;
case OMAP_DISPLAY_TYPE_VENC:
/* TODO: This could also be composite */
return DRM_MODE_CONNECTOR_SVIDEO;
case OMAP_DISPLAY_TYPE_SDI:
return DRM_MODE_CONNECTOR_LVDS;
default:
return DRM_MODE_CONNECTOR_Unknown;
}
@ -261,8 +188,10 @@ static int omap_connect_dssdevs(void)
static int omap_modeset_init_properties(struct drm_device *dev)
{
struct omap_drm_private *priv = dev->dev_private;
unsigned int num_planes = priv->dispc_ops->get_num_ovls();
priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0, 3);
priv->zorder_prop = drm_property_create_range(dev, 0, "zorder", 0,
num_planes - 1);
if (!priv->zorder_prop)
return -ENOMEM;
@ -385,6 +314,7 @@ static int omap_modeset_init(struct drm_device *dev)
dev->mode_config.max_height = 2048;
dev->mode_config.funcs = &omap_mode_config_funcs;
dev->mode_config.helper_private = &omap_mode_config_helper_funcs;
drm_mode_config_reset(dev);
@ -447,53 +377,6 @@ static int ioctl_gem_new(struct drm_device *dev, void *data,
&args->handle);
}
static int ioctl_gem_cpu_prep(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
struct drm_omap_gem_cpu_prep *args = data;
struct drm_gem_object *obj;
int ret;
VERB("%p:%p: handle=%d, op=%x", dev, file_priv, args->handle, args->op);
obj = drm_gem_object_lookup(file_priv, args->handle);
if (!obj)
return -ENOENT;
ret = omap_gem_op_sync(obj, args->op);
if (!ret)
ret = omap_gem_op_start(obj, args->op);
drm_gem_object_unreference_unlocked(obj);
return ret;
}
static int ioctl_gem_cpu_fini(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
struct drm_omap_gem_cpu_fini *args = data;
struct drm_gem_object *obj;
int ret;
VERB("%p:%p: handle=%d", dev, file_priv, args->handle);
obj = drm_gem_object_lookup(file_priv, args->handle);
if (!obj)
return -ENOENT;
/* XXX flushy, flushy */
ret = 0;
if (!ret)
ret = omap_gem_op_finish(obj, args->op);
drm_gem_object_unreference_unlocked(obj);
return ret;
}
static int ioctl_gem_info(struct drm_device *dev, void *data,
struct drm_file *file_priv)
{
@ -522,9 +405,11 @@ static const struct drm_ioctl_desc ioctls[DRM_COMMAND_END - DRM_COMMAND_BASE] =
DRM_AUTH | DRM_MASTER | DRM_ROOT_ONLY),
DRM_IOCTL_DEF_DRV(OMAP_GEM_NEW, ioctl_gem_new,
DRM_AUTH | DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, ioctl_gem_cpu_prep,
/* Deprecated, to be removed. */
DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_PREP, drm_noop,
DRM_AUTH | DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, ioctl_gem_cpu_fini,
/* Deprecated, to be removed. */
DRM_IOCTL_DEF_DRV(OMAP_GEM_CPU_FINI, drm_noop,
DRM_AUTH | DRM_RENDER_ALLOW),
DRM_IOCTL_DEF_DRV(OMAP_GEM_INFO, ioctl_gem_info,
DRM_AUTH | DRM_RENDER_ALLOW),
@ -608,6 +493,7 @@ static const struct file_operations omapdriver_fops = {
.owner = THIS_MODULE,
.open = drm_open,
.unlocked_ioctl = drm_ioctl,
.compat_ioctl = drm_compat_ioctl,
.release = drm_release,
.mmap = omap_gem_mmap,
.poll = drm_poll,
@ -643,9 +529,17 @@ static struct drm_driver omap_drm_driver = {
.patchlevel = DRIVER_PATCHLEVEL,
};
static const struct soc_device_attribute omapdrm_soc_devices[] = {
{ .family = "OMAP3", .data = (void *)0x3430 },
{ .family = "OMAP4", .data = (void *)0x4430 },
{ .family = "OMAP5", .data = (void *)0x5430 },
{ .family = "DRA7", .data = (void *)0x0752 },
{ /* sentinel */ }
};
static int pdev_probe(struct platform_device *pdev)
{
struct omap_drm_platform_data *pdata = pdev->dev.platform_data;
const struct soc_device_attribute *soc;
struct omap_drm_private *priv;
struct drm_device *ddev;
unsigned int i;
@ -671,11 +565,10 @@ static int pdev_probe(struct platform_device *pdev)
priv->dispc_ops = dispc_get_ops();
priv->omaprev = pdata->omaprev;
soc = soc_device_match(omapdrm_soc_devices);
priv->omaprev = soc ? (unsigned int)soc->data : 0;
priv->wq = alloc_ordered_workqueue("omapdrm", 0);
init_waitqueue_head(&priv->commit.wait);
spin_lock_init(&priv->commit.lock);
spin_lock_init(&priv->list_lock);
INIT_LIST_HEAD(&priv->obj_list);

41
drivers/gpu/drm/omapdrm/omap_drv.h
View File

@ -21,9 +21,8 @@
#define __OMAP_DRV_H__
#include <linux/module.h>
#include <linux/platform_data/omap_drm.h>
#include <linux/types.h>
#include <linux/wait.h>
#include <linux/workqueue.h>
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
@ -39,15 +38,6 @@
struct omap_drm_usergart;
/* parameters which describe (unrotated) coordinates of scanout within a fb: */
struct omap_drm_window {
uint32_t rotation;
int32_t crtc_x, crtc_y; /* signed because can be offscreen */
uint32_t crtc_w, crtc_h;
uint32_t src_x, src_y;
uint32_t src_w, src_h;
};
/* For KMS code that needs to wait for a certain # of IRQs:
*/
struct omap_irq_wait;
@ -93,13 +83,6 @@ struct omap_drm_private {
spinlock_t wait_lock; /* protects the wait_list */
struct list_head wait_list; /* list of omap_irq_wait */
uint32_t irq_mask; /* enabled irqs in addition to wait_list */
/* atomic commit */
struct {
wait_queue_head_t wait;
u32 pending;
spinlock_t lock; /* Protects commit.pending */
} commit;
};
@ -158,8 +141,6 @@ struct drm_encoder *omap_connector_attached_encoder(
struct drm_connector *connector);
bool omap_connector_get_hdmi_mode(struct drm_connector *connector);
uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats,
uint32_t max_formats, enum omap_color_mode supported_modes);
struct drm_framebuffer *omap_framebuffer_create(struct drm_device *dev,
struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
@ -167,7 +148,7 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
int omap_framebuffer_pin(struct drm_framebuffer *fb);
void omap_framebuffer_unpin(struct drm_framebuffer *fb);
void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
struct omap_drm_window *win, struct omap_overlay_info *info);
struct drm_plane_state *state, struct omap_overlay_info *info);
struct drm_connector *omap_framebuffer_get_next_connector(
struct drm_framebuffer *fb, struct drm_connector *from);
bool omap_framebuffer_supports_rotation(struct drm_framebuffer *fb);
@ -191,24 +172,18 @@ int omap_gem_mmap(struct file *filp, struct vm_area_struct *vma);
int omap_gem_mmap_obj(struct drm_gem_object *obj,
struct vm_area_struct *vma);
int omap_gem_fault(struct vm_fault *vmf);
int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op);
int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op);
int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op);
int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
void (*fxn)(void *arg), void *arg);
int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll);
void omap_gem_cpu_sync(struct drm_gem_object *obj, int pgoff);
void omap_gem_dma_sync(struct drm_gem_object *obj,
void omap_gem_cpu_sync_page(struct drm_gem_object *obj, int pgoff);
void omap_gem_dma_sync_buffer(struct drm_gem_object *obj,
enum dma_data_direction dir);
int omap_gem_get_paddr(struct drm_gem_object *obj,
dma_addr_t *paddr, bool remap);
void omap_gem_put_paddr(struct drm_gem_object *obj);
int omap_gem_pin(struct drm_gem_object *obj, dma_addr_t *dma_addr);
void omap_gem_unpin(struct drm_gem_object *obj);
int omap_gem_get_pages(struct drm_gem_object *obj, struct page ***pages,
bool remap);
int omap_gem_put_pages(struct drm_gem_object *obj);
uint32_t omap_gem_flags(struct drm_gem_object *obj);
int omap_gem_rotated_paddr(struct drm_gem_object *obj, uint32_t orient,
int x, int y, dma_addr_t *paddr);
int omap_gem_rotated_dma_addr(struct drm_gem_object *obj, uint32_t orient,
int x, int y, dma_addr_t *dma_addr);
uint64_t omap_gem_mmap_offset(struct drm_gem_object *obj);
size_t omap_gem_mmap_size(struct drm_gem_object *obj);
int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient);

199
drivers/gpu/drm/omapdrm/omap_fb.c
View File

@ -29,52 +29,34 @@
* framebuffer funcs
*/
/* DSS to DRM formats mapping */
static const struct {
enum omap_color_mode dss_format;
uint32_t pixel_format;
} formats[] = {
static const u32 formats[] = {
/* 16bpp [A]RGB: */
{ OMAP_DSS_COLOR_RGB16, DRM_FORMAT_RGB565 }, /* RGB16-565 */
{ OMAP_DSS_COLOR_RGB12U, DRM_FORMAT_RGBX4444 }, /* RGB12x-4444 */
{ OMAP_DSS_COLOR_RGBX16, DRM_FORMAT_XRGB4444 }, /* xRGB12-4444 */
{ OMAP_DSS_COLOR_RGBA16, DRM_FORMAT_RGBA4444 }, /* RGBA12-4444 */
{ OMAP_DSS_COLOR_ARGB16, DRM_FORMAT_ARGB4444 }, /* ARGB16-4444 */
{ OMAP_DSS_COLOR_XRGB16_1555, DRM_FORMAT_XRGB1555 }, /* xRGB15-1555 */
{ OMAP_DSS_COLOR_ARGB16_1555, DRM_FORMAT_ARGB1555 }, /* ARGB16-1555 */
DRM_FORMAT_RGB565, /* RGB16-565 */
DRM_FORMAT_RGBX4444, /* RGB12x-4444 */
DRM_FORMAT_XRGB4444, /* xRGB12-4444 */
DRM_FORMAT_RGBA4444, /* RGBA12-4444 */
DRM_FORMAT_ARGB4444, /* ARGB16-4444 */
DRM_FORMAT_XRGB1555, /* xRGB15-1555 */
DRM_FORMAT_ARGB1555, /* ARGB16-1555 */
/* 24bpp RGB: */
{ OMAP_DSS_COLOR_RGB24P, DRM_FORMAT_RGB888 }, /* RGB24-888 */
DRM_FORMAT_RGB888, /* RGB24-888 */
/* 32bpp [A]RGB: */
{ OMAP_DSS_COLOR_RGBX32, DRM_FORMAT_RGBX8888 }, /* RGBx24-8888 */
{ OMAP_DSS_COLOR_RGB24U, DRM_FORMAT_XRGB8888 }, /* xRGB24-8888 */
{ OMAP_DSS_COLOR_RGBA32, DRM_FORMAT_RGBA8888 }, /* RGBA32-8888 */
{ OMAP_DSS_COLOR_ARGB32, DRM_FORMAT_ARGB8888 }, /* ARGB32-8888 */
DRM_FORMAT_RGBX8888, /* RGBx24-8888 */
DRM_FORMAT_XRGB8888, /* xRGB24-8888 */
DRM_FORMAT_RGBA8888, /* RGBA32-8888 */
DRM_FORMAT_ARGB8888, /* ARGB32-8888 */
/* YUV: */
{ OMAP_DSS_COLOR_NV12, DRM_FORMAT_NV12 },
{ OMAP_DSS_COLOR_YUV2, DRM_FORMAT_YUYV },
{ OMAP_DSS_COLOR_UYVY, DRM_FORMAT_UYVY },
DRM_FORMAT_NV12,
DRM_FORMAT_YUYV,
DRM_FORMAT_UYVY,
};
/* convert from overlay's pixel formats bitmask to an array of fourcc's */
uint32_t omap_framebuffer_get_formats(uint32_t *pixel_formats,
uint32_t max_formats, enum omap_color_mode supported_modes)
{
uint32_t nformats = 0;
int i = 0;
for (i = 0; i < ARRAY_SIZE(formats) && nformats < max_formats; i++)
if (formats[i].dss_format & supported_modes)
pixel_formats[nformats++] = formats[i].pixel_format;
return nformats;
}
/* per-plane info for the fb: */
struct plane {
struct drm_gem_object *bo;
uint32_t pitch;
uint32_t offset;
dma_addr_t paddr;
dma_addr_t dma_addr;
};
#define to_omap_framebuffer(x) container_of(x, struct omap_framebuffer, base)
@ -83,9 +65,8 @@ struct omap_framebuffer {
struct drm_framebuffer base;
int pin_count;
const struct drm_format_info *format;
enum omap_color_mode dss_format;
struct plane planes[2];
/* lock for pinning (pin_count and planes.paddr) */
/* lock for pinning (pin_count and planes.dma_addr) */
struct mutex lock;
};
@ -130,7 +111,7 @@ static uint32_t get_linear_addr(struct plane *plane,
+ (x * format->cpp[n] / (n == 0 ? 1 : format->hsub))
+ (y * plane->pitch / (n == 0 ? 1 : format->vsub));
return plane->paddr + offset;
return plane->dma_addr + offset;
}
bool omap_framebuffer_supports_rotation(struct drm_framebuffer *fb)
@ -141,71 +122,95 @@ bool omap_framebuffer_supports_rotation(struct drm_framebuffer *fb)
return omap_gem_flags(plane->bo) & OMAP_BO_TILED;
}
/* Note: DRM rotates counter-clockwise, TILER & DSS rotates clockwise */
static uint32_t drm_rotation_to_tiler(unsigned int drm_rot)
{
uint32_t orient;
switch (drm_rot & DRM_MODE_ROTATE_MASK) {
default:
case DRM_MODE_ROTATE_0:
orient = 0;
break;
case DRM_MODE_ROTATE_90:
orient = MASK_XY_FLIP | MASK_X_INVERT;
break;
case DRM_MODE_ROTATE_180:
orient = MASK_X_INVERT | MASK_Y_INVERT;
break;
case DRM_MODE_ROTATE_270:
orient = MASK_XY_FLIP | MASK_Y_INVERT;
break;
}
if (drm_rot & DRM_MODE_REFLECT_X)
orient ^= MASK_X_INVERT;
if (drm_rot & DRM_MODE_REFLECT_Y)
orient ^= MASK_Y_INVERT;
return orient;
}
/* update ovl info for scanout, handles cases of multi-planar fb's, etc.
*/
void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
struct omap_drm_window *win, struct omap_overlay_info *info)
struct drm_plane_state *state, struct omap_overlay_info *info)
{
struct omap_framebuffer *omap_fb = to_omap_framebuffer(fb);
const struct drm_format_info *format = omap_fb->format;
struct plane *plane = &omap_fb->planes[0];
uint32_t x, y, orient = 0;
info->color_mode = omap_fb->dss_format;
info->fourcc = fb->format->format;
info->pos_x = win->crtc_x;
info->pos_y = win->crtc_y;
info->out_width = win->crtc_w;
info->out_height = win->crtc_h;
info->width = win->src_w;
info->height = win->src_h;
info->pos_x = state->crtc_x;
info->pos_y = state->crtc_y;
info->out_width = state->crtc_w;
info->out_height = state->crtc_h;
info->width = state->src_w >> 16;
info->height = state->src_h >> 16;
x = win->src_x;
y = win->src_y;
/* DSS driver wants the w & h in rotated orientation */
if (drm_rotation_90_or_270(state->rotation))
swap(info->width, info->height);
x = state->src_x >> 16;
y = state->src_y >> 16;
if (omap_gem_flags(plane->bo) & OMAP_BO_TILED) {
uint32_t w = win->src_w;
uint32_t h = win->src_h;
uint32_t w = state->src_w >> 16;
uint32_t h = state->src_h >> 16;
switch (win->rotation & DRM_MODE_ROTATE_MASK) {
default:
dev_err(fb->dev->dev, "invalid rotation: %02x",
(uint32_t)win->rotation);
/* fallthru to default to no rotation */
case 0:
case DRM_MODE_ROTATE_0:
orient = 0;
break;
case DRM_MODE_ROTATE_90:
orient = MASK_XY_FLIP | MASK_X_INVERT;
break;
case DRM_MODE_ROTATE_180:
orient = MASK_X_INVERT | MASK_Y_INVERT;
break;
case DRM_MODE_ROTATE_270:
orient = MASK_XY_FLIP | MASK_Y_INVERT;
break;
orient = drm_rotation_to_tiler(state->rotation);
/*
* omap_gem_rotated_paddr() wants the x & y in tiler units.
* Usually tiler unit size is the same as the pixel size, except
* for YUV422 formats, for which the tiler unit size is 32 bits
* and pixel size is 16 bits.
*/
if (fb->format->format == DRM_FORMAT_UYVY ||
fb->format->format == DRM_FORMAT_YUYV) {
x /= 2;
w /= 2;
}
if (win->rotation & DRM_MODE_REFLECT_X)
orient ^= MASK_X_INVERT;
if (win->rotation & DRM_MODE_REFLECT_Y)
orient ^= MASK_Y_INVERT;
/* adjust x,y offset for flip/invert: */
if (orient & MASK_XY_FLIP)
swap(w, h);
/* adjust x,y offset for invert: */
if (orient & MASK_Y_INVERT)
y += h - 1;
if (orient & MASK_X_INVERT)
x += w - 1;
omap_gem_rotated_paddr(plane->bo, orient, x, y, &info->paddr);
/* Note: x and y are in TILER units, not pixels */
omap_gem_rotated_dma_addr(plane->bo, orient, x, y,
&info->paddr);
info->rotation_type = OMAP_DSS_ROT_TILER;
info->rotation = state->rotation ?: DRM_MODE_ROTATE_0;
/* Note: stride in TILER units, not pixels */
info->screen_width = omap_gem_tiled_stride(plane->bo, orient);
} else {
switch (win->rotation & DRM_MODE_ROTATE_MASK) {
switch (state->rotation & DRM_MODE_ROTATE_MASK) {
case 0:
case DRM_MODE_ROTATE_0:
/* OK */
@ -214,26 +219,26 @@ void omap_framebuffer_update_scanout(struct drm_framebuffer *fb,
default:
dev_warn(fb->dev->dev,
"rotation '%d' ignored for non-tiled fb\n",
win->rotation);
win->rotation = 0;
state->rotation);
break;
}
info->paddr = get_linear_addr(plane, format, 0, x, y);
info->rotation_type = OMAP_DSS_ROT_DMA;
info->rotation_type = OMAP_DSS_ROT_NONE;
info->rotation = DRM_MODE_ROTATE_0;
info->screen_width = plane->pitch;
}
/* convert to pixels: */
info->screen_width /= format->cpp[0];
if (omap_fb->dss_format == OMAP_DSS_COLOR_NV12) {
if (fb->format->format == DRM_FORMAT_NV12) {
plane = &omap_fb->planes[1];
if (info->rotation_type == OMAP_DSS_ROT_TILER) {
WARN_ON(!(omap_gem_flags(plane->bo) & OMAP_BO_TILED));
omap_gem_rotated_paddr(plane->bo, orient,
x/2, y/2, &info->p_uv_addr);
omap_gem_rotated_dma_addr(plane->bo, orient, x/2, y/2,
&info->p_uv_addr);
} else {
info->p_uv_addr = get_linear_addr(plane, format, 1, x, y);
}
@ -258,10 +263,10 @@ int omap_framebuffer_pin(struct drm_framebuffer *fb)
for (i = 0; i < n; i++) {
struct plane *plane = &omap_fb->planes[i];
ret = omap_gem_get_paddr(plane->bo, &plane->paddr, true);
ret = omap_gem_pin(plane->bo, &plane->dma_addr);
if (ret)
goto fail;
omap_gem_dma_sync(plane->bo, DMA_TO_DEVICE);
omap_gem_dma_sync_buffer(plane->bo, DMA_TO_DEVICE);
}
omap_fb->pin_count++;
@ -273,8 +278,8 @@ int omap_framebuffer_pin(struct drm_framebuffer *fb)
fail:
for (i--; i >= 0; i--) {
struct plane *plane = &omap_fb->planes[i];
omap_gem_put_paddr(plane->bo);
plane->paddr = 0;
omap_gem_unpin(plane->bo);
plane->dma_addr = 0;
}
mutex_unlock(&omap_fb->lock);
@ -299,8 +304,8 @@ void omap_framebuffer_unpin(struct drm_framebuffer *fb)
for (i = 0; i < n; i++) {
struct plane *plane = &omap_fb->planes[i];
omap_gem_put_paddr(plane->bo);
plane->paddr = 0;
omap_gem_unpin(plane->bo);
plane->dma_addr = 0;
}
mutex_unlock(&omap_fb->lock);
@ -386,7 +391,6 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
const struct drm_format_info *format = NULL;
struct omap_framebuffer *omap_fb = NULL;
struct drm_framebuffer *fb = NULL;
enum omap_color_mode dss_format = 0;
unsigned int pitch = mode_cmd->pitches[0];
int ret, i;
@ -397,13 +401,11 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
format = drm_format_info(mode_cmd->pixel_format);
for (i = 0; i < ARRAY_SIZE(formats); i++) {
if (formats[i].pixel_format == mode_cmd->pixel_format) {
dss_format = formats[i].dss_format;
if (formats[i] == mode_cmd->pixel_format)
break;
}
}
if (!format || !dss_format) {
if (!format || i == ARRAY_SIZE(formats)) {
dev_dbg(dev->dev, "unsupported pixel format: %4.4s\n",
(char *)&mode_cmd->pixel_format);
ret = -EINVAL;
@ -418,7 +420,6 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
fb = &omap_fb->base;
omap_fb->format = format;
omap_fb->dss_format = dss_format;
mutex_init(&omap_fb->lock);
/*
@ -449,7 +450,7 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
if (size > omap_gem_mmap_size(bos[i]) - mode_cmd->offsets[i]) {
dev_dbg(dev->dev,
"provided buffer object is too small! %d < %d\n",
"provided buffer object is too small! %zu < %d\n",
bos[i]->size - mode_cmd->offsets[i], size);
ret = -EINVAL;
goto fail;
@ -458,7 +459,7 @@ struct drm_framebuffer *omap_framebuffer_init(struct drm_device *dev,
plane->bo = bos[i];
plane->offset = mode_cmd->offsets[i];
plane->pitch = pitch;
plane->paddr = 0;
plane->dma_addr = 0;
}
drm_helper_mode_fill_fb_struct(dev, fb, mode_cmd);

15
drivers/gpu/drm/omapdrm/omap_fbdev.c
View File

@ -106,7 +106,7 @@ static int omap_fbdev_create(struct drm_fb_helper *helper,
union omap_gem_size gsize;
struct fb_info *fbi = NULL;
struct drm_mode_fb_cmd2 mode_cmd = {0};
dma_addr_t paddr;
dma_addr_t dma_addr;
int ret;
sizes->surface_bpp = 32;
@ -162,10 +162,9 @@ static int omap_fbdev_create(struct drm_fb_helper *helper,
* to it). Then we just need to be sure that we are able to re-
* pin it in case of an opps.
*/
ret = omap_gem_get_paddr(fbdev->bo, &paddr, true);
ret = omap_gem_pin(fbdev->bo, &dma_addr);
if (ret) {
dev_err(dev->dev,
"could not map (paddr)! Skipping framebuffer alloc\n");
dev_err(dev->dev, "could not pin framebuffer\n");
ret = -ENOMEM;
goto fail;
}
@ -193,11 +192,11 @@ static int omap_fbdev_create(struct drm_fb_helper *helper,
drm_fb_helper_fill_fix(fbi, fb->pitches[0], fb->format->depth);
drm_fb_helper_fill_var(fbi, helper, sizes->fb_width, sizes->fb_height);
dev->mode_config.fb_base = paddr;
dev->mode_config.fb_base = dma_addr;
fbi->screen_base = omap_gem_vaddr(fbdev->bo);
fbi->screen_size = fbdev->bo->size;
fbi->fix.smem_start = paddr;
fbi->fix.smem_start = dma_addr;
fbi->fix.smem_len = fbdev->bo->size;
/* if we have DMM, then we can use it for scrolling by just
@ -303,8 +302,8 @@ void omap_fbdev_free(struct drm_device *dev)
fbdev = to_omap_fbdev(priv->fbdev);
/* release the ref taken in omap_fbdev_create() */
omap_gem_put_paddr(fbdev->bo);
/* unpin the GEM object pinned in omap_fbdev_create() */
omap_gem_unpin(fbdev->bo);
/* this will free the backing object */
if (fbdev->fb)

429
drivers/gpu/drm/omapdrm/omap_gem.c
View File

@ -50,7 +50,7 @@ struct omap_gem_object {
uint32_t roll;
/**
* paddr contains the buffer DMA address. It is valid for
* dma_addr contains the buffer DMA address. It is valid for
*
* - buffers allocated through the DMA mapping API (with the
* OMAP_BO_MEM_DMA_API flag set)
@ -58,24 +58,24 @@ struct omap_gem_object {
* - buffers imported from dmabuf (with the OMAP_BO_MEM_DMABUF flag set)
* if they are physically contiguous (when sgt->orig_nents == 1)
*
* - buffers mapped through the TILER when paddr_cnt is not zero, in
* - buffers mapped through the TILER when dma_addr_cnt is not zero, in
* which case the DMA address points to the TILER aperture
*
* Physically contiguous buffers have their DMA address equal to the
* physical address as we don't remap those buffers through the TILER.
*
* Buffers mapped to the TILER have their DMA address pointing to the
* TILER aperture. As TILER mappings are refcounted (through paddr_cnt)
* the DMA address must be accessed through omap_get_get_paddr() to
* ensure that the mapping won't disappear unexpectedly. References must
* be released with omap_gem_put_paddr().
* TILER aperture. As TILER mappings are refcounted (through
* dma_addr_cnt) the DMA address must be accessed through omap_gem_pin()
* to ensure that the mapping won't disappear unexpectedly. References
* must be released with omap_gem_unpin().
*/
dma_addr_t paddr;
dma_addr_t dma_addr;
/**
* # of users of paddr
* # of users of dma_addr
*/
uint32_t paddr_cnt;
uint32_t dma_addr_cnt;
/**
* If the buffer has been imported from a dmabuf the OMAP_DB_DMABUF flag
@ -95,25 +95,12 @@ struct omap_gem_object {
struct page **pages;
/** addresses corresponding to pages in above array */
dma_addr_t *addrs;
dma_addr_t *dma_addrs;
/**
* Virtual address, if mapped.
*/
void *vaddr;
/**
* sync-object allocated on demand (if needed)
*
* Per-buffer sync-object for tracking pending and completed hw/dma
* read and write operations.
*/
struct {
uint32_t write_pending;
uint32_t write_complete;
uint32_t read_pending;
uint32_t read_complete;
} *sync;
};
#define to_omap_bo(x) container_of(x, struct omap_gem_object, base)
@ -132,7 +119,7 @@ struct omap_gem_object {
#define NUM_USERGART_ENTRIES 2
struct omap_drm_usergart_entry {
struct tiler_block *block; /* the reserved tiler block */
dma_addr_t paddr;
dma_addr_t dma_addr;
struct drm_gem_object *obj; /* the current pinned obj */
pgoff_t obj_pgoff; /* page offset of obj currently
mapped in */
@ -195,7 +182,7 @@ static void evict_entry(struct drm_gem_object *obj,
size_t size = PAGE_SIZE * n;
loff_t off = mmap_offset(obj) +
(entry->obj_pgoff << PAGE_SHIFT);
const int m = 1 + ((omap_obj->width << fmt) / PAGE_SIZE);
const int m = DIV_ROUND_UP(omap_obj->width << fmt, PAGE_SIZE);
if (m > 1) {
int i;
@ -267,7 +254,7 @@ static int omap_gem_attach_pages(struct drm_gem_object *obj)
for (i = 0; i < npages; i++) {
addrs[i] = dma_map_page(dev->dev, pages[i],
0, PAGE_SIZE, DMA_BIDIRECTIONAL);
0, PAGE_SIZE, DMA_TO_DEVICE);
if (dma_mapping_error(dev->dev, addrs[i])) {
dev_warn(dev->dev,
@ -275,7 +262,7 @@ static int omap_gem_attach_pages(struct drm_gem_object *obj)
for (i = i - 1; i >= 0; --i) {
dma_unmap_page(dev->dev, addrs[i],
PAGE_SIZE, DMA_BIDIRECTIONAL);
PAGE_SIZE, DMA_TO_DEVICE);
}
ret = -ENOMEM;
@ -290,7 +277,7 @@ static int omap_gem_attach_pages(struct drm_gem_object *obj)
}
}
omap_obj->addrs = addrs;
omap_obj->dma_addrs = addrs;
omap_obj->pages = pages;
return 0;
@ -329,22 +316,17 @@ static int get_pages(struct drm_gem_object *obj, struct page ***pages)
static void omap_gem_detach_pages(struct drm_gem_object *obj)
{
struct omap_gem_object *omap_obj = to_omap_bo(obj);
unsigned int npages = obj->size >> PAGE_SHIFT;
unsigned int i;
/* for non-cached buffers, ensure the new pages are clean because
* DSS, GPU, etc. are not cache coherent:
*/
if (omap_obj->flags & (OMAP_BO_WC|OMAP_BO_UNCACHED)) {
int i, npages = obj->size >> PAGE_SHIFT;
for (i = 0; i < npages; i++) {
if (omap_obj->addrs[i])
dma_unmap_page(obj->dev->dev,
omap_obj->addrs[i],
PAGE_SIZE, DMA_BIDIRECTIONAL);
}
for (i = 0; i < npages; i++) {
if (omap_obj->dma_addrs[i])
dma_unmap_page(obj->dev->dev, omap_obj->dma_addrs[i],
PAGE_SIZE, DMA_TO_DEVICE);
}
kfree(omap_obj->addrs);
omap_obj->addrs = NULL;
kfree(omap_obj->dma_addrs);
omap_obj->dma_addrs = NULL;
drm_gem_put_pages(obj, omap_obj->pages, true, false);
omap_obj->pages = NULL;
@ -401,11 +383,11 @@ static int fault_1d(struct drm_gem_object *obj,
pgoff = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
if (omap_obj->pages) {
omap_gem_cpu_sync(obj, pgoff);
omap_gem_cpu_sync_page(obj, pgoff);
pfn = page_to_pfn(omap_obj->pages[pgoff]);
} else {
BUG_ON(!is_contiguous(omap_obj));
pfn = (omap_obj->paddr >> PAGE_SHIFT) + pgoff;
pfn = (omap_obj->dma_addr >> PAGE_SHIFT) + pgoff;
}
VERB("Inserting %p pfn %lx, pa %lx", (void *)vmf->address,
@ -442,7 +424,7 @@ static int fault_2d(struct drm_gem_object *obj,
* into account in some of the math, so figure out virtual stride
* in pages
*/
const int m = 1 + ((omap_obj->width << fmt) / PAGE_SIZE);
const int m = DIV_ROUND_UP(omap_obj->width << fmt, PAGE_SIZE);
/* We don't use vmf->pgoff since that has the fake offset: */
pgoff = (vmf->address - vma->vm_start) >> PAGE_SHIFT;
@ -498,7 +480,7 @@ static int fault_2d(struct drm_gem_object *obj,
return ret;
}
pfn = entry->paddr >> PAGE_SHIFT;
pfn = entry->dma_addr >> PAGE_SHIFT;
VERB("Inserting %p pfn %lx, pa %lx", (void *)vmf->address,
pfn, pfn << PAGE_SHIFT);
@ -732,77 +714,92 @@ int omap_gem_roll(struct drm_gem_object *obj, uint32_t roll)
* Memory Management & DMA Sync
*/
/**
* shmem buffers that are mapped cached can simulate coherency via using
* page faulting to keep track of dirty pages
/*
* shmem buffers that are mapped cached are not coherent.
*
* We keep track of dirty pages using page faulting to perform cache management.
* When a page is mapped to the CPU in read/write mode the device can't access
* it and omap_obj->dma_addrs[i] is NULL. When a page is mapped to the device
* the omap_obj->dma_addrs[i] is set to the DMA address, and the page is
* unmapped from the CPU.
*/
static inline bool is_cached_coherent(struct drm_gem_object *obj)
{
struct omap_gem_object *omap_obj = to_omap_bo(obj);
return (omap_obj->flags & OMAP_BO_MEM_SHMEM) &&
((omap_obj->flags & OMAP_BO_CACHE_MASK) == OMAP_BO_CACHED);
return !((omap_obj->flags & OMAP_BO_MEM_SHMEM) &&
((omap_obj->flags & OMAP_BO_CACHE_MASK) == OMAP_BO_CACHED));
}
/* Sync the buffer for CPU access.. note pages should already be
* attached, ie. omap_gem_get_pages()
*/
void omap_gem_cpu_sync(struct drm_gem_object *obj, int pgoff)
void omap_gem_cpu_sync_page(struct drm_gem_object *obj, int pgoff)
{
struct drm_device *dev = obj->dev;
struct omap_gem_object *omap_obj = to_omap_bo(obj);
if (is_cached_coherent(obj) && omap_obj->addrs[pgoff]) {
dma_unmap_page(dev->dev, omap_obj->addrs[pgoff],
PAGE_SIZE, DMA_BIDIRECTIONAL);
omap_obj->addrs[pgoff] = 0;
if (is_cached_coherent(obj))
return;
if (omap_obj->dma_addrs[pgoff]) {
dma_unmap_page(dev->dev, omap_obj->dma_addrs[pgoff],
PAGE_SIZE, DMA_TO_DEVICE);
omap_obj->dma_addrs[pgoff] = 0;
}
}
/* sync the buffer for DMA access */
void omap_gem_dma_sync(struct drm_gem_object *obj,
void omap_gem_dma_sync_buffer(struct drm_gem_object *obj,
enum dma_data_direction dir)
{
struct drm_device *dev = obj->dev;
struct omap_gem_object *omap_obj = to_omap_bo(obj);
int i, npages = obj->size >> PAGE_SHIFT;
struct page **pages = omap_obj->pages;
bool dirty = false;
if (is_cached_coherent(obj)) {
int i, npages = obj->size >> PAGE_SHIFT;
struct page **pages = omap_obj->pages;
bool dirty = false;
if (is_cached_coherent(obj))
return;
for (i = 0; i < npages; i++) {
if (!omap_obj->addrs[i]) {
dma_addr_t addr;
for (i = 0; i < npages; i++) {
if (!omap_obj->dma_addrs[i]) {
dma_addr_t addr;
addr = dma_map_page(dev->dev, pages[i], 0,
PAGE_SIZE, DMA_BIDIRECTIONAL);
if (dma_mapping_error(dev->dev, addr)) {
dev_warn(dev->dev,
"%s: failed to map page\n",
__func__);
break;
}
dirty = true;
omap_obj->addrs[i] = addr;
addr = dma_map_page(dev->dev, pages[i], 0,
PAGE_SIZE, dir);
if (dma_mapping_error(dev->dev, addr)) {
dev_warn(dev->dev, "%s: failed to map page\n",
__func__);
break;
}
}
if (dirty) {
unmap_mapping_range(obj->filp->f_mapping, 0,
omap_gem_mmap_size(obj), 1);
dirty = true;
omap_obj->dma_addrs[i] = addr;
}
}
if (dirty) {
unmap_mapping_range(obj->filp->f_mapping, 0,
omap_gem_mmap_size(obj), 1);
}
}
/* Get physical address for DMA.. if 'remap' is true, and the buffer is not
* already contiguous, remap it to pin in physically contiguous memory.. (ie.
* map in TILER)
/**
* omap_gem_pin() - Pin a GEM object in memory
* @obj: the GEM object
* @dma_addr: the DMA address
*
* Pin the given GEM object in memory and fill the dma_addr pointer with the
* object's DMA address. If the buffer is not physically contiguous it will be
* remapped through the TILER to provide a contiguous view.
*
* Pins are reference-counted, calling this function multiple times is allowed
* as long the corresponding omap_gem_unpin() calls are balanced.
*
* Return 0 on success or a negative error code otherwise.
*/
int omap_gem_get_paddr(struct drm_gem_object *obj,
dma_addr_t *paddr, bool remap)
int omap_gem_pin(struct drm_gem_object *obj, dma_addr_t *dma_addr)
{
struct omap_drm_private *priv = obj->dev->dev_private;
struct omap_gem_object *omap_obj = to_omap_bo(obj);
@ -810,8 +807,8 @@ int omap_gem_get_paddr(struct drm_gem_object *obj,
mutex_lock(&obj->dev->struct_mutex);
if (!is_contiguous(omap_obj) && remap && priv->has_dmm) {
if (omap_obj->paddr_cnt == 0) {
if (!is_contiguous(omap_obj) && priv->has_dmm) {
if (omap_obj->dma_addr_cnt == 0) {
struct page **pages;
uint32_t npages = obj->size >> PAGE_SHIFT;
enum tiler_fmt fmt = gem2fmt(omap_obj->flags);
@ -848,17 +845,17 @@ int omap_gem_get_paddr(struct drm_gem_object *obj,
goto fail;
}
omap_obj->paddr = tiler_ssptr(block);
omap_obj->dma_addr = tiler_ssptr(block);
omap_obj->block = block;
DBG("got paddr: %pad", &omap_obj->paddr);
DBG("got dma address: %pad", &omap_obj->dma_addr);
}
omap_obj->paddr_cnt++;
omap_obj->dma_addr_cnt++;
*paddr = omap_obj->paddr;
*dma_addr = omap_obj->dma_addr;
} else if (is_contiguous(omap_obj)) {
*paddr = omap_obj->paddr;
*dma_addr = omap_obj->dma_addr;
} else {
ret = -EINVAL;
goto fail;
@ -870,18 +867,23 @@ int omap_gem_get_paddr(struct drm_gem_object *obj,
return ret;
}
/* Release physical address, when DMA is no longer being performed.. this
* could potentially unpin and unmap buffers from TILER
/**
* omap_gem_unpin() - Unpin a GEM object from memory
* @obj: the GEM object
*
* Unpin the given GEM object previously pinned with omap_gem_pin(). Pins are
* reference-counted, the actualy unpin will only be performed when the number
* of calls to this function matches the number of calls to omap_gem_pin().
*/
void omap_gem_put_paddr(struct drm_gem_object *obj)
void omap_gem_unpin(struct drm_gem_object *obj)
{
struct omap_gem_object *omap_obj = to_omap_bo(obj);
int ret;
mutex_lock(&obj->dev->struct_mutex);
if (omap_obj->paddr_cnt > 0) {
omap_obj->paddr_cnt--;
if (omap_obj->paddr_cnt == 0) {
if (omap_obj->dma_addr_cnt > 0) {
omap_obj->dma_addr_cnt--;
if (omap_obj->dma_addr_cnt == 0) {
ret = tiler_unpin(omap_obj->block);
if (ret) {
dev_err(obj->dev->dev,
@ -892,7 +894,7 @@ void omap_gem_put_paddr(struct drm_gem_object *obj)
dev_err(obj->dev->dev,
"could not release unmap: %d\n", ret);
}
omap_obj->paddr = 0;
omap_obj->dma_addr = 0;
omap_obj->block = NULL;
}
}
@ -904,16 +906,16 @@ void omap_gem_put_paddr(struct drm_gem_object *obj)
* specified orientation and x,y offset from top-left corner of buffer
* (only valid for tiled 2d buffers)
*/
int omap_gem_rotated_paddr(struct drm_gem_object *obj, uint32_t orient,
int x, int y, dma_addr_t *paddr)
int omap_gem_rotated_dma_addr(struct drm_gem_object *obj, uint32_t orient,
int x, int y, dma_addr_t *dma_addr)
{
struct omap_gem_object *omap_obj = to_omap_bo(obj);
int ret = -EINVAL;
mutex_lock(&obj->dev->struct_mutex);
if ((omap_obj->paddr_cnt > 0) && omap_obj->block &&
if ((omap_obj->dma_addr_cnt > 0) && omap_obj->block &&
(omap_obj->flags & OMAP_BO_TILED)) {
*paddr = tiler_tsptr(omap_obj->block, orient, x, y);
*dma_addr = tiler_tsptr(omap_obj->block, orient, x, y);
ret = 0;
}
mutex_unlock(&obj->dev->struct_mutex);
@ -934,9 +936,9 @@ int omap_gem_tiled_stride(struct drm_gem_object *obj, uint32_t orient)
* increasing the pin count (which we don't really do yet anyways,
* because we don't support swapping pages back out). And 'remap'
* might not be quite the right name, but I wanted to keep it working
* similarly to omap_gem_get_paddr(). Note though that mutex is not
* similarly to omap_gem_pin(). Note though that mutex is not
* aquired if !remap (because this can be called in atomic ctxt),
* but probably omap_gem_get_paddr() should be changed to work in the
* but probably omap_gem_unpin() should be changed to work in the
* same way. If !remap, a matching omap_gem_put_pages() call is not
* required (and should not be made).
*/
@ -1034,7 +1036,7 @@ void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m)
seq_printf(m, "%08x: %2d (%2d) %08llx %pad (%2d) %p %4d",
omap_obj->flags, obj->name, kref_read(&obj->refcount),
off, &omap_obj->paddr, omap_obj->paddr_cnt,
off, &omap_obj->dma_addr, omap_obj->dma_addr_cnt,
omap_obj->vaddr, omap_obj->roll);
if (omap_obj->flags & OMAP_BO_TILED) {
@ -1046,7 +1048,7 @@ void omap_gem_describe(struct drm_gem_object *obj, struct seq_file *m)
area->p1.x, area->p1.y);
}
} else {
seq_printf(m, " %d", obj->size);
seq_printf(m, " %zu", obj->size);
}
seq_printf(m, "\n");
@ -1070,205 +1072,6 @@ void omap_gem_describe_objects(struct list_head *list, struct seq_file *m)
}
#endif
/* -----------------------------------------------------------------------------
* Buffer Synchronization
*/
static DEFINE_SPINLOCK(sync_lock);
struct omap_gem_sync_waiter {
struct list_head list;
struct omap_gem_object *omap_obj;
enum omap_gem_op op;
uint32_t read_target, write_target;
/* notify called w/ sync_lock held */
void (*notify)(void *arg);
void *arg;
};
/* list of omap_gem_sync_waiter.. the notify fxn gets called back when
* the read and/or write target count is achieved which can call a user
* callback (ex. to kick 3d and/or 2d), wakeup blocked task (prep for
* cpu access), etc.
*/
static LIST_HEAD(waiters);
static inline bool is_waiting(struct omap_gem_sync_waiter *waiter)
{
struct omap_gem_object *omap_obj = waiter->omap_obj;
if ((waiter->op & OMAP_GEM_READ) &&
(omap_obj->sync->write_complete < waiter->write_target))
return true;
if ((waiter->op & OMAP_GEM_WRITE) &&
(omap_obj->sync->read_complete < waiter->read_target))
return true;
return false;
}
/* macro for sync debug.. */
#define SYNCDBG 0
#define SYNC(fmt, ...) do { if (SYNCDBG) \
pr_err("%s:%d: " fmt "\n", __func__, __LINE__, ##__VA_ARGS__); \
} while (0)
static void sync_op_update(void)
{
struct omap_gem_sync_waiter *waiter, *n;
list_for_each_entry_safe(waiter, n, &waiters, list) {
if (!is_waiting(waiter)) {
list_del(&waiter->list);
SYNC("notify: %p", waiter);
waiter->notify(waiter->arg);
kfree(waiter);
}
}
}
static inline int sync_op(struct drm_gem_object *obj,
enum omap_gem_op op, bool start)
{
struct omap_gem_object *omap_obj = to_omap_bo(obj);
int ret = 0;
spin_lock(&sync_lock);
if (!omap_obj->sync) {
omap_obj->sync = kzalloc(sizeof(*omap_obj->sync), GFP_ATOMIC);
if (!omap_obj->sync) {
ret = -ENOMEM;
goto unlock;
}
}
if (start) {
if (op & OMAP_GEM_READ)
omap_obj->sync->read_pending++;
if (op & OMAP_GEM_WRITE)
omap_obj->sync->write_pending++;
} else {
if (op & OMAP_GEM_READ)
omap_obj->sync->read_complete++;
if (op & OMAP_GEM_WRITE)
omap_obj->sync->write_complete++;
sync_op_update();
}
unlock:
spin_unlock(&sync_lock);
return ret;
}
/* mark the start of read and/or write operation */
int omap_gem_op_start(struct drm_gem_object *obj, enum omap_gem_op op)
{
return sync_op(obj, op, true);
}
int omap_gem_op_finish(struct drm_gem_object *obj, enum omap_gem_op op)
{
return sync_op(obj, op, false);
}
static DECLARE_WAIT_QUEUE_HEAD(sync_event);
static void sync_notify(void *arg)
{
struct task_struct **waiter_task = arg;
*waiter_task = NULL;
wake_up_all(&sync_event);
}
int omap_gem_op_sync(struct drm_gem_object *obj, enum omap_gem_op op)
{
struct omap_gem_object *omap_obj = to_omap_bo(obj);
int ret = 0;
if (omap_obj->sync) {
struct task_struct *waiter_task = current;
struct omap_gem_sync_waiter *waiter =
kzalloc(sizeof(*waiter), GFP_KERNEL);
if (!waiter)
return -ENOMEM;
waiter->omap_obj = omap_obj;
waiter->op = op;
waiter->read_target = omap_obj->sync->read_pending;
waiter->write_target = omap_obj->sync->write_pending;
waiter->notify = sync_notify;
waiter->arg = &waiter_task;
spin_lock(&sync_lock);
if (is_waiting(waiter)) {
SYNC("waited: %p", waiter);
list_add_tail(&waiter->list, &waiters);
spin_unlock(&sync_lock);
ret = wait_event_interruptible(sync_event,
(waiter_task == NULL));
spin_lock(&sync_lock);
if (waiter_task) {
SYNC("interrupted: %p", waiter);
/* we were interrupted */
list_del(&waiter->list);
waiter_task = NULL;
} else {
/* freed in sync_op_update() */
waiter = NULL;
}
}
spin_unlock(&sync_lock);
kfree(waiter);
}
return ret;
}
/* call fxn(arg), either synchronously or asynchronously if the op
* is currently blocked.. fxn() can be called from any context
*
* (TODO for now fxn is called back from whichever context calls
* omap_gem_op_finish().. but this could be better defined later
* if needed)
*
* TODO more code in common w/ _sync()..
*/
int omap_gem_op_async(struct drm_gem_object *obj, enum omap_gem_op op,
void (*fxn)(void *arg), void *arg)
{
struct omap_gem_object *omap_obj = to_omap_bo(obj);
if (omap_obj->sync) {
struct omap_gem_sync_waiter *waiter =
kzalloc(sizeof(*waiter), GFP_ATOMIC);
if (!waiter)
return -ENOMEM;
waiter->omap_obj = omap_obj;
waiter->op = op;
waiter->read_target = omap_obj->sync->read_pending;
waiter->write_target = omap_obj->sync->write_pending;
waiter->notify = fxn;
waiter->arg = arg;
spin_lock(&sync_lock);
if (is_waiting(waiter)) {
SYNC("waited: %p", waiter);
list_add_tail(&waiter->list, &waiters);
spin_unlock(&sync_lock);
return 0;
}
spin_unlock(&sync_lock);
kfree(waiter);
}
/* no waiting.. */
fxn(arg);
return 0;
}
/* -----------------------------------------------------------------------------
* Constructor & Destructor
*/
@ -1290,7 +1093,7 @@ void omap_gem_free_object(struct drm_gem_object *obj)
/* this means the object is still pinned.. which really should
* not happen. I think..
*/
WARN_ON(omap_obj->paddr_cnt > 0);
WARN_ON(omap_obj->dma_addr_cnt > 0);
if (omap_obj->pages) {
if (omap_obj->flags & OMAP_BO_MEM_DMABUF)
@ -1301,15 +1104,13 @@ void omap_gem_free_object(struct drm_gem_object *obj)
if (omap_obj->flags & OMAP_BO_MEM_DMA_API) {
dma_free_wc(dev->dev, obj->size, omap_obj->vaddr,
omap_obj->paddr);
omap_obj->dma_addr);
} else if (omap_obj->vaddr) {
vunmap(omap_obj->vaddr);
} else if (obj->import_attach) {
drm_prime_gem_destroy(obj, omap_obj->sgt);
}
kfree(omap_obj->sync);
drm_gem_object_release(obj);
kfree(omap_obj);
@ -1400,7 +1201,7 @@ struct drm_gem_object *omap_gem_new(struct drm_device *dev,
/* Allocate memory if needed. */
if (flags & OMAP_BO_MEM_DMA_API) {
omap_obj->vaddr = dma_alloc_wc(dev->dev, size,
&omap_obj->paddr,
&omap_obj->dma_addr,
GFP_KERNEL);
if (!omap_obj->vaddr)
goto err_release;
@ -1444,7 +1245,7 @@ struct drm_gem_object *omap_gem_new_dmabuf(struct drm_device *dev, size_t size,
omap_obj->sgt = sgt;
if (sgt->orig_nents == 1) {
omap_obj->paddr = sg_dma_address(sgt->sgl);
omap_obj->dma_addr = sg_dma_address(sgt->sgl);
} else {
/* Create pages list from sgt */
struct sg_page_iter iter;
@ -1551,11 +1352,11 @@ void omap_gem_init(struct drm_device *dev)
i, j, PTR_ERR(block));
return;
}
entry->paddr = tiler_ssptr(block);
entry->dma_addr = tiler_ssptr(block);
entry->block = block;
DBG("%d:%d: %dx%d: paddr=%pad stride=%d", i, j, w, h,
&entry->paddr,
DBG("%d:%d: %dx%d: dma_addr=%pad stride=%d", i, j, w, h,
&entry->dma_addr,
usergart[i].stride_pfn << PAGE_SHIFT);
}
}

36
drivers/gpu/drm/omapdrm/omap_gem_dmabuf.c
View File

@ -31,7 +31,7 @@ static struct sg_table *omap_gem_map_dma_buf(
{
struct drm_gem_object *obj = attachment->dmabuf->priv;
struct sg_table *sg;
dma_addr_t paddr;
dma_addr_t dma_addr;
int ret;
sg = kzalloc(sizeof(*sg), GFP_KERNEL);
@ -41,7 +41,7 @@ static struct sg_table *omap_gem_map_dma_buf(
/* camera, etc, need physically contiguous.. but we need a
* better way to know this..
*/
ret = omap_gem_get_paddr(obj, &paddr, true);
ret = omap_gem_pin(obj, &dma_addr);
if (ret)
goto out;
@ -51,11 +51,11 @@ static struct sg_table *omap_gem_map_dma_buf(
sg_init_table(sg->sgl, 1);
sg_dma_len(sg->sgl) = obj->size;
sg_set_page(sg->sgl, pfn_to_page(PFN_DOWN(paddr)), obj->size, 0);
sg_dma_address(sg->sgl) = paddr;
sg_set_page(sg->sgl, pfn_to_page(PFN_DOWN(dma_addr)), obj->size, 0);
sg_dma_address(sg->sgl) = dma_addr;
/* this should be after _get_paddr() to ensure we have pages attached */
omap_gem_dma_sync(obj, dir);
/* this must be after omap_gem_pin() to ensure we have pages attached */
omap_gem_dma_sync_buffer(obj, dir);
return sg;
out:
@ -67,21 +67,11 @@ static void omap_gem_unmap_dma_buf(struct dma_buf_attachment *attachment,
struct sg_table *sg, enum dma_data_direction dir)
{
struct drm_gem_object *obj = attachment->dmabuf->priv;
omap_gem_put_paddr(obj);
omap_gem_unpin(obj);
sg_free_table(sg);
kfree(sg);
}
static void omap_gem_dmabuf_release(struct dma_buf *buffer)
{
struct drm_gem_object *obj = buffer->priv;
/* release reference that was taken when dmabuf was exported
* in omap_gem_prime_set()..
*/
drm_gem_object_unreference_unlocked(obj);
}
static int omap_gem_dmabuf_begin_cpu_access(struct dma_buf *buffer,
enum dma_data_direction dir)
{
@ -112,7 +102,7 @@ static void *omap_gem_dmabuf_kmap_atomic(struct dma_buf *buffer,
struct drm_gem_object *obj = buffer->priv;
struct page **pages;
omap_gem_get_pages(obj, &pages, false);
omap_gem_cpu_sync(obj, page_num);
omap_gem_cpu_sync_page(obj, page_num);
return kmap_atomic(pages[page_num]);
}
@ -128,7 +118,7 @@ static void *omap_gem_dmabuf_kmap(struct dma_buf *buffer,
struct drm_gem_object *obj = buffer->priv;
struct page **pages;
omap_gem_get_pages(obj, &pages, false);
omap_gem_cpu_sync(obj, page_num);
omap_gem_cpu_sync_page(obj, page_num);
return kmap(pages[page_num]);
}
@ -157,7 +147,7 @@ static int omap_gem_dmabuf_mmap(struct dma_buf *buffer,
static struct dma_buf_ops omap_dmabuf_ops = {
.map_dma_buf = omap_gem_map_dma_buf,
.unmap_dma_buf = omap_gem_unmap_dma_buf,
.release = omap_gem_dmabuf_release,
.release = drm_gem_dmabuf_release,
.begin_cpu_access = omap_gem_dmabuf_begin_cpu_access,
.end_cpu_access = omap_gem_dmabuf_end_cpu_access,
.map_atomic = omap_gem_dmabuf_kmap_atomic,
@ -177,7 +167,7 @@ struct dma_buf *omap_gem_prime_export(struct drm_device *dev,
exp_info.flags = flags;
exp_info.priv = obj;
return dma_buf_export(&exp_info);
return drm_gem_dmabuf_export(dev, &exp_info);
}
/* -----------------------------------------------------------------------------
@ -210,7 +200,7 @@ struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev,
get_dma_buf(dma_buf);
sgt = dma_buf_map_attachment(attach, DMA_BIDIRECTIONAL);
sgt = dma_buf_map_attachment(attach, DMA_TO_DEVICE);
if (IS_ERR(sgt)) {
ret = PTR_ERR(sgt);
goto fail_detach;
@ -227,7 +217,7 @@ struct drm_gem_object *omap_gem_prime_import(struct drm_device *dev,
return obj;
fail_unmap:
dma_buf_unmap_attachment(attach, sgt, DMA_BIDIRECTIONAL);
dma_buf_unmap_attachment(attach, sgt, DMA_TO_DEVICE);
fail_detach:
dma_buf_detach(dma_buf, attach);
dma_buf_put(dma_buf);

8
drivers/gpu/drm/omapdrm/omap_irq.c
View File

@ -41,7 +41,6 @@ static void omap_irq_update(struct drm_device *dev)
DBG("irqmask=%08x", irqmask);
priv->dispc_ops->write_irqenable(irqmask);
priv->dispc_ops->read_irqenable(); /* flush posted write */
}
static void omap_irq_wait_handler(struct omap_irq_wait *wait)
@ -183,12 +182,13 @@ static void omap_irq_fifo_underflow(struct omap_drm_private *priv,
pr_cont("(0x%08x)\n", irqstatus);
}
static void omap_irq_ocp_error_handler(u32 irqstatus)
static void omap_irq_ocp_error_handler(struct drm_device *dev,
u32 irqstatus)
{
if (!(irqstatus & DISPC_IRQ_OCP_ERR))
return;
DRM_ERROR("OCP error\n");
dev_err_ratelimited(dev->dev, "OCP error\n");
}
static irqreturn_t omap_irq_handler(int irq, void *arg)
@ -219,7 +219,7 @@ static irqreturn_t omap_irq_handler(int irq, void *arg)
omap_crtc_error_irq(crtc, irqstatus);
}
omap_irq_ocp_error_handler(irqstatus);
omap_irq_ocp_error_handler(dev, irqstatus);
omap_irq_fifo_underflow(priv, irqstatus);
spin_lock_irqsave(&priv->wait_lock, flags);

126
drivers/gpu/drm/omapdrm/omap_plane.c
View File

@ -34,23 +34,8 @@ struct omap_plane {
struct drm_plane base;
enum omap_plane_id id;
const char *name;
uint32_t nformats;
uint32_t formats[32];
};
struct omap_plane_state {
struct drm_plane_state base;
unsigned int zorder;
};
static inline struct omap_plane_state *
to_omap_plane_state(struct drm_plane_state *state)
{
return container_of(state, struct omap_plane_state, base);
}
static int omap_plane_prepare_fb(struct drm_plane *plane,
struct drm_plane_state *new_state)
{
@ -73,44 +58,19 @@ static void omap_plane_atomic_update(struct drm_plane *plane,
struct omap_drm_private *priv = plane->dev->dev_private;
struct omap_plane *omap_plane = to_omap_plane(plane);
struct drm_plane_state *state = plane->state;
struct omap_plane_state *omap_state = to_omap_plane_state(state);
struct omap_overlay_info info;
struct omap_drm_window win;
int ret;
DBG("%s, crtc=%p fb=%p", omap_plane->name, state->crtc, state->fb);
memset(&info, 0, sizeof(info));
info.rotation_type = OMAP_DSS_ROT_DMA;
info.rotation = OMAP_DSS_ROT_0;
info.rotation_type = OMAP_DSS_ROT_NONE;
info.rotation = DRM_MODE_ROTATE_0;
info.global_alpha = 0xff;
info.mirror = 0;
info.zorder = omap_state->zorder;
memset(&win, 0, sizeof(win));
win.rotation = state->rotation;
win.crtc_x = state->crtc_x;
win.crtc_y = state->crtc_y;
win.crtc_w = state->crtc_w;
win.crtc_h = state->crtc_h;
/*
* src values are in Q16 fixed point, convert to integer.
* omap_framebuffer_update_scanout() takes adjusted src.
*/
win.src_x = state->src_x >> 16;
win.src_y = state->src_y >> 16;
if (drm_rotation_90_or_270(state->rotation)) {
win.src_w = state->src_h >> 16;
win.src_h = state->src_w >> 16;
} else {
win.src_w = state->src_w >> 16;
win.src_h = state->src_h >> 16;
}
info.zorder = state->zpos;
/* update scanout: */
omap_framebuffer_update_scanout(state->fb, &win, &info);
omap_framebuffer_update_scanout(state->fb, state, &info);
DBG("%dx%d -> %dx%d (%d)", info.width, info.height,
info.out_width, info.out_height,
@ -118,12 +78,10 @@ static void omap_plane_atomic_update(struct drm_plane *plane,
DBG("%d,%d %pad %pad", info.pos_x, info.pos_y,
&info.paddr, &info.p_uv_addr);
priv->dispc_ops->ovl_set_channel_out(omap_plane->id,
omap_crtc_channel(state->crtc));
/* and finally, update omapdss: */
ret = priv->dispc_ops->ovl_setup(omap_plane->id, &info,
omap_crtc_timings(state->crtc), false);
omap_crtc_timings(state->crtc), false,
omap_crtc_channel(state->crtc));
if (ret) {
dev_err(plane->dev->dev, "Failed to setup plane %s\n",
omap_plane->name);
@ -138,11 +96,10 @@ static void omap_plane_atomic_disable(struct drm_plane *plane,
struct drm_plane_state *old_state)
{
struct omap_drm_private *priv = plane->dev->dev_private;
struct omap_plane_state *omap_state = to_omap_plane_state(plane->state);
struct omap_plane *omap_plane = to_omap_plane(plane);
plane->state->rotation = DRM_MODE_ROTATE_0;
omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY
plane->state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY
? 0 : omap_plane->id;
priv->dispc_ops->ovl_enable(omap_plane->id, false);
@ -227,56 +184,20 @@ void omap_plane_install_properties(struct drm_plane *plane,
drm_object_attach_property(obj, priv->zorder_prop, 0);
}
static struct drm_plane_state *
omap_plane_atomic_duplicate_state(struct drm_plane *plane)
{
struct omap_plane_state *state;
struct omap_plane_state *copy;
if (WARN_ON(!plane->state))
return NULL;
state = to_omap_plane_state(plane->state);
copy = kmemdup(state, sizeof(*state), GFP_KERNEL);
if (copy == NULL)
return NULL;
__drm_atomic_helper_plane_duplicate_state(plane, &copy->base);
return &copy->base;
}
static void omap_plane_atomic_destroy_state(struct drm_plane *plane,
struct drm_plane_state *state)
{
__drm_atomic_helper_plane_destroy_state(state);
kfree(to_omap_plane_state(state));
}
static void omap_plane_reset(struct drm_plane *plane)
{
struct omap_plane *omap_plane = to_omap_plane(plane);
struct omap_plane_state *omap_state;
if (plane->state) {
omap_plane_atomic_destroy_state(plane, plane->state);
plane->state = NULL;
}
omap_state = kzalloc(sizeof(*omap_state), GFP_KERNEL);
if (omap_state == NULL)
drm_atomic_helper_plane_reset(plane);
if (!plane->state)
return;
/*
* Set defaults depending on whether we are a primary or overlay
* Set the zpos default depending on whether we are a primary or overlay
* plane.
*/
omap_state->zorder = plane->type == DRM_PLANE_TYPE_PRIMARY
plane->state->zpos = plane->type == DRM_PLANE_TYPE_PRIMARY
? 0 : omap_plane->id;
omap_state->base.rotation = DRM_MODE_ROTATE_0;
plane->state = &omap_state->base;
plane->state->plane = plane;
}
static int omap_plane_atomic_set_property(struct drm_plane *plane,
@ -285,10 +206,9 @@ static int omap_plane_atomic_set_property(struct drm_plane *plane,
uint64_t val)
{
struct omap_drm_private *priv = plane->dev->dev_private;
struct omap_plane_state *omap_state = to_omap_plane_state(state);
if (property == priv->zorder_prop)
omap_state->zorder = val;
state->zpos = val;
else
return -EINVAL;
@ -301,11 +221,9 @@ static int omap_plane_atomic_get_property(struct drm_plane *plane,
uint64_t *val)
{
struct omap_drm_private *priv = plane->dev->dev_private;
const struct omap_plane_state *omap_state =
container_of(state, const struct omap_plane_state, base);
if (property == priv->zorder_prop)
*val = omap_state->zorder;
*val = state->zpos;
else
return -EINVAL;
@ -318,8 +236,8 @@ static const struct drm_plane_funcs omap_plane_funcs = {
.reset = omap_plane_reset,
.destroy = omap_plane_destroy,
.set_property = drm_atomic_helper_plane_set_property,
.atomic_duplicate_state = omap_plane_atomic_duplicate_state,
.atomic_destroy_state = omap_plane_atomic_destroy_state,
.atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
.atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
.atomic_set_property = omap_plane_atomic_set_property,
.atomic_get_property = omap_plane_atomic_get_property,
};
@ -344,10 +262,13 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
u32 possible_crtcs)
{
struct omap_drm_private *priv = dev->dev_private;
unsigned int num_planes = priv->dispc_ops->get_num_ovls();
struct drm_plane *plane;
struct omap_plane *omap_plane;
enum omap_plane_id id;
int ret;
u32 nformats;
const u32 *formats;
if (WARN_ON(idx >= ARRAY_SIZE(plane_idx_to_id)))
return ERR_PTR(-EINVAL);
@ -360,23 +281,24 @@ struct drm_plane *omap_plane_init(struct drm_device *dev,
if (!omap_plane)
return ERR_PTR(-ENOMEM);
omap_plane->nformats = omap_framebuffer_get_formats(
omap_plane->formats, ARRAY_SIZE(omap_plane->formats),
priv->dispc_ops->ovl_get_color_modes(id));
formats = priv->dispc_ops->ovl_get_color_modes(id);
for (nformats = 0; formats[nformats]; ++nformats)
;
omap_plane->id = id;
omap_plane->name = plane_id_to_name[id];
plane = &omap_plane->base;
ret = drm_universal_plane_init(dev, plane, possible_crtcs,
&omap_plane_funcs, omap_plane->formats,
omap_plane->nformats, type, NULL);
&omap_plane_funcs, formats,
nformats, type, NULL);
if (ret < 0)
goto error;
drm_plane_helper_add(plane, &omap_plane_helper_funcs);
omap_plane_install_properties(plane, &plane->base);
drm_plane_create_zpos_property(plane, 0, 0, num_planes - 1);
return plane;

2
drivers/video/fbdev/omap2/omapfb/dss/core.c
View File

@ -206,8 +206,6 @@ static int __init omap_dss_probe(struct platform_device *pdev)
if (def_disp_name)
core.default_display_name = def_disp_name;
else if (pdata->default_display_name)
core.default_display_name = pdata->default_display_name;
register_pm_notifier(&omap_dss_pm_notif_block);

1
include/linux/platform_data/omapdss.h
View File

@ -27,7 +27,6 @@ enum omapdss_version {
/* Board specific data */
struct omap_dss_board_info {
const char *default_display_name;
int (*dsi_enable_pads)(int dsi_id, unsigned int lane_mask);
void (*dsi_disable_pads)(int dsi_id, unsigned int lane_mask);
int (*set_min_bus_tput)(struct device *dev, unsigned long r);

4
include/uapi/drm/omap_drm.h
View File

@ -106,8 +106,8 @@ struct drm_omap_gem_info {
#define DRM_OMAP_GET_PARAM 0x00
#define DRM_OMAP_SET_PARAM 0x01
#define DRM_OMAP_GEM_NEW 0x03
#define DRM_OMAP_GEM_CPU_PREP 0x04
#define DRM_OMAP_GEM_CPU_FINI 0x05
#define DRM_OMAP_GEM_CPU_PREP 0x04 /* Deprecated, to be removed */
#define DRM_OMAP_GEM_CPU_FINI 0x05 /* Deprecated, to be removed */
#define DRM_OMAP_GEM_INFO 0x06
#define DRM_OMAP_NUM_IOCTLS 0x07