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clk: samsung: exynos7: Correct CMU_CCORE clocks names 

This patch renames CMU_CCORE clocks names to match with user manual.

Signed-off-by: Alim Akhtar <alim.akhtar@samsung.com>
Reviewed-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
This commit is contained in:
Alim Akhtar 2015-09-10 14:14:30 +05:30 committed by Sylwester Nawrocki
parent 9b3ad363c1
commit 56365ee893
1 changed files with 2 additions and 2 deletions
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4
drivers/clk/samsung/clk-exynos7.c
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@ -549,7 +549,7 @@ CLK_OF_DECLARE(exynos7_clk_top1, "samsung,exynos7-clock-top1",
/* /*
* List of parent clocks for Muxes in CMU_CCORE * List of parent clocks for Muxes in CMU_CCORE
*/ */
PNAME(mout_aclk_ccore_133_p) = { "fin_pll", "dout_aclk_ccore_133" }; PNAME(mout_aclk_ccore_133_user_p) = { "fin_pll", "aclk_ccore_133" };
static unsigned long ccore_clk_regs[] __initdata = { static unsigned long ccore_clk_regs[] __initdata = {
MUX_SEL_CCORE, MUX_SEL_CCORE,
@ -557,7 +557,7 @@ static unsigned long ccore_clk_regs[] __initdata = {
}; };
static struct samsung_mux_clock ccore_mux_clks[] __initdata = { static struct samsung_mux_clock ccore_mux_clks[] __initdata = {
MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_p, MUX(0, "mout_aclk_ccore_133_user", mout_aclk_ccore_133_user_p,
MUX_SEL_CCORE, 1, 1), MUX_SEL_CCORE, 1, 1),
}; };