mirror of https://gitee.com/openkylin/linux.git
staging: iio: ad9832: use clock framework for clock reference
Previously external clock were set through platform_data struct. Now device uses clk struct defined in include/linux/clk.h to handle external clock source. It also removes mclk from platform_data struct. Signed-off-by: Marcelo Schmitt <marcelo.schmitt1@gmail.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
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7fe8f00051
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@ -7,6 +7,7 @@
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#include <asm/div64.h>
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/kernel.h>
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@ -95,7 +96,7 @@ struct ad9832_state {
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struct spi_device *spi;
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struct regulator *avdd;
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struct regulator *dvdd;
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unsigned long mclk;
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struct clk *mclk;
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unsigned short ctrl_fp;
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unsigned short ctrl_ss;
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unsigned short ctrl_src;
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@ -130,10 +131,10 @@ static int ad9832_write_frequency(struct ad9832_state *st,
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{
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unsigned long regval;
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if (fout > (st->mclk / 2))
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if (fout > (clk_get_rate(st->mclk) / 2))
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return -EINVAL;
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regval = ad9832_calc_freqreg(st->mclk, fout);
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regval = ad9832_calc_freqreg(clk_get_rate(st->mclk), fout);
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st->freq_data[0] = cpu_to_be16((AD9832_CMD_FRE8BITSW << CMD_SHIFT) |
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(addr << ADD_SHIFT) |
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@ -334,7 +335,16 @@ static int ad9832_probe(struct spi_device *spi)
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goto error_disable_avdd;
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}
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st->mclk = pdata->mclk;
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st->mclk = devm_clk_get(&spi->dev, "mclk");
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if (IS_ERR(st->mclk)) {
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ret = PTR_ERR(st->mclk);
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goto error_disable_dvdd;
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}
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ret = clk_prepare_enable(st->mclk);
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if (ret < 0)
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goto error_disable_dvdd;
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st->spi = spi;
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mutex_init(&st->lock);
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@ -385,39 +395,41 @@ static int ad9832_probe(struct spi_device *spi)
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ret = spi_sync(st->spi, &st->msg);
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if (ret) {
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dev_err(&spi->dev, "device init failed\n");
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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}
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ret = ad9832_write_frequency(st, AD9832_FREQ0HM, pdata->freq0);
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if (ret)
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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ret = ad9832_write_frequency(st, AD9832_FREQ1HM, pdata->freq1);
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if (ret)
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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ret = ad9832_write_phase(st, AD9832_PHASE0H, pdata->phase0);
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if (ret)
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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ret = ad9832_write_phase(st, AD9832_PHASE1H, pdata->phase1);
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if (ret)
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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ret = ad9832_write_phase(st, AD9832_PHASE2H, pdata->phase2);
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if (ret)
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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ret = ad9832_write_phase(st, AD9832_PHASE3H, pdata->phase3);
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if (ret)
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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ret = iio_device_register(indio_dev);
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if (ret)
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goto error_disable_dvdd;
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goto error_unprepare_mclk;
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return 0;
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error_unprepare_mclk:
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clk_disable_unprepare(st->mclk);
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error_disable_dvdd:
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regulator_disable(st->dvdd);
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error_disable_avdd:
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@ -432,6 +444,7 @@ static int ad9832_remove(struct spi_device *spi)
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struct ad9832_state *st = iio_priv(indio_dev);
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iio_device_unregister(indio_dev);
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clk_disable_unprepare(st->mclk);
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regulator_disable(st->dvdd);
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regulator_disable(st->avdd);
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@ -23,7 +23,6 @@
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*/
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struct ad9832_platform_data {
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unsigned long mclk;
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unsigned long freq0;
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unsigned long freq1;
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unsigned short phase0;
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