mirror of https://gitee.com/openkylin/linux.git
[media] coda: update CODA7541 to firmware 1.4.50
This patch splits the global workbuf into a global tempbuf and a per-context workbuf, adds the codec mode aux register, and restores the work buffer pointer on commands. With the new firmware, there is only a single set of read/write pointers which need to be restored between context switches. This allows more than four active contexts at the same time. All auxiliary buffers are now allocated through a helper function to avoid code duplication. Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de> Signed-off-by: Kamil Debski <k.debski@samsung.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
Philipp Zabel
Mauro Carvalho Chehab
parent
2039749ec2
commit
5677e3b04d
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@ -41,7 +41,8 @@
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#define CODA_FMO_BUF_SIZE 32
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#define CODADX6_WORK_BUF_SIZE (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
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#define CODA7_WORK_BUF_SIZE (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
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#define CODA7_WORK_BUF_SIZE (128 * 1024)
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#define CODA7_TEMP_BUF_SIZE (304 * 1024)
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#define CODA_PARA_BUF_SIZE (10 * 1024)
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#define CODA_ISRAM_SIZE (2048 * 2)
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#define CODADX6_IRAM_SIZE 0xb000
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@ -129,6 +130,7 @@ struct coda_dev {
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struct clk *clk_ahb;
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struct coda_aux_buf codebuf;
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struct coda_aux_buf tempbuf;
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struct coda_aux_buf workbuf;
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struct gen_pool *iram_pool;
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long unsigned int iram_vaddr;
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@ -153,6 +155,7 @@ struct coda_params {
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u8 mpeg4_inter_qp;
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u8 gop_size;
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int codec_mode;
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int codec_mode_aux;
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enum v4l2_mpeg_video_multi_slice_mode slice_mode;
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u32 framerate;
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u16 bitrate;
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@ -192,8 +195,10 @@ struct coda_ctx {
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int vpu_header_size[3];
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struct coda_aux_buf parabuf;
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struct coda_aux_buf internal_frames[CODA_MAX_FRAMEBUFFERS];
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struct coda_aux_buf workbuf;
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int num_internal_frames;
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int idx;
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int reg_idx;
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struct coda_iram_info iram_info;
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};
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@ -241,10 +246,18 @@ static int coda_wait_timeout(struct coda_dev *dev)
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static void coda_command_async(struct coda_ctx *ctx, int cmd)
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{
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struct coda_dev *dev = ctx->dev;
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if (dev->devtype->product == CODA_7541) {
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/* Restore context related registers to CODA */
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coda_write(dev, ctx->workbuf.paddr, CODA_REG_BIT_WORK_BUF_ADDR);
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}
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coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
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coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
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coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
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coda_write(dev, ctx->params.codec_mode_aux, CODA7_REG_BIT_RUN_AUX_STD);
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coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
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}
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@ -968,21 +981,6 @@ static void coda_wait_finish(struct vb2_queue *q)
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coda_lock(ctx);
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}
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static void coda_free_framebuffers(struct coda_ctx *ctx)
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{
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int i;
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for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
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if (ctx->internal_frames[i].vaddr) {
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dma_free_coherent(&ctx->dev->plat_dev->dev,
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ctx->internal_frames[i].size,
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ctx->internal_frames[i].vaddr,
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ctx->internal_frames[i].paddr);
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ctx->internal_frames[i].vaddr = NULL;
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}
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}
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}
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static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
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{
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struct coda_dev *dev = ctx->dev;
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@ -994,28 +992,69 @@ static void coda_parabuf_write(struct coda_ctx *ctx, int index, u32 value)
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p[index ^ 1] = value;
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}
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static int coda_alloc_aux_buf(struct coda_dev *dev,
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struct coda_aux_buf *buf, size_t size)
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{
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buf->vaddr = dma_alloc_coherent(&dev->plat_dev->dev, size, &buf->paddr,
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GFP_KERNEL);
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if (!buf->vaddr)
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return -ENOMEM;
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buf->size = size;
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return 0;
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}
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static inline int coda_alloc_context_buf(struct coda_ctx *ctx,
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struct coda_aux_buf *buf, size_t size)
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{
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return coda_alloc_aux_buf(ctx->dev, buf, size);
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}
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static void coda_free_aux_buf(struct coda_dev *dev,
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struct coda_aux_buf *buf)
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{
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if (buf->vaddr) {
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dma_free_coherent(&dev->plat_dev->dev, buf->size,
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buf->vaddr, buf->paddr);
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buf->vaddr = NULL;
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buf->size = 0;
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}
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}
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static void coda_free_framebuffers(struct coda_ctx *ctx)
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{
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int i;
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for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++)
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coda_free_aux_buf(ctx->dev, &ctx->internal_frames[i]);
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}
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static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
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{
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struct coda_dev *dev = ctx->dev;
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int height = q_data->height;
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dma_addr_t paddr;
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int ysize;
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int ret;
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int i;
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if (ctx->codec && ctx->codec->src_fourcc == V4L2_PIX_FMT_H264)
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height = round_up(height, 16);
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ysize = round_up(q_data->width, 8) * height;
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/* Allocate frame buffers */
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for (i = 0; i < ctx->num_internal_frames; i++) {
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ctx->internal_frames[i].size = q_data->sizeimage;
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if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
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size_t size;
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size = q_data->sizeimage;
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if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
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dev->devtype->product != CODA_DX6)
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ctx->internal_frames[i].size += ysize/4;
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ctx->internal_frames[i].vaddr = dma_alloc_coherent(
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&dev->plat_dev->dev, ctx->internal_frames[i].size,
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&ctx->internal_frames[i].paddr, GFP_KERNEL);
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if (!ctx->internal_frames[i].vaddr) {
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ret = coda_alloc_context_buf(ctx, &ctx->internal_frames[i], size);
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if (ret < 0) {
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coda_free_framebuffers(ctx);
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return -ENOMEM;
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return ret;
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}
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}
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@ -1026,10 +1065,20 @@ static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_d
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coda_parabuf_write(ctx, i * 3 + 1, paddr + ysize); /* Cb */
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coda_parabuf_write(ctx, i * 3 + 2, paddr + ysize + ysize/4); /* Cr */
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if (dev->devtype->product != CODA_DX6 && fourcc == V4L2_PIX_FMT_H264)
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coda_parabuf_write(ctx, 96 + i, ctx->internal_frames[i].paddr + ysize + ysize/4 + ysize/4);
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/* mvcol buffer for h.264 */
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if (ctx->codec->src_fourcc == V4L2_PIX_FMT_H264 &&
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dev->devtype->product != CODA_DX6)
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coda_parabuf_write(ctx, 96 + i,
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ctx->internal_frames[i].paddr +
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ysize + ysize/4 + ysize/4);
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}
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/* mvcol buffer for mpeg4 */
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if ((dev->devtype->product != CODA_DX6) &&
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(ctx->codec->src_fourcc == V4L2_PIX_FMT_MPEG4))
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coda_parabuf_write(ctx, 97, ctx->internal_frames[i].paddr +
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ysize + ysize/4 + ysize/4);
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return 0;
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}
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@ -1155,6 +1204,49 @@ static void coda_setup_iram(struct coda_ctx *ctx)
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}
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}
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static void coda_free_context_buffers(struct coda_ctx *ctx)
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{
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struct coda_dev *dev = ctx->dev;
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if (dev->devtype->product != CODA_DX6)
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coda_free_aux_buf(dev, &ctx->workbuf);
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}
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static int coda_alloc_context_buffers(struct coda_ctx *ctx,
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struct coda_q_data *q_data)
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{
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struct coda_dev *dev = ctx->dev;
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size_t size;
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int ret;
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switch (dev->devtype->product) {
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case CODA_7541:
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size = CODA7_WORK_BUF_SIZE;
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break;
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default:
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return 0;
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}
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if (ctx->workbuf.vaddr) {
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v4l2_err(&dev->v4l2_dev, "context buffer still allocated\n");
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ret = -EBUSY;
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return -ENOMEM;
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}
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ret = coda_alloc_context_buf(ctx, &ctx->workbuf, size);
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if (ret < 0) {
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v4l2_err(&dev->v4l2_dev, "failed to allocate %d byte context buffer",
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ctx->workbuf.size);
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goto err;
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}
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return 0;
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err:
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coda_free_context_buffers(ctx);
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return ret;
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}
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static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
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int header_code, u8 *header, int *size)
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{
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@ -1170,7 +1262,7 @@ static int coda_encode_header(struct coda_ctx *ctx, struct vb2_buffer *buf,
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v4l2_err(&dev->v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
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return ret;
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}
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*size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
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*size = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx)) -
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coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
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memcpy(header, vb2_plane_vaddr(buf, 0), *size);
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@ -1223,6 +1315,11 @@ static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
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return -EINVAL;
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}
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/* Allocate per-instance buffers */
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ret = coda_alloc_context_buffers(ctx, q_data_src);
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if (ret < 0)
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return ret;
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if (!coda_is_initialized(dev)) {
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v4l2_err(v4l2_dev, "coda is not initialized.\n");
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return -EFAULT;
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@ -1231,8 +1328,8 @@ static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
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mutex_lock(&dev->coda_mutex);
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coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
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coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
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coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
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coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->reg_idx));
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coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
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switch (dev->devtype->product) {
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case CODA_DX6:
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coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
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@ -1657,7 +1754,13 @@ static int coda_open(struct file *file)
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v4l2_fh_add(&ctx->fh);
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ctx->dev = dev;
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ctx->idx = idx;
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switch (dev->devtype->product) {
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case CODA_7541:
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ctx->reg_idx = 0;
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break;
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default:
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ctx->reg_idx = idx;
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}
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set_default_params(ctx);
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ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
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&coda_queue_init);
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@ -1676,11 +1779,9 @@ static int coda_open(struct file *file)
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ctx->fh.ctrl_handler = &ctx->ctrls;
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ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
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CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
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if (!ctx->parabuf.vaddr) {
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ret = coda_alloc_context_buf(ctx, &ctx->parabuf, CODA_PARA_BUF_SIZE);
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if (ret < 0) {
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v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
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ret = -ENOMEM;
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goto err;
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}
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@ -1715,9 +1816,11 @@ static int coda_release(struct file *file)
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list_del(&ctx->list);
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coda_unlock(ctx);
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dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
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ctx->parabuf.vaddr, ctx->parabuf.paddr);
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v4l2_m2m_ctx_release(ctx->m2m_ctx);
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coda_free_context_buffers(ctx);
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if (ctx->dev->devtype->product == CODA_DX6)
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coda_free_aux_buf(dev, &ctx->workbuf);
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coda_free_aux_buf(dev, &ctx->parabuf);
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v4l2_ctrl_handler_free(&ctx->ctrls);
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clk_disable_unprepare(dev->clk_per);
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clk_disable_unprepare(dev->clk_ahb);
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@ -1797,7 +1900,8 @@ static irqreturn_t coda_irq_handler(int irq, void *data)
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/* Get results from the coda */
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coda_read(dev, CODA_RET_ENC_PIC_TYPE);
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start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
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wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
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wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->reg_idx));
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/* Calculate bytesused field */
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if (dst_buf->v4l2_buf.sequence == 0) {
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vb2_set_plane_payload(dst_buf, 0, wr_ptr - start_ptr +
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@ -1867,7 +1971,7 @@ static void coda_timeout(struct work_struct *work)
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static u32 coda_supported_firmwares[] = {
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CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
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CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
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CODA_FIRMWARE_VERNUM(CODA_7541, 1, 4, 50),
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};
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static bool coda_firmware_supported(u32 vernum)
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@ -1932,8 +2036,13 @@ static int coda_hw_init(struct coda_dev *dev)
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coda_write(dev, 0, CODA_REG_BIT_CODE_BUF_ADDR + i * 4);
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/* Tell the BIT where to find everything it needs */
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coda_write(dev, dev->workbuf.paddr,
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CODA_REG_BIT_WORK_BUF_ADDR);
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if (dev->devtype->product == CODA_7541) {
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coda_write(dev, dev->tempbuf.paddr,
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CODA_REG_BIT_TEMP_BUF_ADDR);
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} else {
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coda_write(dev, dev->workbuf.paddr,
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CODA_REG_BIT_WORK_BUF_ADDR);
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}
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coda_write(dev, dev->codebuf.paddr,
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CODA_REG_BIT_CODE_BUF_ADDR);
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coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
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@ -2020,11 +2129,8 @@ static void coda_fw_callback(const struct firmware *fw, void *context)
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}
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/* allocate auxiliary per-device code buffer for the BIT processor */
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dev->codebuf.size = fw->size;
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dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
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&dev->codebuf.paddr,
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GFP_KERNEL);
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if (!dev->codebuf.vaddr) {
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ret = coda_alloc_aux_buf(dev, &dev->codebuf, fw->size);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to allocate code buffer\n");
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return;
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}
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@ -2214,18 +2320,26 @@ static int coda_probe(struct platform_device *pdev)
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/* allocate auxiliary per-device buffers for the BIT processor */
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switch (dev->devtype->product) {
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case CODA_DX6:
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dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
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ret = coda_alloc_aux_buf(dev, &dev->workbuf,
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CODADX6_WORK_BUF_SIZE);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to allocate work buffer\n");
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v4l2_device_unregister(&dev->v4l2_dev);
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return ret;
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}
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break;
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case CODA_7541:
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dev->tempbuf.size = CODA7_TEMP_BUF_SIZE;
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break;
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default:
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dev->workbuf.size = CODA7_WORK_BUF_SIZE;
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}
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dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
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&dev->workbuf.paddr,
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GFP_KERNEL);
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if (!dev->workbuf.vaddr) {
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dev_err(&pdev->dev, "failed to allocate work buffer\n");
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v4l2_device_unregister(&dev->v4l2_dev);
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return -ENOMEM;
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if (dev->tempbuf.size) {
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ret = coda_alloc_aux_buf(dev, &dev->tempbuf,
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dev->tempbuf.size);
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if (ret < 0) {
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dev_err(&pdev->dev, "failed to allocate temp buffer\n");
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v4l2_device_unregister(&dev->v4l2_dev);
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
if (dev->devtype->product == CODA_DX6)
|
||||
|
|
@ -2257,12 +2371,9 @@ static int coda_remove(struct platform_device *pdev)
|
|||
v4l2_device_unregister(&dev->v4l2_dev);
|
||||
if (dev->iram_vaddr)
|
||||
gen_pool_free(dev->iram_pool, dev->iram_vaddr, dev->iram_size);
|
||||
if (dev->codebuf.vaddr)
|
||||
dma_free_coherent(&pdev->dev, dev->codebuf.size,
|
||||
&dev->codebuf.vaddr, dev->codebuf.paddr);
|
||||
if (dev->workbuf.vaddr)
|
||||
dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
|
||||
dev->workbuf.paddr);
|
||||
coda_free_aux_buf(dev, &dev->codebuf);
|
||||
coda_free_aux_buf(dev, &dev->tempbuf);
|
||||
coda_free_aux_buf(dev, &dev->workbuf);
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -43,6 +43,7 @@
|
|||
#define CODA_STREAM_ENDIAN_SELECT (1 << 0)
|
||||
#define CODA_REG_BIT_FRAME_MEM_CTRL 0x110
|
||||
#define CODA_IMAGE_ENDIAN_SELECT (1 << 0)
|
||||
#define CODA_REG_BIT_TEMP_BUF_ADDR 0x118
|
||||
#define CODA_REG_BIT_RD_PTR(x) (0x120 + 8 * (x))
|
||||
#define CODA_REG_BIT_WR_PTR(x) (0x124 + 8 * (x))
|
||||
#define CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR 0x140
|
||||
|
|
@ -91,6 +92,14 @@
|
|||
#define CODA_MODE_INVALID 0xffff
|
||||
#define CODA_REG_BIT_INT_ENABLE 0x170
|
||||
#define CODA_INT_INTERRUPT_ENABLE (1 << 3)
|
||||
#define CODA7_REG_BIT_RUN_AUX_STD 0x178
|
||||
#define CODA_MP4_AUX_MPEG4 0
|
||||
#define CODA_MP4_AUX_DIVX3 1
|
||||
#define CODA_VPX_AUX_THO 0
|
||||
#define CODA_VPX_AUX_VP6 1
|
||||
#define CODA_VPX_AUX_VP8 2
|
||||
#define CODA_H264_AUX_AVC 0
|
||||
#define CODA_H264_AUX_MVC 1
|
||||
|
||||
/*
|
||||
* Commands' mailbox:
|
||||
|
|
|
|||
Loading…
Reference in New Issue