mirror of https://gitee.com/openkylin/linux.git
[ARM] 4444/2: OSIRIS: CPLD suspend fix
Ensure the CPLD 8bit settings are preserved over a suspend/resume cycle as the CPU sends a hard-reset at resume time. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -16,6 +16,7 @@
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/sysdev.h>
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#include <linux/serial_core.h>
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#include <asm/mach/arch.h>
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@ -245,6 +246,40 @@ static struct platform_device osiris_pcmcia = {
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.resource = osiris_pcmcia_resource,
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};
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/* Osiris power management device */
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#ifdef CONFIG_PM
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static unsigned char pm_osiris_ctrl0;
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static int osiris_pm_suspend(struct sys_device *sd, pm_message_t state)
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{
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pm_osiris_ctrl0 = __raw_readb(OSIRIS_VA_CTRL0);
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return 0;
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}
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static int osiris_pm_resume(struct sys_device *sd)
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{
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if (pm_osiris_ctrl0 & OSIRIS_CTRL0_FIX8)
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__raw_writeb(OSIRIS_CTRL1_FIX8, OSIRIS_VA_CTRL1);
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return 0;
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}
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#else
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#define osiris_pm_suspend NULL
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#define osiris_pm_resume NULL
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#endif
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static struct sysdev_class osiris_pm_sysclass = {
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set_kset_name("mach-osiris"),
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.suspend = osiris_pm_suspend,
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.resume = osiris_pm_resume,
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};
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static struct sys_device osiris_pm_sysdev = {
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.cls = &osiris_pm_sysclass,
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};
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/* Standard Osiris devices */
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static struct platform_device *osiris_devices[] __initdata = {
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@ -299,6 +334,9 @@ static void __init osiris_map_io(void)
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static void __init osiris_init(void)
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{
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sysdev_class_register(&osiris_pm_sysclass);
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sysdev_register(&osiris_pm_sysdev);
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platform_add_devices(osiris_devices, ARRAY_SIZE(osiris_devices));
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};
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@ -310,5 +348,6 @@ MACHINE_START(OSIRIS, "Simtec-OSIRIS")
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.map_io = osiris_map_io,
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.init_machine = osiris_init,
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.init_irq = s3c24xx_init_irq,
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.init_machine = osiris_init,
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.timer = &s3c24xx_timer,
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MACHINE_END
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@ -1,6 +1,6 @@
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/* linux/include/asm-arm/arch-s3c2410/osiris-cpld.h
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*
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* Copyright (c) 2005 Simtec Electronics
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* Copyright 2005 Simtec Electronics
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* http://www.simtec.co.uk/products/
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* Ben Dooks <ben@simtec.co.uk>
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*
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@ -19,9 +19,12 @@
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#define OSIRIS_CTRL0_NANDSEL (0x3)
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#define OSIRIS_CTRL0_BOOT_INT (1<<3)
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#define OSIRIS_CTRL0_PCMCIA (1<<4)
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#define OSIRIS_CTRL0_FIX8 (1<<5)
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#define OSIRIS_CTRL0_PCMCIA_nWAIT (1<<6)
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#define OSIRIS_CTRL0_PCMCIA_nIOIS16 (1<<7)
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#define OSIRIS_CTRL1_FIX8 (1<<0)
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#define OSIRIS_ID_REVMASK (0x7)
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#endif /* __ASM_ARCH_OSIRISCPLD_H */
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