mirror of https://gitee.com/openkylin/linux.git
Merge branch 'thunderx-DMAC-filtering'
Vadim Lomovtsev says: ==================== net: thunderx: implement DMAC filtering support By default CN88XX BGX accepts all incoming multicast and broadcast packets and filtering is disabled. The nic driver doesn't provide an ability to change such behaviour. This series is to implement DMAC filtering management for CN88XX nic driver allowing user to enable/disable filtering and configure specific MAC addresses to filter traffic. Changes from v1: build issues: - update code in order to address compiler warnings; checkpatch.pl reported issues: - update code in order to fit 80 symbols length; - update commit descriptions in order to fit 80 symbols length; ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
56c03cbf8c
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@ -265,6 +265,22 @@ struct nicvf_drv_stats {
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struct cavium_ptp;
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struct xcast_addr {
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struct list_head list;
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u64 addr;
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};
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struct xcast_addr_list {
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struct list_head list;
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int count;
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};
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struct nicvf_work {
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struct delayed_work work;
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u8 mode;
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struct xcast_addr_list *mc;
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};
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struct nicvf {
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struct nicvf *pnicvf;
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struct net_device *netdev;
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@ -313,6 +329,7 @@ struct nicvf {
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struct nicvf_pfc pfc;
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struct tasklet_struct qs_err_task;
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struct work_struct reset_task;
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struct nicvf_work rx_mode_work;
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/* PTP timestamp */
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struct cavium_ptp *ptp_clock;
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@ -403,6 +420,9 @@ struct nicvf {
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#define NIC_MBOX_MSG_PTP_CFG 0x19 /* HW packet timestamp */
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#define NIC_MBOX_MSG_CFG_DONE 0xF0 /* VF configuration done */
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#define NIC_MBOX_MSG_SHUTDOWN 0xF1 /* VF is being shutdown */
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#define NIC_MBOX_MSG_RESET_XCAST 0xF2 /* Reset DCAM filtering mode */
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#define NIC_MBOX_MSG_ADD_MCAST 0xF3 /* Add MAC to DCAM filters */
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#define NIC_MBOX_MSG_SET_XCAST 0xF4 /* Set MCAST/BCAST RX mode */
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struct nic_cfg_msg {
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u8 msg;
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@ -556,6 +576,14 @@ struct set_ptp {
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bool enable;
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};
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struct xcast {
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u8 msg;
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union {
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u8 mode;
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u64 mac;
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} data;
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};
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/* 128 bit shared memory between PF and each VF */
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union nic_mbx {
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struct { u8 msg; } msg;
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@ -576,6 +604,7 @@ union nic_mbx {
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struct reset_stat_cfg reset_stat;
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struct pfc pfc;
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struct set_ptp ptp;
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struct xcast xcast;
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};
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#define NIC_NODE_ID_MASK 0x03
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@ -21,6 +21,8 @@
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#define DRV_NAME "nicpf"
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#define DRV_VERSION "1.0"
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#define NIC_VF_PER_MBX_REG 64
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struct hw_info {
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u8 bgx_cnt;
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u8 chans_per_lmac;
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@ -1072,6 +1074,40 @@ static void nic_handle_mbx_intr(struct nicpf *nic, int vf)
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case NIC_MBOX_MSG_PTP_CFG:
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nic_config_timestamp(nic, vf, &mbx.ptp);
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break;
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case NIC_MBOX_MSG_RESET_XCAST:
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if (vf >= nic->num_vf_en) {
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ret = -1; /* NACK */
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break;
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}
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bgx = NIC_GET_BGX_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
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lmac = NIC_GET_LMAC_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
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bgx_reset_xcast_mode(nic->node, bgx, lmac,
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vf < NIC_VF_PER_MBX_REG ? vf :
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vf - NIC_VF_PER_MBX_REG);
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break;
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case NIC_MBOX_MSG_ADD_MCAST:
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if (vf >= nic->num_vf_en) {
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ret = -1; /* NACK */
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break;
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}
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bgx = NIC_GET_BGX_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
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lmac = NIC_GET_LMAC_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
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bgx_set_dmac_cam_filter(nic->node, bgx, lmac,
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mbx.xcast.data.mac,
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vf < NIC_VF_PER_MBX_REG ? vf :
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vf - NIC_VF_PER_MBX_REG);
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break;
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case NIC_MBOX_MSG_SET_XCAST:
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if (vf >= nic->num_vf_en) {
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ret = -1; /* NACK */
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break;
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}
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bgx = NIC_GET_BGX_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
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lmac = NIC_GET_LMAC_FROM_VF_LMAC_MAP(nic->vf_lmac_map[vf]);
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bgx_set_xcast_mode(nic->node, bgx, lmac, mbx.xcast.data.mode);
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break;
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default:
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dev_err(&nic->pdev->dev,
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"Invalid msg from VF%d, msg 0x%x\n", vf, mbx.msg.msg);
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@ -1094,7 +1130,7 @@ static irqreturn_t nic_mbx_intr_handler(int irq, void *nic_irq)
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struct nicpf *nic = (struct nicpf *)nic_irq;
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int mbx;
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u64 intr;
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u8 vf, vf_per_mbx_reg = 64;
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u8 vf;
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if (irq == pci_irq_vector(nic->pdev, NIC_PF_INTR_ID_MBOX0))
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mbx = 0;
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@ -1103,12 +1139,13 @@ static irqreturn_t nic_mbx_intr_handler(int irq, void *nic_irq)
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intr = nic_reg_read(nic, NIC_PF_MAILBOX_INT + (mbx << 3));
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dev_dbg(&nic->pdev->dev, "PF interrupt Mbox%d 0x%llx\n", mbx, intr);
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for (vf = 0; vf < vf_per_mbx_reg; vf++) {
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for (vf = 0; vf < NIC_VF_PER_MBX_REG; vf++) {
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if (intr & (1ULL << vf)) {
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dev_dbg(&nic->pdev->dev, "Intr from VF %d\n",
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vf + (mbx * vf_per_mbx_reg));
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vf + (mbx * NIC_VF_PER_MBX_REG));
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nic_handle_mbx_intr(nic, vf + (mbx * vf_per_mbx_reg));
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nic_handle_mbx_intr(nic, vf +
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(mbx * NIC_VF_PER_MBX_REG));
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nic_clear_mbx_intr(nic, vf, mbx);
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}
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}
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@ -21,6 +21,7 @@
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#include <linux/bpf_trace.h>
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#include <linux/filter.h>
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#include <linux/net_tstamp.h>
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#include <linux/workqueue.h>
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#include "nic_reg.h"
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#include "nic.h"
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@ -67,6 +68,9 @@ module_param(cpi_alg, int, 0444);
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MODULE_PARM_DESC(cpi_alg,
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"PFC algorithm (0=none, 1=VLAN, 2=VLAN16, 3=IP Diffserv)");
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/* workqueue for handling kernel ndo_set_rx_mode() calls */
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static struct workqueue_struct *nicvf_rx_mode_wq;
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static inline u8 nicvf_netdev_qidx(struct nicvf *nic, u8 qidx)
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{
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if (nic->sqs_mode)
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@ -1919,6 +1923,100 @@ static int nicvf_ioctl(struct net_device *netdev, struct ifreq *req, int cmd)
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}
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}
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static void nicvf_set_rx_mode_task(struct work_struct *work_arg)
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{
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struct nicvf_work *vf_work = container_of(work_arg, struct nicvf_work,
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work.work);
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struct nicvf *nic = container_of(vf_work, struct nicvf, rx_mode_work);
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union nic_mbx mbx = {};
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struct xcast_addr *xaddr, *next;
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if (!vf_work)
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return;
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/* From the inside of VM code flow we have only 128 bits memory
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* available to send message to host's PF, so send all mc addrs
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* one by one, starting from flush command in case if kernel
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* requests to configure specific MAC filtering
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*/
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/* flush DMAC filters and reset RX mode */
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mbx.xcast.msg = NIC_MBOX_MSG_RESET_XCAST;
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nicvf_send_msg_to_pf(nic, &mbx);
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if (vf_work->mode & BGX_XCAST_MCAST_FILTER) {
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/* once enabling filtering, we need to signal to PF to add
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* its' own LMAC to the filter to accept packets for it.
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*/
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mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
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mbx.xcast.data.mac = 0;
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nicvf_send_msg_to_pf(nic, &mbx);
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}
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/* check if we have any specific MACs to be added to PF DMAC filter */
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if (vf_work->mc) {
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/* now go through kernel list of MACs and add them one by one */
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list_for_each_entry_safe(xaddr, next,
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&vf_work->mc->list, list) {
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mbx.xcast.msg = NIC_MBOX_MSG_ADD_MCAST;
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mbx.xcast.data.mac = xaddr->addr;
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nicvf_send_msg_to_pf(nic, &mbx);
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/* after receiving ACK from PF release memory */
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list_del(&xaddr->list);
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kfree(xaddr);
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vf_work->mc->count--;
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}
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kfree(vf_work->mc);
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}
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/* and finally set rx mode for PF accordingly */
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mbx.xcast.msg = NIC_MBOX_MSG_SET_XCAST;
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mbx.xcast.data.mode = vf_work->mode;
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nicvf_send_msg_to_pf(nic, &mbx);
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}
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static void nicvf_set_rx_mode(struct net_device *netdev)
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{
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struct nicvf *nic = netdev_priv(netdev);
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struct netdev_hw_addr *ha;
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struct xcast_addr_list *mc_list = NULL;
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u8 mode = 0;
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if (netdev->flags & IFF_PROMISC) {
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mode = BGX_XCAST_BCAST_ACCEPT | BGX_XCAST_MCAST_ACCEPT;
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} else {
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if (netdev->flags & IFF_BROADCAST)
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mode |= BGX_XCAST_BCAST_ACCEPT;
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if (netdev->flags & IFF_ALLMULTI) {
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mode |= BGX_XCAST_MCAST_ACCEPT;
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} else if (netdev->flags & IFF_MULTICAST) {
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mode |= BGX_XCAST_MCAST_FILTER;
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/* here we need to copy mc addrs */
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if (netdev_mc_count(netdev)) {
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struct xcast_addr *xaddr;
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mc_list = kmalloc(sizeof(*mc_list), GFP_ATOMIC);
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INIT_LIST_HEAD(&mc_list->list);
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netdev_hw_addr_list_for_each(ha, &netdev->mc) {
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xaddr = kmalloc(sizeof(*xaddr),
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GFP_ATOMIC);
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xaddr->addr =
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ether_addr_to_u64(ha->addr);
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list_add_tail(&xaddr->list,
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&mc_list->list);
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mc_list->count++;
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}
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}
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}
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}
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nic->rx_mode_work.mc = mc_list;
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nic->rx_mode_work.mode = mode;
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queue_delayed_work(nicvf_rx_mode_wq, &nic->rx_mode_work.work, 2 * HZ);
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}
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static const struct net_device_ops nicvf_netdev_ops = {
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.ndo_open = nicvf_open,
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.ndo_stop = nicvf_stop,
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@ -1931,6 +2029,7 @@ static const struct net_device_ops nicvf_netdev_ops = {
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.ndo_set_features = nicvf_set_features,
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.ndo_bpf = nicvf_xdp,
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.ndo_do_ioctl = nicvf_ioctl,
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.ndo_set_rx_mode = nicvf_set_rx_mode,
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};
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static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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@ -2071,6 +2170,8 @@ static int nicvf_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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INIT_WORK(&nic->reset_task, nicvf_reset_task);
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INIT_DELAYED_WORK(&nic->rx_mode_work.work, nicvf_set_rx_mode_task);
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err = register_netdev(netdev);
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if (err) {
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dev_err(dev, "Failed to register netdevice\n");
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@ -2109,6 +2210,8 @@ static void nicvf_remove(struct pci_dev *pdev)
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nic = netdev_priv(netdev);
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pnetdev = nic->pnicvf->netdev;
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cancel_delayed_work_sync(&nic->rx_mode_work.work);
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/* Check if this Qset is assigned to different VF.
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* If yes, clean primary and all secondary Qsets.
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*/
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@ -2140,12 +2243,17 @@ static struct pci_driver nicvf_driver = {
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static int __init nicvf_init_module(void)
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{
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pr_info("%s, ver %s\n", DRV_NAME, DRV_VERSION);
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nicvf_rx_mode_wq = alloc_ordered_workqueue("nicvf_generic",
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WQ_MEM_RECLAIM);
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return pci_register_driver(&nicvf_driver);
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}
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static void __exit nicvf_cleanup_module(void)
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{
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if (nicvf_rx_mode_wq) {
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destroy_workqueue(nicvf_rx_mode_wq);
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nicvf_rx_mode_wq = NULL;
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}
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pci_unregister_driver(&nicvf_driver);
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}
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|
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|
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@ -24,9 +24,31 @@
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#define DRV_NAME "thunder_bgx"
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#define DRV_VERSION "1.0"
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/* RX_DMAC_CTL configuration */
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enum MCAST_MODE {
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MCAST_MODE_REJECT = 0x0,
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MCAST_MODE_ACCEPT = 0x1,
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MCAST_MODE_CAM_FILTER = 0x2,
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RSVD = 0x3
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};
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#define BCAST_ACCEPT BIT(0)
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#define CAM_ACCEPT BIT(3)
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#define MCAST_MODE_MASK 0x3
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#define BGX_MCAST_MODE(x) (x << 1)
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|
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struct dmac_map {
|
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u64 vf_map;
|
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u64 dmac;
|
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};
|
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|
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struct lmac {
|
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struct bgx *bgx;
|
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int dmac;
|
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/* actual number of DMACs configured */
|
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u8 dmacs_cfg;
|
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/* overal number of possible DMACs could be configured per LMAC */
|
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u8 dmacs_count;
|
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struct dmac_map *dmacs; /* DMAC:VFs tracking filter array */
|
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u8 mac[ETH_ALEN];
|
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u8 lmac_type;
|
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u8 lane_to_sds;
|
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|
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@ -223,6 +245,163 @@ void bgx_set_lmac_mac(int node, int bgx_idx, int lmacid, const u8 *mac)
|
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}
|
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EXPORT_SYMBOL(bgx_set_lmac_mac);
|
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|
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static void bgx_flush_dmac_cam_filter(struct bgx *bgx, int lmacid)
|
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{
|
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struct lmac *lmac = NULL;
|
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u8 idx = 0;
|
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|
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lmac = &bgx->lmac[lmacid];
|
||||
/* reset CAM filters */
|
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for (idx = 0; idx < lmac->dmacs_count; idx++)
|
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bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM +
|
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((lmacid * lmac->dmacs_count) + idx) *
|
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sizeof(u64), 0);
|
||||
}
|
||||
|
||||
static void bgx_lmac_remove_filters(struct lmac *lmac, u8 vf_id)
|
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{
|
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int i = 0;
|
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|
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if (!lmac)
|
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return;
|
||||
|
||||
/* We've got reset filters request from some of attached VF, while the
|
||||
* others might want to keep their configuration. So in this case lets
|
||||
* iterate over all of configured filters and decrease number of
|
||||
* referencies. if some addresses get zero refs remove them from list
|
||||
*/
|
||||
for (i = lmac->dmacs_cfg - 1; i >= 0; i--) {
|
||||
lmac->dmacs[i].vf_map &= ~BIT_ULL(vf_id);
|
||||
if (!lmac->dmacs[i].vf_map) {
|
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lmac->dmacs_cfg--;
|
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lmac->dmacs[i].dmac = 0;
|
||||
lmac->dmacs[i].vf_map = 0;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static int bgx_lmac_save_filter(struct lmac *lmac, u64 dmac, u8 vf_id)
|
||||
{
|
||||
u8 i = 0;
|
||||
|
||||
if (!lmac)
|
||||
return -1;
|
||||
|
||||
/* At the same time we could have several VFs 'attached' to some
|
||||
* particular LMAC, and each VF is represented as network interface
|
||||
* for kernel. So from user perspective it should be possible to
|
||||
* manipulate with its' (VF) receive modes. However from PF
|
||||
* driver perspective we need to keep track of filter configurations
|
||||
* for different VFs to prevent filter values dupes
|
||||
*/
|
||||
for (i = 0; i < lmac->dmacs_cfg; i++) {
|
||||
if (lmac->dmacs[i].dmac == dmac) {
|
||||
lmac->dmacs[i].vf_map |= BIT_ULL(vf_id);
|
||||
return -1;
|
||||
}
|
||||
}
|
||||
|
||||
if (!(lmac->dmacs_cfg < lmac->dmacs_count))
|
||||
return -1;
|
||||
|
||||
/* keep it for further tracking */
|
||||
lmac->dmacs[lmac->dmacs_cfg].dmac = dmac;
|
||||
lmac->dmacs[lmac->dmacs_cfg].vf_map = BIT_ULL(vf_id);
|
||||
lmac->dmacs_cfg++;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int bgx_set_dmac_cam_filter_mac(struct bgx *bgx, int lmacid,
|
||||
u64 cam_dmac, u8 idx)
|
||||
{
|
||||
struct lmac *lmac = NULL;
|
||||
u64 cfg = 0;
|
||||
|
||||
/* skip zero addresses as meaningless */
|
||||
if (!cam_dmac || !bgx)
|
||||
return -1;
|
||||
|
||||
lmac = &bgx->lmac[lmacid];
|
||||
|
||||
/* configure DCAM filtering for designated LMAC */
|
||||
cfg = RX_DMACX_CAM_LMACID(lmacid & LMAC_ID_MASK) |
|
||||
RX_DMACX_CAM_EN | cam_dmac;
|
||||
bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM +
|
||||
((lmacid * lmac->dmacs_count) + idx) * sizeof(u64), cfg);
|
||||
return 0;
|
||||
}
|
||||
|
||||
void bgx_set_dmac_cam_filter(int node, int bgx_idx, int lmacid,
|
||||
u64 cam_dmac, u8 vf_id)
|
||||
{
|
||||
struct bgx *bgx = get_bgx(node, bgx_idx);
|
||||
struct lmac *lmac = NULL;
|
||||
|
||||
if (!bgx)
|
||||
return;
|
||||
|
||||
lmac = &bgx->lmac[lmacid];
|
||||
|
||||
if (!cam_dmac)
|
||||
cam_dmac = ether_addr_to_u64(lmac->mac);
|
||||
|
||||
/* since we might have several VFs attached to particular LMAC
|
||||
* and kernel could call mcast config for each of them with the
|
||||
* same MAC, check if requested MAC is already in filtering list and
|
||||
* updare/prepare list of MACs to be applied later to HW filters
|
||||
*/
|
||||
bgx_lmac_save_filter(lmac, cam_dmac, vf_id);
|
||||
}
|
||||
EXPORT_SYMBOL(bgx_set_dmac_cam_filter);
|
||||
|
||||
void bgx_set_xcast_mode(int node, int bgx_idx, int lmacid, u8 mode)
|
||||
{
|
||||
struct bgx *bgx = get_bgx(node, bgx_idx);
|
||||
struct lmac *lmac = NULL;
|
||||
u64 cfg = 0;
|
||||
u8 i = 0;
|
||||
|
||||
if (!bgx)
|
||||
return;
|
||||
|
||||
lmac = &bgx->lmac[lmacid];
|
||||
|
||||
cfg = bgx_reg_read(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL);
|
||||
if (mode & BGX_XCAST_BCAST_ACCEPT)
|
||||
cfg |= BCAST_ACCEPT;
|
||||
else
|
||||
cfg &= ~BCAST_ACCEPT;
|
||||
|
||||
/* disable all MCASTs and DMAC filtering */
|
||||
cfg &= ~(CAM_ACCEPT | BGX_MCAST_MODE(MCAST_MODE_MASK));
|
||||
|
||||
/* check requested bits and set filtergin mode appropriately */
|
||||
if (mode & (BGX_XCAST_MCAST_ACCEPT)) {
|
||||
cfg |= (BGX_MCAST_MODE(MCAST_MODE_ACCEPT));
|
||||
} else if (mode & BGX_XCAST_MCAST_FILTER) {
|
||||
cfg |= (BGX_MCAST_MODE(MCAST_MODE_CAM_FILTER) | CAM_ACCEPT);
|
||||
for (i = 0; i < lmac->dmacs_cfg; i++)
|
||||
bgx_set_dmac_cam_filter_mac(bgx, lmacid,
|
||||
lmac->dmacs[i].dmac, i);
|
||||
}
|
||||
bgx_reg_write(bgx, lmacid, BGX_CMRX_RX_DMAC_CTL, cfg);
|
||||
}
|
||||
EXPORT_SYMBOL(bgx_set_xcast_mode);
|
||||
|
||||
void bgx_reset_xcast_mode(int node, int bgx_idx, int lmacid, u8 vf_id)
|
||||
{
|
||||
struct bgx *bgx = get_bgx(node, bgx_idx);
|
||||
|
||||
if (!bgx)
|
||||
return;
|
||||
|
||||
bgx_lmac_remove_filters(&bgx->lmac[lmacid], vf_id);
|
||||
bgx_flush_dmac_cam_filter(bgx, lmacid);
|
||||
bgx_set_xcast_mode(node, bgx_idx, lmacid,
|
||||
(BGX_XCAST_BCAST_ACCEPT | BGX_XCAST_MCAST_ACCEPT));
|
||||
}
|
||||
EXPORT_SYMBOL(bgx_reset_xcast_mode);
|
||||
|
||||
void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable)
|
||||
{
|
||||
struct bgx *bgx = get_bgx(node, bgx_idx);
|
||||
|
|
@ -468,18 +647,6 @@ u64 bgx_get_tx_stats(int node, int bgx_idx, int lmac, int idx)
|
|||
}
|
||||
EXPORT_SYMBOL(bgx_get_tx_stats);
|
||||
|
||||
static void bgx_flush_dmac_addrs(struct bgx *bgx, int lmac)
|
||||
{
|
||||
u64 offset;
|
||||
|
||||
while (bgx->lmac[lmac].dmac > 0) {
|
||||
offset = ((bgx->lmac[lmac].dmac - 1) * sizeof(u64)) +
|
||||
(lmac * MAX_DMAC_PER_LMAC * sizeof(u64));
|
||||
bgx_reg_write(bgx, 0, BGX_CMR_RX_DMACX_CAM + offset, 0);
|
||||
bgx->lmac[lmac].dmac--;
|
||||
}
|
||||
}
|
||||
|
||||
/* Configure BGX LMAC in internal loopback mode */
|
||||
void bgx_lmac_internal_loopback(int node, int bgx_idx,
|
||||
int lmac_idx, bool enable)
|
||||
|
|
@ -912,6 +1079,11 @@ static int bgx_lmac_enable(struct bgx *bgx, u8 lmacid)
|
|||
bgx_reg_write(bgx, lmacid, BGX_SMUX_TX_MIN_PKT, 60 + 4);
|
||||
}
|
||||
|
||||
/* actual number of filters available to exact LMAC */
|
||||
lmac->dmacs_count = (RX_DMAC_COUNT / bgx->lmac_count);
|
||||
lmac->dmacs = kcalloc(lmac->dmacs_count, sizeof(*lmac->dmacs),
|
||||
GFP_KERNEL);
|
||||
|
||||
/* Enable lmac */
|
||||
bgx_reg_modify(bgx, lmacid, BGX_CMRX_CFG, CMR_EN);
|
||||
|
||||
|
|
@ -998,7 +1170,8 @@ static void bgx_lmac_disable(struct bgx *bgx, u8 lmacid)
|
|||
cfg &= ~CMR_EN;
|
||||
bgx_reg_write(bgx, lmacid, BGX_CMRX_CFG, cfg);
|
||||
|
||||
bgx_flush_dmac_addrs(bgx, lmacid);
|
||||
bgx_flush_dmac_cam_filter(bgx, lmacid);
|
||||
kfree(lmac->dmacs);
|
||||
|
||||
if ((lmac->lmac_type != BGX_MODE_XFI) &&
|
||||
(lmac->lmac_type != BGX_MODE_XLAUI) &&
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
#define DEFAULT_PAUSE_TIME 0xFFFF
|
||||
|
||||
#define BGX_ID_MASK 0x3
|
||||
#define LMAC_ID_MASK 0x3
|
||||
|
||||
#define MAX_DMAC_PER_LMAC_TNS_BYPASS_MODE 2
|
||||
|
||||
|
|
@ -57,7 +58,7 @@
|
|||
#define BGX_CMRX_RX_FIFO_LEN 0x108
|
||||
#define BGX_CMR_RX_DMACX_CAM 0x200
|
||||
#define RX_DMACX_CAM_EN BIT_ULL(48)
|
||||
#define RX_DMACX_CAM_LMACID(x) (x << 49)
|
||||
#define RX_DMACX_CAM_LMACID(x) (((u64)x) << 49)
|
||||
#define RX_DMAC_COUNT 32
|
||||
#define BGX_CMR_RX_STREERING 0x300
|
||||
#define RX_TRAFFIC_STEER_RULE_COUNT 8
|
||||
|
|
@ -205,17 +206,13 @@
|
|||
#define LMAC_INTR_LINK_UP BIT(0)
|
||||
#define LMAC_INTR_LINK_DOWN BIT(1)
|
||||
|
||||
/* RX_DMAC_CTL configuration*/
|
||||
enum MCAST_MODE {
|
||||
MCAST_MODE_REJECT,
|
||||
MCAST_MODE_ACCEPT,
|
||||
MCAST_MODE_CAM_FILTER,
|
||||
RSVD
|
||||
};
|
||||
|
||||
#define BCAST_ACCEPT 1
|
||||
#define CAM_ACCEPT 1
|
||||
#define BGX_XCAST_BCAST_ACCEPT BIT(0)
|
||||
#define BGX_XCAST_MCAST_ACCEPT BIT(1)
|
||||
#define BGX_XCAST_MCAST_FILTER BIT(2)
|
||||
|
||||
void bgx_set_dmac_cam_filter(int node, int bgx_idx, int lmacid, u64 mac, u8 vf);
|
||||
void bgx_reset_xcast_mode(int node, int bgx_idx, int lmacid, u8 vf);
|
||||
void bgx_set_xcast_mode(int node, int bgx_idx, int lmacid, u8 mode);
|
||||
void octeon_mdiobus_force_mod_depencency(void);
|
||||
void bgx_lmac_rx_tx_enable(int node, int bgx_idx, int lmacid, bool enable);
|
||||
void bgx_add_dmac_addr(u64 dmac, int node, int bgx_idx, int lmac);
|
||||
|
|
|
|||
Loading…
Reference in New Issue