mirror of https://gitee.com/openkylin/linux.git
arm: Xilinx ZynqMP dt patches for v4.6
- Extract clock information from EP108 - Sort GPIO node -----BEGIN PGP SIGNATURE----- Version: GnuPG v1 iEYEABECAAYFAlbO/SIACgkQykllyylKDCEL9QCfdcFczSmk3OWvubtp1/d7YoMs MhoAn33UBIqTGcmYgpRljfhWWStW1eRE =wlZ0 -----END PGP SIGNATURE----- Merge tag 'zynqmp-dt-for-4.6' of https://github.com/Xilinx/linux-xlnx into next/dt64 Merge "ARM: Xilinx ZynqMP dt patches for v4.6" from Michal Simek: - Extract clock information from EP108 - Sort GPIO node * tag 'zynqmp-dt-for-4.6' of https://github.com/Xilinx/linux-xlnx: ARM64: zynqmp: Extract clock information from EP108 ARM64: zynqmp: Keep gpio node alphabetically sorted
This commit is contained in:
Arnd Bergmann
commit
56c8b00fdb
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@ -0,0 +1,88 @@
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/*
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* clock specification for Xilinx ZynqMP ep108 development board
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*
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* (C) Copyright 2015, Xilinx, Inc.
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*
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* Michal Simek <michal.simek@xilinx.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*/
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&amba {
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misc_clk: misc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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i2c_clk: i2c_clk {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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clock-frequency = <111111111>;
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};
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sata_clk: sata_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <75000000>;
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};
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};
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&can0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&gem0 {
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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};
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&gpio {
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clocks = <&misc_clk>;
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};
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&i2c0 {
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clocks = <&i2c_clk>;
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};
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&i2c1 {
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clocks = <&i2c_clk>;
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};
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&sata {
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clocks = <&sata_clk>;
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};
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&sdhci0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&sdhci1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&spi0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&spi1 {
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clocks = <&misc_clk &misc_clk>;
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};
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&uart0 {
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clocks = <&misc_clk &misc_clk>;
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};
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&usb0 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&usb1 {
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clocks = <&misc_clk>, <&misc_clk>;
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};
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&watchdog0 {
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clocks= <&misc_clk>;
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};
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@ -14,6 +14,7 @@
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/dts-v1/;
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/include/ "zynqmp.dtsi"
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/include/ "zynqmp-ep108-clk.dtsi"
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/ {
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model = "ZynqMP EP108";
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@ -90,7 +90,7 @@ gic: interrupt-controller@f9010000 {
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};
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};
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amba {
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amba: amba {
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compatible = "simple-bus";
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#address-cells = <2>;
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#size-cells = <1>;
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@ -99,7 +99,6 @@ amba {
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can0: can@ff060000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = <&misc_clk &misc_clk>;
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clock-names = "can_clk", "pclk";
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reg = <0x0 0xff060000 0x1000>;
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interrupts = <0 23 4>;
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@ -111,7 +110,6 @@ can0: can@ff060000 {
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can1: can@ff070000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = <&misc_clk &misc_clk>;
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clock-names = "can_clk", "pclk";
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reg = <0x0 0xff070000 0x1000>;
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interrupts = <0 24 4>;
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@ -120,24 +118,6 @@ can1: can@ff070000 {
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rx-fifo-depth = <0x40>;
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};
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misc_clk: misc_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <25000000>;
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};
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gpio: gpio@ff0a0000 {
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compatible = "xlnx,zynqmp-gpio-1.0";
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status = "disabled";
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#gpio-cells = <0x2>;
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clocks = <&misc_clk>;
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interrupt-parent = <&gic>;
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interrupts = <0 16 4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x0 0xff0a0000 0x1000>;
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};
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gem0: ethernet@ff0b0000 {
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compatible = "cdns,gem";
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status = "disabled";
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@ -145,7 +125,6 @@ gem0: ethernet@ff0b0000 {
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interrupts = <0 57 4>, <0 57 4>;
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reg = <0x0 0xff0b0000 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -157,7 +136,6 @@ gem1: ethernet@ff0c0000 {
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interrupts = <0 59 4>, <0 59 4>;
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reg = <0x0 0xff0c0000 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -169,7 +147,6 @@ gem2: ethernet@ff0d0000 {
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interrupts = <0 61 4>, <0 61 4>;
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reg = <0x0 0xff0d0000 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -181,15 +158,19 @@ gem3: ethernet@ff0e0000 {
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interrupts = <0 63 4>, <0 63 4>;
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reg = <0x0 0xff0e0000 0x1000>;
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clock-names = "pclk", "hclk", "tx_clk";
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clocks = <&misc_clk>, <&misc_clk>, <&misc_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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i2c_clk: i2c_clk {
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compatible = "fixed-clock";
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#clock-cells = <0x0>;
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clock-frequency = <111111111>;
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gpio: gpio@ff0a0000 {
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compatible = "xlnx,zynqmp-gpio-1.0";
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status = "disabled";
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#gpio-cells = <0x2>;
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interrupt-parent = <&gic>;
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interrupts = <0 16 4>;
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interrupt-controller;
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#interrupt-cells = <2>;
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reg = <0x0 0xff0a0000 0x1000>;
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};
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i2c0: i2c@ff020000 {
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@ -198,7 +179,6 @@ i2c0: i2c@ff020000 {
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interrupt-parent = <&gic>;
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interrupts = <0 17 4>;
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reg = <0x0 0xff020000 0x1000>;
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clocks = <&i2c_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -209,24 +189,16 @@ i2c1: i2c@ff030000 {
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interrupt-parent = <&gic>;
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interrupts = <0 18 4>;
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reg = <0x0 0xff030000 0x1000>;
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clocks = <&i2c_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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sata_clk: sata_clk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <75000000>;
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};
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sata: ahci@fd0c0000 {
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compatible = "ceva,ahci-1v84";
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status = "disabled";
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reg = <0x0 0xfd0c0000 0x2000>;
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interrupt-parent = <&gic>;
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interrupts = <0 133 4>;
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clocks = <&sata_clk>;
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};
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sdhci0: sdhci@ff160000 {
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@ -236,7 +208,6 @@ sdhci0: sdhci@ff160000 {
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interrupts = <0 48 4>;
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reg = <0x0 0xff160000 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&misc_clk>, <&misc_clk>;
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};
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sdhci1: sdhci@ff170000 {
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@ -246,7 +217,6 @@ sdhci1: sdhci@ff170000 {
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interrupts = <0 49 4>;
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reg = <0x0 0xff170000 0x1000>;
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&misc_clk>, <&misc_clk>;
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};
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smmu: smmu@fd800000 {
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@ -268,7 +238,6 @@ spi0: spi@ff040000 {
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interrupts = <0 19 4>;
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reg = <0x0 0xff040000 0x1000>;
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clock-names = "ref_clk", "pclk";
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clocks = <&misc_clk &misc_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -280,7 +249,6 @@ spi1: spi@ff050000 {
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interrupts = <0 20 4>;
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reg = <0x0 0xff050000 0x1000>;
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clock-names = "ref_clk", "pclk";
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clocks = <&misc_clk &misc_clk>;
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#address-cells = <1>;
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#size-cells = <0>;
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};
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@ -291,7 +259,6 @@ ttc0: timer@ff110000 {
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interrupt-parent = <&gic>;
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interrupts = <0 36 4>, <0 37 4>, <0 38 4>;
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reg = <0x0 0xff110000 0x1000>;
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clocks = <&misc_clk>;
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timer-width = <32>;
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};
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@ -301,7 +268,6 @@ ttc1: timer@ff120000 {
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interrupt-parent = <&gic>;
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interrupts = <0 39 4>, <0 40 4>, <0 41 4>;
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reg = <0x0 0xff120000 0x1000>;
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clocks = <&misc_clk>;
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timer-width = <32>;
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};
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@ -311,7 +277,6 @@ ttc2: timer@ff130000 {
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interrupt-parent = <&gic>;
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interrupts = <0 42 4>, <0 43 4>, <0 44 4>;
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reg = <0x0 0xff130000 0x1000>;
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clocks = <&misc_clk>;
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timer-width = <32>;
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};
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@ -321,7 +286,6 @@ ttc3: timer@ff140000 {
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interrupt-parent = <&gic>;
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interrupts = <0 45 4>, <0 46 4>, <0 47 4>;
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reg = <0x0 0xff140000 0x1000>;
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clocks = <&misc_clk>;
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timer-width = <32>;
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};
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@ -332,7 +296,6 @@ uart0: serial@ff000000 {
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interrupts = <0 21 4>;
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reg = <0x0 0xff000000 0x1000>;
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clock-names = "uart_clk", "pclk";
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clocks = <&misc_clk &misc_clk>;
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};
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uart1: serial@ff010000 {
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@ -342,7 +305,6 @@ uart1: serial@ff010000 {
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interrupts = <0 22 4>;
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reg = <0x0 0xff010000 0x1000>;
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clock-names = "uart_clk", "pclk";
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clocks = <&misc_clk &misc_clk>;
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};
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usb0: usb@fe200000 {
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@ -352,7 +314,6 @@ usb0: usb@fe200000 {
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interrupts = <0 65 4>;
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reg = <0x0 0xfe200000 0x40000>;
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&misc_clk>, <&misc_clk>;
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};
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usb1: usb@fe300000 {
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@ -362,13 +323,11 @@ usb1: usb@fe300000 {
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interrupts = <0 70 4>;
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reg = <0x0 0xfe300000 0x40000>;
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clock-names = "clk_xin", "clk_ahb";
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clocks = <&misc_clk>, <&misc_clk>;
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};
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watchdog0: watchdog@fd4d0000 {
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compatible = "cdns,wdt-r1p2";
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status = "disabled";
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clocks= <&misc_clk>;
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interrupt-parent = <&gic>;
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interrupts = <0 52 1>;
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reg = <0x0 0xfd4d0000 0x1000>;
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