mirror of https://gitee.com/openkylin/linux.git
tty: serial: fsl_lpuart: Introduce lpuart_wait_bit_set()
Busy polling on a bit in a register is used in multiple places in the driver. Move it into a shared function. Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: Bhuvanchandra DV <bhuvanchandra.dv@toradex.com> Cc: Chris Healy <cphealy@gmail.com> Cc: Cory Tusar <cory.tusar@zii.aero> Cc: Lucas Stach <l.stach@pengutronix.de> Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Cc: Jiri Slaby <jslaby@suse.com> Cc: linux-imx@nxp.com Cc: linux-serial@vger.kernel.org Cc: linux-kernel@vger.kernel.org Link: https://lore.kernel.org/r/20190729195226.8862-15-andrew.smirnov@gmail.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -549,6 +549,20 @@ static void lpuart_flush_buffer(struct uart_port *port)
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}
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}
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static void lpuart_wait_bit_set(struct uart_port *port, unsigned int offset,
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u8 bit)
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{
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while (!(readb(port->membase + offset) & bit))
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barrier();
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}
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static void lpuart32_wait_bit_set(struct uart_port *port, unsigned int offset,
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u32 bit)
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{
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while (!(lpuart32_read(port, offset) & bit))
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barrier();
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}
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#if defined(CONFIG_CONSOLE_POLL)
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static int lpuart_poll_init(struct uart_port *port)
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@ -592,9 +606,7 @@ static int lpuart_poll_init(struct uart_port *port)
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static void lpuart_poll_put_char(struct uart_port *port, unsigned char c)
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{
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/* drain */
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while (!(readb(port->membase + UARTSR1) & UARTSR1_TDRE))
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barrier();
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lpuart_wait_bit_set(port, UARTSR1, UARTSR1_TDRE);
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writeb(c, port->membase + UARTDR);
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}
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@ -644,9 +656,7 @@ static int lpuart32_poll_init(struct uart_port *port)
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static void lpuart32_poll_put_char(struct uart_port *port, unsigned char c)
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{
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while (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_TDRE))
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barrier();
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lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TDRE);
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lpuart32_write(port, UARTDATA, c);
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}
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@ -1722,8 +1732,7 @@ lpuart_set_termios(struct uart_port *port, struct ktermios *termios,
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uart_update_timeout(port, termios->c_cflag, baud);
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/* wait transmit engin complete */
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while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC))
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barrier();
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lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC);
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/* disable transmit and receive */
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writeb(old_cr2 & ~(UARTCR2_TE | UARTCR2_RE),
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@ -1938,8 +1947,7 @@ lpuart32_set_termios(struct uart_port *port, struct ktermios *termios,
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uart_update_timeout(port, termios->c_cflag, baud);
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/* wait transmit engin complete */
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while (!(lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_TC))
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barrier();
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lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
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/* disable transmit and receive */
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lpuart32_write(&sport->port, old_ctrl & ~(UARTCTRL_TE | UARTCTRL_RE),
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@ -2054,17 +2062,13 @@ static struct lpuart_port *lpuart_ports[UART_NR];
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#ifdef CONFIG_SERIAL_FSL_LPUART_CONSOLE
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static void lpuart_console_putchar(struct uart_port *port, int ch)
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{
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while (!(readb(port->membase + UARTSR1) & UARTSR1_TDRE))
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barrier();
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lpuart_wait_bit_set(port, UARTSR1, UARTSR1_TDRE);
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writeb(ch, port->membase + UARTDR);
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}
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static void lpuart32_console_putchar(struct uart_port *port, int ch)
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{
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while (!(lpuart32_read(port, UARTSTAT) & UARTSTAT_TDRE))
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barrier();
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lpuart32_wait_bit_set(port, UARTSTAT, UARTSTAT_TDRE);
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lpuart32_write(port, ch, UARTDATA);
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}
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@ -2090,8 +2094,7 @@ lpuart_console_write(struct console *co, const char *s, unsigned int count)
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uart_console_write(&sport->port, s, count, lpuart_console_putchar);
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/* wait for transmitter finish complete and restore CR2 */
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while (!(readb(sport->port.membase + UARTSR1) & UARTSR1_TC))
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barrier();
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lpuart_wait_bit_set(&sport->port, UARTSR1, UARTSR1_TC);
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writeb(old_cr2, sport->port.membase + UARTCR2);
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@ -2121,8 +2124,7 @@ lpuart32_console_write(struct console *co, const char *s, unsigned int count)
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uart_console_write(&sport->port, s, count, lpuart32_console_putchar);
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/* wait for transmitter finish complete and restore CR2 */
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while (!(lpuart32_read(&sport->port, UARTSTAT) & UARTSTAT_TC))
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barrier();
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lpuart32_wait_bit_set(&sport->port, UARTSTAT, UARTSTAT_TC);
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lpuart32_write(&sport->port, old_cr, UARTCTRL);
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