mirror of https://gitee.com/openkylin/linux.git
drm/nouveau/therm: convert to new-style nvkm_subdev
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
parent
e2ca4e7d6e
commit
57113c0170
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@ -57,7 +57,7 @@ u64 nvif_device_time(struct nvif_device *);
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#define nvxx_gpio(a) nvxx_device(a)->gpio
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#define nvxx_gpio(a) nvxx_device(a)->gpio
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#define nvxx_clk(a) nvxx_device(a)->clk
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#define nvxx_clk(a) nvxx_device(a)->clk
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#define nvxx_i2c(a) nvxx_device(a)->i2c
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#define nvxx_i2c(a) nvxx_device(a)->i2c
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#define nvxx_therm(a) nvkm_therm(nvxx_device(a))
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#define nvxx_therm(a) nvxx_device(a)->therm
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#include <core/device.h>
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#include <core/device.h>
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#include <engine/fifo.h>
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#include <engine/fifo.h>
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@ -2,6 +2,28 @@
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#define __NVKM_THERM_H__
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#define __NVKM_THERM_H__
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#include <core/subdev.h>
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#include <core/subdev.h>
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#include <subdev/bios.h>
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#include <subdev/bios/therm.h>
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#include <subdev/timer.h>
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enum nvkm_therm_thrs_direction {
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NVKM_THERM_THRS_FALLING = 0,
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NVKM_THERM_THRS_RISING = 1
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};
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enum nvkm_therm_thrs_state {
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NVKM_THERM_THRS_LOWER = 0,
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NVKM_THERM_THRS_HIGHER = 1
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};
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enum nvkm_therm_thrs {
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NVKM_THERM_THRS_FANBOOST = 0,
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NVKM_THERM_THRS_DOWNCLOCK = 1,
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NVKM_THERM_THRS_CRITICAL = 2,
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NVKM_THERM_THRS_SHUTDOWN = 3,
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NVKM_THERM_THRS_NR
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};
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enum nvkm_therm_fan_mode {
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enum nvkm_therm_fan_mode {
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NVKM_THERM_CTRL_NONE = 0,
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NVKM_THERM_CTRL_NONE = 0,
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NVKM_THERM_CTRL_MANUAL = 1,
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NVKM_THERM_CTRL_MANUAL = 1,
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@ -24,56 +46,54 @@ enum nvkm_therm_attr_type {
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};
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};
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struct nvkm_therm {
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struct nvkm_therm {
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const struct nvkm_therm_func *func;
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struct nvkm_subdev subdev;
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struct nvkm_subdev subdev;
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int (*pwm_ctrl)(struct nvkm_therm *, int line, bool);
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/* automatic thermal management */
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int (*pwm_get)(struct nvkm_therm *, int line, u32 *, u32 *);
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struct nvkm_alarm alarm;
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int (*pwm_set)(struct nvkm_therm *, int line, u32, u32);
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spinlock_t lock;
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int (*pwm_clock)(struct nvkm_therm *, int line);
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struct nvbios_therm_trip_point *last_trip;
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int mode;
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int cstate;
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int suspend;
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/* bios */
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struct nvbios_therm_sensor bios_sensor;
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/* fan priv */
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struct nvkm_fan *fan;
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/* alarms priv */
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struct {
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spinlock_t alarm_program_lock;
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struct nvkm_alarm therm_poll_alarm;
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enum nvkm_therm_thrs_state alarm_state[NVKM_THERM_THRS_NR];
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} sensor;
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/* what should be done if the card overheats */
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struct {
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void (*downclock)(struct nvkm_therm *, bool active);
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void (*pause)(struct nvkm_therm *, bool active);
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} emergency;
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/* ic */
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struct i2c_client *ic;
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int (*fan_get)(struct nvkm_therm *);
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int (*fan_get)(struct nvkm_therm *);
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int (*fan_set)(struct nvkm_therm *, int);
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int (*fan_set)(struct nvkm_therm *, int);
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int (*fan_sense)(struct nvkm_therm *);
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int (*temp_get)(struct nvkm_therm *);
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int (*attr_get)(struct nvkm_therm *, enum nvkm_therm_attr_type);
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int (*attr_get)(struct nvkm_therm *, enum nvkm_therm_attr_type);
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int (*attr_set)(struct nvkm_therm *, enum nvkm_therm_attr_type, int);
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int (*attr_set)(struct nvkm_therm *, enum nvkm_therm_attr_type, int);
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};
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};
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static inline struct nvkm_therm *
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int nvkm_therm_temp_get(struct nvkm_therm *);
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nvkm_therm(void *obj)
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int nvkm_therm_fan_sense(struct nvkm_therm *);
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{
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return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_THERM);
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}
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#define nvkm_therm_create(p,e,o,d) \
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nvkm_therm_create_((p), (e), (o), sizeof(**d), (void **)d)
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#define nvkm_therm_destroy(p) ({ \
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struct nvkm_therm *_therm = (p); \
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_nvkm_therm_dtor(nv_object(_therm)); \
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})
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#define nvkm_therm_init(p) ({ \
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struct nvkm_therm *_therm = (p); \
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_nvkm_therm_init(nv_object(_therm)); \
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})
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#define nvkm_therm_fini(p,s) ({ \
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struct nvkm_therm *_therm = (p); \
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_nvkm_therm_init(nv_object(_therm), (s)); \
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})
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int nvkm_therm_create_(struct nvkm_object *, struct nvkm_object *,
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struct nvkm_oclass *, int, void **);
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void _nvkm_therm_dtor(struct nvkm_object *);
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int _nvkm_therm_init(struct nvkm_object *);
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int _nvkm_therm_fini(struct nvkm_object *, bool);
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int nvkm_therm_cstate(struct nvkm_therm *, int, int);
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int nvkm_therm_cstate(struct nvkm_therm *, int, int);
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extern struct nvkm_oclass nv40_therm_oclass;
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int nv40_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
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extern struct nvkm_oclass nv50_therm_oclass;
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int nv50_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
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extern struct nvkm_oclass g84_therm_oclass;
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int g84_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
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extern struct nvkm_oclass gt215_therm_oclass;
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int gt215_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
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extern struct nvkm_oclass gf110_therm_oclass;
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int gf119_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
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extern struct nvkm_oclass gm107_therm_oclass;
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int gm107_therm_new(struct nvkm_device *, int, struct nvkm_therm **);
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#endif
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#endif
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@ -41,7 +41,7 @@ nouveau_hwmon_show_temp(struct device *d, struct device_attribute *a, char *buf)
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struct drm_device *dev = dev_get_drvdata(d);
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struct drm_device *dev = dev_get_drvdata(d);
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nvkm_therm *therm = nvxx_therm(&drm->device);
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struct nvkm_therm *therm = nvxx_therm(&drm->device);
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int temp = therm->temp_get(therm);
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int temp = nvkm_therm_temp_get(therm);
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if (temp < 0)
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if (temp < 0)
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return temp;
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return temp;
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@ -348,7 +348,7 @@ nouveau_hwmon_show_fan1_input(struct device *d, struct device_attribute *attr,
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nouveau_drm *drm = nouveau_drm(dev);
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struct nvkm_therm *therm = nvxx_therm(&drm->device);
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struct nvkm_therm *therm = nvxx_therm(&drm->device);
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return snprintf(buf, PAGE_SIZE, "%d\n", therm->fan_sense(therm));
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return snprintf(buf, PAGE_SIZE, "%d\n", nvkm_therm_fan_sense(therm));
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}
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}
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static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, nouveau_hwmon_show_fan1_input,
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static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, nouveau_hwmon_show_fan1_input,
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NULL, 0);
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NULL, 0);
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@ -571,7 +571,7 @@ nouveau_hwmon_init(struct drm_device *dev)
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return -ENOMEM;
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return -ENOMEM;
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hwmon->dev = dev;
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hwmon->dev = dev;
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if (!therm || !therm->temp_get || !therm->attr_get || !therm->attr_set)
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if (!therm || !therm->attr_get || !therm->attr_set)
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return -ENODEV;
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return -ENODEV;
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hwmon_dev = hwmon_device_register(&dev->pdev->dev);
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hwmon_dev = hwmon_device_register(&dev->pdev->dev);
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@ -588,7 +588,7 @@ nouveau_hwmon_init(struct drm_device *dev)
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goto error;
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goto error;
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/* if the card has a working thermal sensor */
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/* if the card has a working thermal sensor */
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if (therm->temp_get(therm) >= 0) {
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if (nvkm_therm_temp_get(therm) >= 0) {
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ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_temp_attrgroup);
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ret = sysfs_create_group(&hwmon_dev->kobj, &hwmon_temp_attrgroup);
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if (ret)
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if (ret)
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goto error;
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goto error;
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}
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}
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/* if the card can read the fan rpm */
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/* if the card can read the fan rpm */
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if (therm->fan_sense(therm) >= 0) {
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if (nvkm_therm_fan_sense(therm) >= 0) {
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ret = sysfs_create_group(&hwmon_dev->kobj,
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ret = sysfs_create_group(&hwmon_dev->kobj,
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&hwmon_fan_rpm_attrgroup);
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&hwmon_fan_rpm_attrgroup);
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if (ret)
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if (ret)
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@ -463,7 +463,7 @@ nv40_chipset = {
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv04_mmu_new,
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.mmu = nv04_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv41_mmu_new,
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.mmu = nv41_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv41_mmu_new,
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.mmu = nv41_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv41_mmu_new,
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.mmu = nv41_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv44_mc_new,
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.mc = nv44_mc_new,
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.mmu = nv44_mmu_new,
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.mmu = nv44_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv04_mmu_new,
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.mmu = nv04_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv44_mc_new,
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.mc = nv44_mc_new,
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.mmu = nv44_mmu_new,
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.mmu = nv44_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv41_mmu_new,
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.mmu = nv41_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv41_mmu_new,
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.mmu = nv41_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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@ -688,7 +688,7 @@ nv4a_chipset = {
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv44_mc_new,
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.mc = nv44_mc_new,
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.mmu = nv44_mmu_new,
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.mmu = nv44_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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@ -713,7 +713,7 @@ nv4b_chipset = {
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv40_mc_new,
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.mc = nv40_mc_new,
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.mmu = nv41_mmu_new,
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.mmu = nv41_mmu_new,
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// .therm = nv40_therm_new,
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.therm = nv40_therm_new,
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// .timer = nv04_timer_new,
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// .timer = nv04_timer_new,
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// .volt = nv40_volt_new,
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// .volt = nv40_volt_new,
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// .disp = nv04_disp_new,
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// .disp = nv04_disp_new,
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@ -738,7 +738,7 @@ nv4c_chipset = {
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.imem = nv40_instmem_new,
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.imem = nv40_instmem_new,
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.mc = nv4c_mc_new,
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.mc = nv4c_mc_new,
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.mmu = nv44_mmu_new,
|
.mmu = nv44_mmu_new,
|
||||||
// .therm = nv40_therm_new,
|
.therm = nv40_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = nv04_disp_new,
|
// .disp = nv04_disp_new,
|
||||||
|
@ -763,7 +763,7 @@ nv4e_chipset = {
|
||||||
.imem = nv40_instmem_new,
|
.imem = nv40_instmem_new,
|
||||||
.mc = nv4c_mc_new,
|
.mc = nv4c_mc_new,
|
||||||
.mmu = nv44_mmu_new,
|
.mmu = nv44_mmu_new,
|
||||||
// .therm = nv40_therm_new,
|
.therm = nv40_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = nv04_disp_new,
|
// .disp = nv04_disp_new,
|
||||||
|
@ -791,7 +791,7 @@ nv50_chipset = {
|
||||||
.mc = nv50_mc_new,
|
.mc = nv50_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = nv50_therm_new,
|
.therm = nv50_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = nv50_disp_new,
|
// .disp = nv50_disp_new,
|
||||||
|
@ -816,7 +816,7 @@ nv63_chipset = {
|
||||||
.imem = nv40_instmem_new,
|
.imem = nv40_instmem_new,
|
||||||
.mc = nv4c_mc_new,
|
.mc = nv4c_mc_new,
|
||||||
.mmu = nv44_mmu_new,
|
.mmu = nv44_mmu_new,
|
||||||
// .therm = nv40_therm_new,
|
.therm = nv40_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = nv04_disp_new,
|
// .disp = nv04_disp_new,
|
||||||
|
@ -841,7 +841,7 @@ nv67_chipset = {
|
||||||
.imem = nv40_instmem_new,
|
.imem = nv40_instmem_new,
|
||||||
.mc = nv4c_mc_new,
|
.mc = nv4c_mc_new,
|
||||||
.mmu = nv44_mmu_new,
|
.mmu = nv44_mmu_new,
|
||||||
// .therm = nv40_therm_new,
|
.therm = nv40_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = nv04_disp_new,
|
// .disp = nv04_disp_new,
|
||||||
|
@ -866,7 +866,7 @@ nv68_chipset = {
|
||||||
.imem = nv40_instmem_new,
|
.imem = nv40_instmem_new,
|
||||||
.mc = nv4c_mc_new,
|
.mc = nv4c_mc_new,
|
||||||
.mmu = nv44_mmu_new,
|
.mmu = nv44_mmu_new,
|
||||||
// .therm = nv40_therm_new,
|
.therm = nv40_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = nv04_disp_new,
|
// .disp = nv04_disp_new,
|
||||||
|
@ -894,7 +894,7 @@ nv84_chipset = {
|
||||||
.mc = nv50_mc_new,
|
.mc = nv50_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .bsp = g84_bsp_new,
|
// .bsp = g84_bsp_new,
|
||||||
|
@ -925,7 +925,7 @@ nv86_chipset = {
|
||||||
.mc = nv50_mc_new,
|
.mc = nv50_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .bsp = g84_bsp_new,
|
// .bsp = g84_bsp_new,
|
||||||
|
@ -956,7 +956,7 @@ nv92_chipset = {
|
||||||
.mc = nv50_mc_new,
|
.mc = nv50_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .bsp = g84_bsp_new,
|
// .bsp = g84_bsp_new,
|
||||||
|
@ -987,7 +987,7 @@ nv94_chipset = {
|
||||||
.mc = g94_mc_new,
|
.mc = g94_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .bsp = g84_bsp_new,
|
// .bsp = g84_bsp_new,
|
||||||
|
@ -1010,7 +1010,7 @@ nv96_chipset = {
|
||||||
.i2c = g94_i2c_new,
|
.i2c = g94_i2c_new,
|
||||||
.fuse = nv50_fuse_new,
|
.fuse = nv50_fuse_new,
|
||||||
.clk = g84_clk_new,
|
.clk = g84_clk_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.devinit = g84_devinit_new,
|
.devinit = g84_devinit_new,
|
||||||
.mc = g94_mc_new,
|
.mc = g94_mc_new,
|
||||||
|
@ -1041,7 +1041,7 @@ nv98_chipset = {
|
||||||
.i2c = g94_i2c_new,
|
.i2c = g94_i2c_new,
|
||||||
.fuse = nv50_fuse_new,
|
.fuse = nv50_fuse_new,
|
||||||
.clk = g84_clk_new,
|
.clk = g84_clk_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.devinit = g98_devinit_new,
|
.devinit = g98_devinit_new,
|
||||||
.mc = g98_mc_new,
|
.mc = g98_mc_new,
|
||||||
|
@ -1080,7 +1080,7 @@ nva0_chipset = {
|
||||||
.mc = g98_mc_new,
|
.mc = g98_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .bsp = g84_bsp_new,
|
// .bsp = g84_bsp_new,
|
||||||
|
@ -1112,7 +1112,7 @@ nva3_chipset = {
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gt215_pmu_new,
|
.pmu = gt215_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gt215_ce_new,
|
// .ce[0] = gt215_ce_new,
|
||||||
|
@ -1145,7 +1145,7 @@ nva5_chipset = {
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gt215_pmu_new,
|
.pmu = gt215_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gt215_ce_new,
|
// .ce[0] = gt215_ce_new,
|
||||||
|
@ -1177,7 +1177,7 @@ nva8_chipset = {
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gt215_pmu_new,
|
.pmu = gt215_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gt215_ce_new,
|
// .ce[0] = gt215_ce_new,
|
||||||
|
@ -1208,7 +1208,7 @@ nvaa_chipset = {
|
||||||
.mc = g98_mc_new,
|
.mc = g98_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = g94_disp_new,
|
// .disp = g94_disp_new,
|
||||||
|
@ -1239,7 +1239,7 @@ nvac_chipset = {
|
||||||
.mc = g98_mc_new,
|
.mc = g98_mc_new,
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = g84_therm_new,
|
.therm = g84_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .disp = g94_disp_new,
|
// .disp = g94_disp_new,
|
||||||
|
@ -1271,7 +1271,7 @@ nvaf_chipset = {
|
||||||
.mmu = nv50_mmu_new,
|
.mmu = nv50_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gt215_pmu_new,
|
.pmu = gt215_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gt215_ce_new,
|
// .ce[0] = gt215_ce_new,
|
||||||
|
@ -1305,7 +1305,7 @@ nvc0_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf100_pmu_new,
|
.pmu = gf100_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1340,7 +1340,7 @@ nvc1_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf100_pmu_new,
|
.pmu = gf100_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1374,7 +1374,7 @@ nvc3_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf100_pmu_new,
|
.pmu = gf100_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1408,7 +1408,7 @@ nvc4_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf100_pmu_new,
|
.pmu = gf100_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1443,7 +1443,7 @@ nvc8_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf100_pmu_new,
|
.pmu = gf100_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1478,7 +1478,7 @@ nvce_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf100_pmu_new,
|
.pmu = gf100_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1513,7 +1513,7 @@ nvcf_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf100_pmu_new,
|
.pmu = gf100_pmu_new,
|
||||||
// .therm = gt215_therm_new,
|
.therm = gt215_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1546,7 +1546,7 @@ nvd7_chipset = {
|
||||||
.mc = gf106_mc_new,
|
.mc = gf106_mc_new,
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
// .disp = gf119_disp_new,
|
// .disp = gf119_disp_new,
|
||||||
|
@ -1579,7 +1579,7 @@ nvd9_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf119_pmu_new,
|
.pmu = gf119_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gf100_ce0_new,
|
// .ce[0] = gf100_ce0_new,
|
||||||
|
@ -1613,7 +1613,7 @@ nve4_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gk104_pmu_new,
|
.pmu = gk104_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
|
@ -1649,7 +1649,7 @@ nve6_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gk104_pmu_new,
|
.pmu = gk104_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
|
@ -1685,7 +1685,7 @@ nve7_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gf119_pmu_new,
|
.pmu = gf119_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
|
@ -1745,7 +1745,7 @@ nvf0_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gk110_pmu_new,
|
.pmu = gk110_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
|
@ -1781,7 +1781,7 @@ nvf1_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gk110_pmu_new,
|
.pmu = gk110_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
|
@ -1817,7 +1817,7 @@ nv106_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gk208_pmu_new,
|
.pmu = gk208_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
|
@ -1852,7 +1852,7 @@ nv108_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gk208_pmu_new,
|
.pmu = gk208_pmu_new,
|
||||||
// .therm = gf110_therm_new,
|
.therm = gf119_therm_new,
|
||||||
// .timer = nv04_timer_new,
|
// .timer = nv04_timer_new,
|
||||||
// .volt = nv40_volt_new,
|
// .volt = nv40_volt_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
|
@ -1887,7 +1887,7 @@ nv117_chipset = {
|
||||||
.mmu = gf100_mmu_new,
|
.mmu = gf100_mmu_new,
|
||||||
.mxm = nv50_mxm_new,
|
.mxm = nv50_mxm_new,
|
||||||
.pmu = gm107_pmu_new,
|
.pmu = gm107_pmu_new,
|
||||||
// .therm = gm107_therm_new,
|
.therm = gm107_therm_new,
|
||||||
// .timer = gk20a_timer_new,
|
// .timer = gk20a_timer_new,
|
||||||
// .ce[0] = gk104_ce0_new,
|
// .ce[0] = gk104_ce0_new,
|
||||||
// .ce[2] = gk104_ce2_new,
|
// .ce[2] = gk104_ce2_new,
|
||||||
|
|
|
@ -28,7 +28,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
{
|
{
|
||||||
switch (device->chipset) {
|
switch (device->chipset) {
|
||||||
case 0xc0:
|
case 0xc0:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
||||||
|
@ -44,7 +43,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xc4:
|
case 0xc4:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
||||||
|
@ -60,7 +58,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xc3:
|
case 0xc3:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
||||||
|
@ -75,7 +72,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xce:
|
case 0xce:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
||||||
|
@ -91,7 +87,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xcf:
|
case 0xcf:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
||||||
|
@ -106,7 +101,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xc1:
|
case 0xc1:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
||||||
|
@ -121,7 +115,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf108_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf108_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xc8:
|
case 0xc8:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf100_dmaeng_oclass;
|
||||||
|
@ -137,7 +130,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf100_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xd9:
|
case 0xd9:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
@ -152,7 +144,6 @@ gf100_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gf117_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xd7:
|
case 0xd7:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
|
device->oclass[NVDEV_ENGINE_FIFO ] = gf100_fifo_oclass;
|
||||||
|
|
|
@ -28,7 +28,6 @@ gk104_identify(struct nvkm_device *device)
|
||||||
{
|
{
|
||||||
switch (device->chipset) {
|
switch (device->chipset) {
|
||||||
case 0xe4:
|
case 0xe4:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
@ -45,7 +44,6 @@ gk104_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xe7:
|
case 0xe7:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
@ -62,7 +60,6 @@ gk104_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gk104_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xe6:
|
case 0xe6:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
@ -89,7 +86,6 @@ gk104_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &gk20a_volt_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xf0:
|
case 0xf0:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
@ -106,7 +102,6 @@ gk104_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xf1:
|
case 0xf1:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
@ -123,7 +118,6 @@ gk104_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = &gk110_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x106:
|
case 0x106:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
@ -139,7 +133,6 @@ gk104_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
|
device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x108:
|
case 0x108:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gf110_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
|
||||||
|
|
|
@ -28,7 +28,6 @@ gm100_identify(struct nvkm_device *device)
|
||||||
{
|
{
|
||||||
switch (device->chipset) {
|
switch (device->chipset) {
|
||||||
case 0x117:
|
case 0x117:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
|
||||||
|
|
||||||
#if 0
|
#if 0
|
||||||
|
@ -54,7 +53,6 @@ gm100_identify(struct nvkm_device *device)
|
||||||
#if 0
|
#if 0
|
||||||
/* looks to be some non-trivial changes */
|
/* looks to be some non-trivial changes */
|
||||||
/* priv ring says no to 0x10eb14 writes */
|
/* priv ring says no to 0x10eb14 writes */
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
|
|
||||||
#endif
|
#endif
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
|
||||||
#if 0
|
#if 0
|
||||||
|
@ -78,7 +76,6 @@ gm100_identify(struct nvkm_device *device)
|
||||||
#if 0
|
#if 0
|
||||||
/* looks to be some non-trivial changes */
|
/* looks to be some non-trivial changes */
|
||||||
/* priv ring says no to 0x10eb14 writes */
|
/* priv ring says no to 0x10eb14 writes */
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
|
|
||||||
#endif
|
#endif
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
|
||||||
#if 0
|
#if 0
|
||||||
|
|
|
@ -28,7 +28,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
{
|
{
|
||||||
switch (device->chipset) {
|
switch (device->chipset) {
|
||||||
case 0x40:
|
case 0x40:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -40,7 +39,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x41:
|
case 0x41:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -52,7 +50,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x42:
|
case 0x42:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -64,7 +61,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x43:
|
case 0x43:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -76,7 +72,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x45:
|
case 0x45:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -88,7 +83,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x47:
|
case 0x47:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -100,7 +94,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x49:
|
case 0x49:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -112,7 +105,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x4b:
|
case 0x4b:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -124,7 +116,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x44:
|
case 0x44:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -136,7 +127,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x46:
|
case 0x46:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -148,7 +138,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x4a:
|
case 0x4a:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -160,7 +149,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x4c:
|
case 0x4c:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -172,7 +160,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x4e:
|
case 0x4e:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -184,7 +171,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x63:
|
case 0x63:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -196,7 +182,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x67:
|
case 0x67:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
@ -208,7 +193,6 @@ nv40_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv40_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x68:
|
case 0x68:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv40_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv04_dmaeng_oclass;
|
||||||
|
|
|
@ -28,7 +28,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
{
|
{
|
||||||
switch (device->chipset) {
|
switch (device->chipset) {
|
||||||
case 0x50:
|
case 0x50:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &nv50_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -40,7 +39,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = nv50_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = nv50_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x84:
|
case 0x84:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -55,7 +53,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x86:
|
case 0x86:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -70,7 +67,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x92:
|
case 0x92:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -85,7 +81,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x94:
|
case 0x94:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -100,7 +95,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x96:
|
case 0x96:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -115,7 +109,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0x98:
|
case 0x98:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -130,7 +123,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xa0:
|
case 0xa0:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -145,7 +137,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gt200_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gt200_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xaa:
|
case 0xaa:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -160,7 +151,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xac:
|
case 0xac:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = &g84_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -175,7 +165,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = g84_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xa3:
|
case 0xa3:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -191,7 +180,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xa5:
|
case 0xa5:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -206,7 +194,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xa8:
|
case 0xa8:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
@ -221,7 +208,6 @@ nv50_identify(struct nvkm_device *device)
|
||||||
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
device->oclass[NVDEV_ENGINE_PM ] = gt215_pm_oclass;
|
||||||
break;
|
break;
|
||||||
case 0xaf:
|
case 0xaf:
|
||||||
device->oclass[NVDEV_SUBDEV_THERM ] = >215_therm_oclass;
|
|
||||||
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass;
|
||||||
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
|
||||||
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
device->oclass[NVDEV_ENGINE_DMAOBJ ] = nv50_dmaeng_oclass;
|
||||||
|
|
|
@ -9,5 +9,5 @@ nvkm-y += nvkm/subdev/therm/nv40.o
|
||||||
nvkm-y += nvkm/subdev/therm/nv50.o
|
nvkm-y += nvkm/subdev/therm/nv50.o
|
||||||
nvkm-y += nvkm/subdev/therm/g84.o
|
nvkm-y += nvkm/subdev/therm/g84.o
|
||||||
nvkm-y += nvkm/subdev/therm/gt215.o
|
nvkm-y += nvkm/subdev/therm/gt215.o
|
||||||
nvkm-y += nvkm/subdev/therm/gf110.o
|
nvkm-y += nvkm/subdev/therm/gf119.o
|
||||||
nvkm-y += nvkm/subdev/therm/gm107.o
|
nvkm-y += nvkm/subdev/therm/gm107.o
|
||||||
|
|
|
@ -23,14 +23,21 @@
|
||||||
*/
|
*/
|
||||||
#include "priv.h"
|
#include "priv.h"
|
||||||
|
|
||||||
static int
|
int
|
||||||
nvkm_therm_update_trip(struct nvkm_therm *obj)
|
nvkm_therm_temp_get(struct nvkm_therm *therm)
|
||||||
|
{
|
||||||
|
if (therm->func->temp_get)
|
||||||
|
return therm->func->temp_get(therm);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int
|
||||||
|
nvkm_therm_update_trip(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvbios_therm_trip_point *trip = therm->fan->bios.trip,
|
struct nvbios_therm_trip_point *trip = therm->fan->bios.trip,
|
||||||
*cur_trip = NULL,
|
*cur_trip = NULL,
|
||||||
*last_trip = therm->last_trip;
|
*last_trip = therm->last_trip;
|
||||||
u8 temp = therm->base.temp_get(&therm->base);
|
u8 temp = therm->func->temp_get(therm);
|
||||||
u16 duty, i;
|
u16 duty, i;
|
||||||
|
|
||||||
/* look for the trip point corresponding to the current temperature */
|
/* look for the trip point corresponding to the current temperature */
|
||||||
|
@ -57,12 +64,11 @@ nvkm_therm_update_trip(struct nvkm_therm *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nvkm_therm_update_linear(struct nvkm_therm *obj)
|
nvkm_therm_update_linear(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
u8 linear_min_temp = therm->fan->bios.linear_min_temp;
|
u8 linear_min_temp = therm->fan->bios.linear_min_temp;
|
||||||
u8 linear_max_temp = therm->fan->bios.linear_max_temp;
|
u8 linear_max_temp = therm->fan->bios.linear_max_temp;
|
||||||
u8 temp = therm->base.temp_get(&therm->base);
|
u8 temp = therm->func->temp_get(therm);
|
||||||
u16 duty;
|
u16 duty;
|
||||||
|
|
||||||
/* handle the non-linear part first */
|
/* handle the non-linear part first */
|
||||||
|
@ -80,10 +86,9 @@ nvkm_therm_update_linear(struct nvkm_therm *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
nvkm_therm_update(struct nvkm_therm *obj, int mode)
|
nvkm_therm_update(struct nvkm_therm *therm, int mode)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
|
||||||
struct nvkm_timer *tmr = subdev->device->timer;
|
struct nvkm_timer *tmr = subdev->device->timer;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
bool immd = true;
|
bool immd = true;
|
||||||
|
@ -98,7 +103,7 @@ nvkm_therm_update(struct nvkm_therm *obj, int mode)
|
||||||
switch (mode) {
|
switch (mode) {
|
||||||
case NVKM_THERM_CTRL_MANUAL:
|
case NVKM_THERM_CTRL_MANUAL:
|
||||||
tmr->alarm_cancel(tmr, &therm->alarm);
|
tmr->alarm_cancel(tmr, &therm->alarm);
|
||||||
duty = nvkm_therm_fan_get(&therm->base);
|
duty = nvkm_therm_fan_get(therm);
|
||||||
if (duty < 0)
|
if (duty < 0)
|
||||||
duty = 100;
|
duty = 100;
|
||||||
poll = false;
|
poll = false;
|
||||||
|
@ -106,10 +111,10 @@ nvkm_therm_update(struct nvkm_therm *obj, int mode)
|
||||||
case NVKM_THERM_CTRL_AUTO:
|
case NVKM_THERM_CTRL_AUTO:
|
||||||
switch(therm->fan->bios.fan_mode) {
|
switch(therm->fan->bios.fan_mode) {
|
||||||
case NVBIOS_THERM_FAN_TRIP:
|
case NVBIOS_THERM_FAN_TRIP:
|
||||||
duty = nvkm_therm_update_trip(&therm->base);
|
duty = nvkm_therm_update_trip(therm);
|
||||||
break;
|
break;
|
||||||
case NVBIOS_THERM_FAN_LINEAR:
|
case NVBIOS_THERM_FAN_LINEAR:
|
||||||
duty = nvkm_therm_update_linear(&therm->base);
|
duty = nvkm_therm_update_linear(therm);
|
||||||
break;
|
break;
|
||||||
case NVBIOS_THERM_FAN_OTHER:
|
case NVBIOS_THERM_FAN_OTHER:
|
||||||
if (therm->cstate)
|
if (therm->cstate)
|
||||||
|
@ -131,20 +136,19 @@ nvkm_therm_update(struct nvkm_therm *obj, int mode)
|
||||||
|
|
||||||
if (duty >= 0) {
|
if (duty >= 0) {
|
||||||
nvkm_debug(subdev, "FAN target request: %d%%\n", duty);
|
nvkm_debug(subdev, "FAN target request: %d%%\n", duty);
|
||||||
nvkm_therm_fan_set(&therm->base, immd, duty);
|
nvkm_therm_fan_set(therm, immd, duty);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_cstate(struct nvkm_therm *obj, int fan, int dir)
|
nvkm_therm_cstate(struct nvkm_therm *therm, int fan, int dir)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
|
||||||
if (!dir || (dir < 0 && fan < therm->cstate) ||
|
if (!dir || (dir < 0 && fan < therm->cstate) ||
|
||||||
(dir > 0 && fan > therm->cstate)) {
|
(dir > 0 && fan > therm->cstate)) {
|
||||||
nvkm_debug(subdev, "default fan speed -> %d%%\n", fan);
|
nvkm_debug(subdev, "default fan speed -> %d%%\n", fan);
|
||||||
therm->cstate = fan;
|
therm->cstate = fan;
|
||||||
nvkm_therm_update(&therm->base, -1);
|
nvkm_therm_update(therm, -1);
|
||||||
}
|
}
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
@ -152,16 +156,15 @@ nvkm_therm_cstate(struct nvkm_therm *obj, int fan, int dir)
|
||||||
static void
|
static void
|
||||||
nvkm_therm_alarm(struct nvkm_alarm *alarm)
|
nvkm_therm_alarm(struct nvkm_alarm *alarm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm =
|
struct nvkm_therm *therm =
|
||||||
container_of(alarm, struct nvkm_therm_priv, alarm);
|
container_of(alarm, struct nvkm_therm, alarm);
|
||||||
nvkm_therm_update(&therm->base, -1);
|
nvkm_therm_update(therm, -1);
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_mode(struct nvkm_therm *obj, int mode)
|
nvkm_therm_fan_mode(struct nvkm_therm *therm, int mode)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
|
||||||
struct nvkm_device *device = subdev->device;
|
struct nvkm_device *device = subdev->device;
|
||||||
static const char *name[] = {
|
static const char *name[] = {
|
||||||
"disabled",
|
"disabled",
|
||||||
|
@ -172,28 +175,26 @@ nvkm_therm_fan_mode(struct nvkm_therm *obj, int mode)
|
||||||
/* The default PPWR ucode on fermi interferes with fan management */
|
/* The default PPWR ucode on fermi interferes with fan management */
|
||||||
if ((mode >= ARRAY_SIZE(name)) ||
|
if ((mode >= ARRAY_SIZE(name)) ||
|
||||||
(mode != NVKM_THERM_CTRL_NONE && device->card_type >= NV_C0 &&
|
(mode != NVKM_THERM_CTRL_NONE && device->card_type >= NV_C0 &&
|
||||||
!nvkm_subdev(device, NVDEV_SUBDEV_PMU)))
|
!device->pmu))
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
/* do not allow automatic fan management if the thermal sensor is
|
/* do not allow automatic fan management if the thermal sensor is
|
||||||
* not available */
|
* not available */
|
||||||
if (mode == NVKM_THERM_CTRL_AUTO &&
|
if (mode == NVKM_THERM_CTRL_AUTO &&
|
||||||
therm->base.temp_get(&therm->base) < 0)
|
therm->func->temp_get(therm) < 0)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
if (therm->mode == mode)
|
if (therm->mode == mode)
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
nvkm_debug(subdev, "fan management: %s\n", name[mode]);
|
nvkm_debug(subdev, "fan management: %s\n", name[mode]);
|
||||||
nvkm_therm_update(&therm->base, mode);
|
nvkm_therm_update(therm, mode);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_attr_get(struct nvkm_therm *obj, enum nvkm_therm_attr_type type)
|
nvkm_therm_attr_get(struct nvkm_therm *therm, enum nvkm_therm_attr_type type)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
|
|
||||||
switch (type) {
|
switch (type) {
|
||||||
case NVKM_THERM_ATTR_FAN_MIN_DUTY:
|
case NVKM_THERM_ATTR_FAN_MIN_DUTY:
|
||||||
return therm->fan->bios.min_duty;
|
return therm->fan->bios.min_duty;
|
||||||
|
@ -223,11 +224,9 @@ nvkm_therm_attr_get(struct nvkm_therm *obj, enum nvkm_therm_attr_type type)
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_attr_set(struct nvkm_therm *obj,
|
nvkm_therm_attr_set(struct nvkm_therm *therm,
|
||||||
enum nvkm_therm_attr_type type, int value)
|
enum nvkm_therm_attr_type type, int value)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
|
|
||||||
switch (type) {
|
switch (type) {
|
||||||
case NVKM_THERM_ATTR_FAN_MIN_DUTY:
|
case NVKM_THERM_ATTR_FAN_MIN_DUTY:
|
||||||
if (value < 0)
|
if (value < 0)
|
||||||
|
@ -244,123 +243,140 @@ nvkm_therm_attr_set(struct nvkm_therm *obj,
|
||||||
therm->fan->bios.max_duty = value;
|
therm->fan->bios.max_duty = value;
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_FAN_MODE:
|
case NVKM_THERM_ATTR_FAN_MODE:
|
||||||
return nvkm_therm_fan_mode(&therm->base, value);
|
return nvkm_therm_fan_mode(therm, value);
|
||||||
case NVKM_THERM_ATTR_THRS_FAN_BOOST:
|
case NVKM_THERM_ATTR_THRS_FAN_BOOST:
|
||||||
therm->bios_sensor.thrs_fan_boost.temp = value;
|
therm->bios_sensor.thrs_fan_boost.temp = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST:
|
case NVKM_THERM_ATTR_THRS_FAN_BOOST_HYST:
|
||||||
therm->bios_sensor.thrs_fan_boost.hysteresis = value;
|
therm->bios_sensor.thrs_fan_boost.hysteresis = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_THRS_DOWN_CLK:
|
case NVKM_THERM_ATTR_THRS_DOWN_CLK:
|
||||||
therm->bios_sensor.thrs_down_clock.temp = value;
|
therm->bios_sensor.thrs_down_clock.temp = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST:
|
case NVKM_THERM_ATTR_THRS_DOWN_CLK_HYST:
|
||||||
therm->bios_sensor.thrs_down_clock.hysteresis = value;
|
therm->bios_sensor.thrs_down_clock.hysteresis = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_THRS_CRITICAL:
|
case NVKM_THERM_ATTR_THRS_CRITICAL:
|
||||||
therm->bios_sensor.thrs_critical.temp = value;
|
therm->bios_sensor.thrs_critical.temp = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_THRS_CRITICAL_HYST:
|
case NVKM_THERM_ATTR_THRS_CRITICAL_HYST:
|
||||||
therm->bios_sensor.thrs_critical.hysteresis = value;
|
therm->bios_sensor.thrs_critical.hysteresis = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_THRS_SHUTDOWN:
|
case NVKM_THERM_ATTR_THRS_SHUTDOWN:
|
||||||
therm->bios_sensor.thrs_shutdown.temp = value;
|
therm->bios_sensor.thrs_shutdown.temp = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
case NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST:
|
case NVKM_THERM_ATTR_THRS_SHUTDOWN_HYST:
|
||||||
therm->bios_sensor.thrs_shutdown.hysteresis = value;
|
therm->bios_sensor.thrs_shutdown.hysteresis = value;
|
||||||
therm->sensor.program_alarms(&therm->base);
|
therm->func->program_alarms(therm);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
static void
|
||||||
_nvkm_therm_init(struct nvkm_object *object)
|
nvkm_therm_intr(struct nvkm_subdev *subdev)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)object;
|
struct nvkm_therm *therm = nvkm_therm(subdev);
|
||||||
int ret;
|
if (therm->func->intr)
|
||||||
|
therm->func->intr(therm);
|
||||||
ret = nvkm_subdev_init_old(&therm->base.subdev);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
if (therm->suspend >= 0) {
|
|
||||||
/* restore the pwm value only when on manual or auto mode */
|
|
||||||
if (therm->suspend > 0)
|
|
||||||
nvkm_therm_fan_set(&therm->base, true, therm->fan->percent);
|
|
||||||
|
|
||||||
nvkm_therm_fan_mode(&therm->base, therm->suspend);
|
|
||||||
}
|
|
||||||
nvkm_therm_sensor_init(&therm->base);
|
|
||||||
nvkm_therm_fan_init(&therm->base);
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
static int
|
||||||
_nvkm_therm_fini(struct nvkm_object *object, bool suspend)
|
nvkm_therm_fini(struct nvkm_subdev *subdev, bool suspend)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)object;
|
struct nvkm_therm *therm = nvkm_therm(subdev);
|
||||||
|
|
||||||
|
if (therm->func->fini)
|
||||||
|
therm->func->fini(therm);
|
||||||
|
|
||||||
|
nvkm_therm_fan_fini(therm, suspend);
|
||||||
|
nvkm_therm_sensor_fini(therm, suspend);
|
||||||
|
|
||||||
nvkm_therm_fan_fini(&therm->base, suspend);
|
|
||||||
nvkm_therm_sensor_fini(&therm->base, suspend);
|
|
||||||
if (suspend) {
|
if (suspend) {
|
||||||
therm->suspend = therm->mode;
|
therm->suspend = therm->mode;
|
||||||
therm->mode = NVKM_THERM_CTRL_NONE;
|
therm->mode = NVKM_THERM_CTRL_NONE;
|
||||||
}
|
}
|
||||||
|
|
||||||
return nvkm_subdev_fini_old(&therm->base.subdev, suspend);
|
|
||||||
}
|
|
||||||
|
|
||||||
int
|
|
||||||
nvkm_therm_create_(struct nvkm_object *parent, struct nvkm_object *engine,
|
|
||||||
struct nvkm_oclass *oclass, int length, void **pobject)
|
|
||||||
{
|
|
||||||
struct nvkm_therm_priv *therm;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_subdev_create_(parent, engine, oclass, 0, "PTHERM",
|
|
||||||
"therm", length, pobject);
|
|
||||||
therm = *pobject;
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
nvkm_alarm_init(&therm->alarm, nvkm_therm_alarm);
|
|
||||||
spin_lock_init(&therm->lock);
|
|
||||||
spin_lock_init(&therm->sensor.alarm_program_lock);
|
|
||||||
|
|
||||||
therm->base.fan_get = nvkm_therm_fan_user_get;
|
|
||||||
therm->base.fan_set = nvkm_therm_fan_user_set;
|
|
||||||
therm->base.fan_sense = nvkm_therm_fan_sense;
|
|
||||||
therm->base.attr_get = nvkm_therm_attr_get;
|
|
||||||
therm->base.attr_set = nvkm_therm_attr_set;
|
|
||||||
therm->mode = therm->suspend = -1; /* undefined */
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
static int
|
||||||
nvkm_therm_preinit(struct nvkm_therm *therm)
|
nvkm_therm_oneinit(struct nvkm_subdev *subdev)
|
||||||
{
|
{
|
||||||
|
struct nvkm_therm *therm = nvkm_therm(subdev);
|
||||||
nvkm_therm_sensor_ctor(therm);
|
nvkm_therm_sensor_ctor(therm);
|
||||||
nvkm_therm_ic_ctor(therm);
|
nvkm_therm_ic_ctor(therm);
|
||||||
nvkm_therm_fan_ctor(therm);
|
nvkm_therm_fan_ctor(therm);
|
||||||
|
|
||||||
nvkm_therm_fan_mode(therm, NVKM_THERM_CTRL_AUTO);
|
nvkm_therm_fan_mode(therm, NVKM_THERM_CTRL_AUTO);
|
||||||
nvkm_therm_sensor_preinit(therm);
|
nvkm_therm_sensor_preinit(therm);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
static int
|
||||||
_nvkm_therm_dtor(struct nvkm_object *object)
|
nvkm_therm_init(struct nvkm_subdev *subdev)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)object;
|
struct nvkm_therm *therm = nvkm_therm(subdev);
|
||||||
kfree(therm->fan);
|
|
||||||
nvkm_subdev_destroy(&therm->base.subdev);
|
therm->func->init(therm);
|
||||||
|
|
||||||
|
if (therm->suspend >= 0) {
|
||||||
|
/* restore the pwm value only when on manual or auto mode */
|
||||||
|
if (therm->suspend > 0)
|
||||||
|
nvkm_therm_fan_set(therm, true, therm->fan->percent);
|
||||||
|
|
||||||
|
nvkm_therm_fan_mode(therm, therm->suspend);
|
||||||
|
}
|
||||||
|
|
||||||
|
nvkm_therm_sensor_init(therm);
|
||||||
|
nvkm_therm_fan_init(therm);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void *
|
||||||
|
nvkm_therm_dtor(struct nvkm_subdev *subdev)
|
||||||
|
{
|
||||||
|
struct nvkm_therm *therm = nvkm_therm(subdev);
|
||||||
|
kfree(therm->fan);
|
||||||
|
return therm;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct nvkm_subdev_func
|
||||||
|
nvkm_therm = {
|
||||||
|
.dtor = nvkm_therm_dtor,
|
||||||
|
.oneinit = nvkm_therm_oneinit,
|
||||||
|
.init = nvkm_therm_init,
|
||||||
|
.fini = nvkm_therm_fini,
|
||||||
|
.intr = nvkm_therm_intr,
|
||||||
|
};
|
||||||
|
|
||||||
|
int
|
||||||
|
nvkm_therm_new_(const struct nvkm_therm_func *func, struct nvkm_device *device,
|
||||||
|
int index, struct nvkm_therm **ptherm)
|
||||||
|
{
|
||||||
|
struct nvkm_therm *therm;
|
||||||
|
|
||||||
|
if (!(therm = *ptherm = kzalloc(sizeof(*therm), GFP_KERNEL)))
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
nvkm_subdev_ctor(&nvkm_therm, device, index, 0, &therm->subdev);
|
||||||
|
therm->func = func;
|
||||||
|
|
||||||
|
nvkm_alarm_init(&therm->alarm, nvkm_therm_alarm);
|
||||||
|
spin_lock_init(&therm->lock);
|
||||||
|
spin_lock_init(&therm->sensor.alarm_program_lock);
|
||||||
|
|
||||||
|
therm->fan_get = nvkm_therm_fan_user_get;
|
||||||
|
therm->fan_set = nvkm_therm_fan_user_set;
|
||||||
|
therm->attr_get = nvkm_therm_attr_get;
|
||||||
|
therm->attr_set = nvkm_therm_attr_set;
|
||||||
|
therm->mode = therm->suspend = -1; /* undefined */
|
||||||
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -31,8 +31,8 @@
|
||||||
static int
|
static int
|
||||||
nvkm_fan_update(struct nvkm_fan *fan, bool immediate, int target)
|
nvkm_fan_update(struct nvkm_fan *fan, bool immediate, int target)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)fan->parent;
|
struct nvkm_therm *therm = fan->parent;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_timer *tmr = subdev->device->timer;
|
struct nvkm_timer *tmr = subdev->device->timer;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
|
@ -50,7 +50,7 @@ nvkm_fan_update(struct nvkm_fan *fan, bool immediate, int target)
|
||||||
}
|
}
|
||||||
|
|
||||||
/* check that we're not already at the target duty cycle */
|
/* check that we're not already at the target duty cycle */
|
||||||
duty = fan->get(&therm->base);
|
duty = fan->get(therm);
|
||||||
if (duty == target) {
|
if (duty == target) {
|
||||||
spin_unlock_irqrestore(&fan->lock, flags);
|
spin_unlock_irqrestore(&fan->lock, flags);
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -71,7 +71,7 @@ nvkm_fan_update(struct nvkm_fan *fan, bool immediate, int target)
|
||||||
}
|
}
|
||||||
|
|
||||||
nvkm_debug(subdev, "FAN update: %d\n", duty);
|
nvkm_debug(subdev, "FAN update: %d\n", duty);
|
||||||
ret = fan->set(&therm->base, duty);
|
ret = fan->set(therm, duty);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
spin_unlock_irqrestore(&fan->lock, flags);
|
spin_unlock_irqrestore(&fan->lock, flags);
|
||||||
return ret;
|
return ret;
|
||||||
|
@ -109,29 +109,29 @@ nvkm_fan_alarm(struct nvkm_alarm *alarm)
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_get(struct nvkm_therm *obj)
|
nvkm_therm_fan_get(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
return therm->fan->get(therm);
|
||||||
return therm->fan->get(&therm->base);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_set(struct nvkm_therm *obj, bool immediate, int percent)
|
nvkm_therm_fan_set(struct nvkm_therm *therm, bool immediate, int percent)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
return nvkm_fan_update(therm->fan, immediate, percent);
|
return nvkm_fan_update(therm->fan, immediate, percent);
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_sense(struct nvkm_therm *obj)
|
nvkm_therm_fan_sense(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
|
||||||
struct nvkm_timer *tmr = device->timer;
|
struct nvkm_timer *tmr = device->timer;
|
||||||
struct nvkm_gpio *gpio = device->gpio;
|
struct nvkm_gpio *gpio = device->gpio;
|
||||||
u32 cycles, cur, prev;
|
u32 cycles, cur, prev;
|
||||||
u64 start, end, tach;
|
u64 start, end, tach;
|
||||||
|
|
||||||
|
if (therm->func->fan_sense)
|
||||||
|
return therm->func->fan_sense(therm);
|
||||||
|
|
||||||
if (therm->fan->tach.func == DCB_GPIO_UNUSED)
|
if (therm->fan->tach.func == DCB_GPIO_UNUSED)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
|
@ -166,28 +166,23 @@ nvkm_therm_fan_sense(struct nvkm_therm *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_user_get(struct nvkm_therm *obj)
|
nvkm_therm_fan_user_get(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
return nvkm_therm_fan_get(therm);
|
||||||
return nvkm_therm_fan_get(&therm->base);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_user_set(struct nvkm_therm *obj, int percent)
|
nvkm_therm_fan_user_set(struct nvkm_therm *therm, int percent)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
|
|
||||||
if (therm->mode != NVKM_THERM_CTRL_MANUAL)
|
if (therm->mode != NVKM_THERM_CTRL_MANUAL)
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
|
|
||||||
return nvkm_therm_fan_set(&therm->base, true, percent);
|
return nvkm_therm_fan_set(therm, true, percent);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
nvkm_therm_fan_set_defaults(struct nvkm_therm *obj)
|
nvkm_therm_fan_set_defaults(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
|
|
||||||
therm->fan->bios.pwm_freq = 0;
|
therm->fan->bios.pwm_freq = 0;
|
||||||
therm->fan->bios.min_duty = 0;
|
therm->fan->bios.min_duty = 0;
|
||||||
therm->fan->bios.max_duty = 100;
|
therm->fan->bios.max_duty = 100;
|
||||||
|
@ -198,10 +193,8 @@ nvkm_therm_fan_set_defaults(struct nvkm_therm *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
nvkm_therm_fan_safety_checks(struct nvkm_therm *obj)
|
nvkm_therm_fan_safety_checks(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
|
|
||||||
if (therm->fan->bios.min_duty > 100)
|
if (therm->fan->bios.min_duty > 100)
|
||||||
therm->fan->bios.min_duty = 100;
|
therm->fan->bios.min_duty = 100;
|
||||||
if (therm->fan->bios.max_duty > 100)
|
if (therm->fan->bios.max_duty > 100)
|
||||||
|
@ -212,27 +205,24 @@ nvkm_therm_fan_safety_checks(struct nvkm_therm *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_init(struct nvkm_therm *obj)
|
nvkm_therm_fan_init(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_fini(struct nvkm_therm *obj, bool suspend)
|
nvkm_therm_fan_fini(struct nvkm_therm *therm, bool suspend)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_timer *tmr = therm->subdev.device->timer;
|
||||||
struct nvkm_timer *tmr = nvkm_timer(therm);
|
|
||||||
|
|
||||||
if (suspend)
|
if (suspend)
|
||||||
tmr->alarm_cancel(tmr, &therm->fan->alarm);
|
tmr->alarm_cancel(tmr, &therm->fan->alarm);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_fan_ctor(struct nvkm_therm *obj)
|
nvkm_therm_fan_ctor(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
|
||||||
struct nvkm_device *device = subdev->device;
|
struct nvkm_device *device = subdev->device;
|
||||||
struct nvkm_gpio *gpio = device->gpio;
|
struct nvkm_gpio *gpio = device->gpio;
|
||||||
struct nvkm_bios *bios = device->bios;
|
struct nvkm_bios *bios = device->bios;
|
||||||
|
@ -247,15 +237,15 @@ nvkm_therm_fan_ctor(struct nvkm_therm *obj)
|
||||||
nvkm_debug(subdev, "GPIO_FAN is in input mode\n");
|
nvkm_debug(subdev, "GPIO_FAN is in input mode\n");
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
} else {
|
} else {
|
||||||
ret = nvkm_fanpwm_create(&therm->base, &func);
|
ret = nvkm_fanpwm_create(therm, &func);
|
||||||
if (ret != 0)
|
if (ret != 0)
|
||||||
ret = nvkm_fantog_create(&therm->base, &func);
|
ret = nvkm_fantog_create(therm, &func);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/* no controllable fan found, create a dummy fan module */
|
/* no controllable fan found, create a dummy fan module */
|
||||||
if (ret != 0) {
|
if (ret != 0) {
|
||||||
ret = nvkm_fannil_create(&therm->base);
|
ret = nvkm_fannil_create(therm);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
@ -263,7 +253,7 @@ nvkm_therm_fan_ctor(struct nvkm_therm *obj)
|
||||||
nvkm_debug(subdev, "FAN control: %s\n", therm->fan->type);
|
nvkm_debug(subdev, "FAN control: %s\n", therm->fan->type);
|
||||||
|
|
||||||
/* read the current speed, it is useful when resuming */
|
/* read the current speed, it is useful when resuming */
|
||||||
therm->fan->percent = nvkm_therm_fan_get(&therm->base);
|
therm->fan->percent = nvkm_therm_fan_get(therm);
|
||||||
|
|
||||||
/* attempt to detect a tachometer connection */
|
/* attempt to detect a tachometer connection */
|
||||||
ret = nvkm_gpio_find(gpio, 0, DCB_GPIO_FAN_SENSE, 0xff,
|
ret = nvkm_gpio_find(gpio, 0, DCB_GPIO_FAN_SENSE, 0xff,
|
||||||
|
@ -272,18 +262,18 @@ nvkm_therm_fan_ctor(struct nvkm_therm *obj)
|
||||||
therm->fan->tach.func = DCB_GPIO_UNUSED;
|
therm->fan->tach.func = DCB_GPIO_UNUSED;
|
||||||
|
|
||||||
/* initialise fan bump/slow update handling */
|
/* initialise fan bump/slow update handling */
|
||||||
therm->fan->parent = &therm->base;
|
therm->fan->parent = therm;
|
||||||
nvkm_alarm_init(&therm->fan->alarm, nvkm_fan_alarm);
|
nvkm_alarm_init(&therm->fan->alarm, nvkm_fan_alarm);
|
||||||
spin_lock_init(&therm->fan->lock);
|
spin_lock_init(&therm->fan->lock);
|
||||||
|
|
||||||
/* other random init... */
|
/* other random init... */
|
||||||
nvkm_therm_fan_set_defaults(&therm->base);
|
nvkm_therm_fan_set_defaults(therm);
|
||||||
nvbios_perf_fan_parse(bios, &therm->fan->perf);
|
nvbios_perf_fan_parse(bios, &therm->fan->perf);
|
||||||
if (!nvbios_fan_parse(bios, &therm->fan->bios)) {
|
if (!nvbios_fan_parse(bios, &therm->fan->bios)) {
|
||||||
nvkm_debug(subdev, "parsing the fan table failed\n");
|
nvkm_debug(subdev, "parsing the fan table failed\n");
|
||||||
if (nvbios_therm_fan_parse(bios, &therm->fan->bios))
|
if (nvbios_therm_fan_parse(bios, &therm->fan->bios))
|
||||||
nvkm_error(subdev, "parsing both fan tables failed\n");
|
nvkm_error(subdev, "parsing both fan tables failed\n");
|
||||||
}
|
}
|
||||||
nvkm_therm_fan_safety_checks(&therm->base);
|
nvkm_therm_fan_safety_checks(therm);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
|
@ -36,9 +36,8 @@ nvkm_fannil_set(struct nvkm_therm *therm, int percent)
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_fannil_create(struct nvkm_therm *obj)
|
nvkm_fannil_create(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvkm_fan *priv;
|
struct nvkm_fan *priv;
|
||||||
|
|
||||||
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
priv = kzalloc(sizeof(*priv), GFP_KERNEL);
|
||||||
|
|
|
@ -35,17 +35,16 @@ struct nvkm_fanpwm {
|
||||||
};
|
};
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nvkm_fanpwm_get(struct nvkm_therm *obj)
|
nvkm_fanpwm_get(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvkm_fanpwm *fan = (void *)therm->fan;
|
struct nvkm_fanpwm *fan = (void *)therm->fan;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_gpio *gpio = device->gpio;
|
struct nvkm_gpio *gpio = device->gpio;
|
||||||
int card_type = device->card_type;
|
int card_type = device->card_type;
|
||||||
u32 divs, duty;
|
u32 divs, duty;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ret = therm->base.pwm_get(&therm->base, fan->func.line, &divs, &duty);
|
ret = therm->func->pwm_get(therm, fan->func.line, &divs, &duty);
|
||||||
if (ret == 0 && divs) {
|
if (ret == 0 && divs) {
|
||||||
divs = max(divs, duty);
|
divs = max(divs, duty);
|
||||||
if (card_type <= NV_40 || (fan->func.log[0] & 1))
|
if (card_type <= NV_40 || (fan->func.log[0] & 1))
|
||||||
|
@ -57,20 +56,18 @@ nvkm_fanpwm_get(struct nvkm_therm *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nvkm_fanpwm_set(struct nvkm_therm *obj, int percent)
|
nvkm_fanpwm_set(struct nvkm_therm *therm, int percent)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvkm_fanpwm *fan = (void *)therm->fan;
|
struct nvkm_fanpwm *fan = (void *)therm->fan;
|
||||||
int card_type = nv_device(therm)->card_type;
|
int card_type = therm->subdev.device->card_type;
|
||||||
u32 divs, duty;
|
u32 divs, duty;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
divs = fan->base.perf.pwm_divisor;
|
divs = fan->base.perf.pwm_divisor;
|
||||||
if (fan->base.bios.pwm_freq) {
|
if (fan->base.bios.pwm_freq) {
|
||||||
divs = 1;
|
divs = 1;
|
||||||
if (therm->base.pwm_clock)
|
if (therm->func->pwm_clock)
|
||||||
divs = therm->base.pwm_clock(&therm->base,
|
divs = therm->func->pwm_clock(therm, fan->func.line);
|
||||||
fan->func.line);
|
|
||||||
divs /= fan->base.bios.pwm_freq;
|
divs /= fan->base.bios.pwm_freq;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -78,27 +75,26 @@ nvkm_fanpwm_set(struct nvkm_therm *obj, int percent)
|
||||||
if (card_type <= NV_40 || (fan->func.log[0] & 1))
|
if (card_type <= NV_40 || (fan->func.log[0] & 1))
|
||||||
duty = divs - duty;
|
duty = divs - duty;
|
||||||
|
|
||||||
ret = therm->base.pwm_set(&therm->base, fan->func.line, divs, duty);
|
ret = therm->func->pwm_set(therm, fan->func.line, divs, duty);
|
||||||
if (ret == 0)
|
if (ret == 0)
|
||||||
ret = therm->base.pwm_ctrl(&therm->base, fan->func.line, true);
|
ret = therm->func->pwm_ctrl(therm, fan->func.line, true);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_fanpwm_create(struct nvkm_therm *obj, struct dcb_gpio_func *func)
|
nvkm_fanpwm_create(struct nvkm_therm *therm, struct dcb_gpio_func *func)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
|
||||||
struct nvkm_bios *bios = device->bios;
|
struct nvkm_bios *bios = device->bios;
|
||||||
struct nvkm_fanpwm *fan;
|
struct nvkm_fanpwm *fan;
|
||||||
struct nvbios_therm_fan info;
|
struct nvbios_therm_fan info = {};
|
||||||
u32 divs, duty;
|
u32 divs, duty;
|
||||||
|
|
||||||
nvbios_fan_parse(bios, &info);
|
nvbios_fan_parse(bios, &info);
|
||||||
|
|
||||||
if (!nvkm_boolopt(device->cfgopt, "NvFanPWM", func->param) ||
|
if (!nvkm_boolopt(device->cfgopt, "NvFanPWM", func->param) ||
|
||||||
!therm->base.pwm_ctrl || info.type == NVBIOS_THERM_FAN_TOGGLE ||
|
!therm->func->pwm_ctrl || info.type == NVBIOS_THERM_FAN_TOGGLE ||
|
||||||
therm->base.pwm_get(&therm->base, func->line, &divs, &duty) == -ENODEV)
|
therm->func->pwm_get(therm, func->line, &divs, &duty) == -ENODEV)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
||||||
fan = kzalloc(sizeof(*fan), GFP_KERNEL);
|
fan = kzalloc(sizeof(*fan), GFP_KERNEL);
|
||||||
|
|
|
@ -38,8 +38,8 @@ struct nvkm_fantog {
|
||||||
static void
|
static void
|
||||||
nvkm_fantog_update(struct nvkm_fantog *fan, int percent)
|
nvkm_fantog_update(struct nvkm_fantog *fan, int percent)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)fan->base.parent;
|
struct nvkm_therm *therm = fan->base.parent;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_timer *tmr = device->timer;
|
struct nvkm_timer *tmr = device->timer;
|
||||||
struct nvkm_gpio *gpio = device->gpio;
|
struct nvkm_gpio *gpio = device->gpio;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
@ -71,33 +71,30 @@ nvkm_fantog_alarm(struct nvkm_alarm *alarm)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nvkm_fantog_get(struct nvkm_therm *obj)
|
nvkm_fantog_get(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvkm_fantog *fan = (void *)therm->fan;
|
struct nvkm_fantog *fan = (void *)therm->fan;
|
||||||
return fan->percent;
|
return fan->percent;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nvkm_fantog_set(struct nvkm_therm *obj, int percent)
|
nvkm_fantog_set(struct nvkm_therm *therm, int percent)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvkm_fantog *fan = (void *)therm->fan;
|
struct nvkm_fantog *fan = (void *)therm->fan;
|
||||||
if (therm->base.pwm_ctrl)
|
if (therm->func->pwm_ctrl)
|
||||||
therm->base.pwm_ctrl(&therm->base, fan->func.line, false);
|
therm->func->pwm_ctrl(therm, fan->func.line, false);
|
||||||
nvkm_fantog_update(fan, percent);
|
nvkm_fantog_update(fan, percent);
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_fantog_create(struct nvkm_therm *obj, struct dcb_gpio_func *func)
|
nvkm_fantog_create(struct nvkm_therm *therm, struct dcb_gpio_func *func)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvkm_fantog *fan;
|
struct nvkm_fantog *fan;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
if (therm->base.pwm_ctrl) {
|
if (therm->func->pwm_ctrl) {
|
||||||
ret = therm->base.pwm_ctrl(&therm->base, func->line, false);
|
ret = therm->func->pwm_ctrl(therm, func->line, false);
|
||||||
if (ret)
|
if (ret)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
@ -51,11 +51,10 @@ g84_sensor_setup(struct nvkm_therm *therm)
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
g84_therm_program_alarms(struct nvkm_therm *obj)
|
g84_therm_program_alarms(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_device *device = subdev->device;
|
struct nvkm_device *device = subdev->device;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
|
@ -116,7 +115,7 @@ g84_therm_threshold_hyst_emulation(struct nvkm_therm *therm,
|
||||||
}
|
}
|
||||||
|
|
||||||
/* fix the state (in case someone reprogrammed the alarms) */
|
/* fix the state (in case someone reprogrammed the alarms) */
|
||||||
cur = therm->temp_get(therm);
|
cur = therm->func->temp_get(therm);
|
||||||
if (new_state == NVKM_THERM_THRS_LOWER && cur > thrs->temp)
|
if (new_state == NVKM_THERM_THRS_LOWER && cur > thrs->temp)
|
||||||
new_state = NVKM_THERM_THRS_HIGHER;
|
new_state = NVKM_THERM_THRS_HIGHER;
|
||||||
else if (new_state == NVKM_THERM_THRS_HIGHER &&
|
else if (new_state == NVKM_THERM_THRS_HIGHER &&
|
||||||
|
@ -137,10 +136,10 @@ g84_therm_threshold_hyst_emulation(struct nvkm_therm *therm,
|
||||||
}
|
}
|
||||||
|
|
||||||
static void
|
static void
|
||||||
g84_therm_intr(struct nvkm_subdev *subdev)
|
g84_therm_intr(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)subdev;
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
struct nvkm_device *device = subdev->device;
|
||||||
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
uint32_t intr;
|
uint32_t intr;
|
||||||
|
@ -151,7 +150,7 @@ g84_therm_intr(struct nvkm_subdev *subdev)
|
||||||
|
|
||||||
/* THRS_4: downclock */
|
/* THRS_4: downclock */
|
||||||
if (intr & 0x002) {
|
if (intr & 0x002) {
|
||||||
g84_therm_threshold_hyst_emulation(&therm->base, 0x20414, 24,
|
g84_therm_threshold_hyst_emulation(therm, 0x20414, 24,
|
||||||
&sensor->thrs_down_clock,
|
&sensor->thrs_down_clock,
|
||||||
NVKM_THERM_THRS_DOWNCLOCK);
|
NVKM_THERM_THRS_DOWNCLOCK);
|
||||||
intr &= ~0x002;
|
intr &= ~0x002;
|
||||||
|
@ -159,7 +158,7 @@ g84_therm_intr(struct nvkm_subdev *subdev)
|
||||||
|
|
||||||
/* shutdown */
|
/* shutdown */
|
||||||
if (intr & 0x004) {
|
if (intr & 0x004) {
|
||||||
g84_therm_threshold_hyst_emulation(&therm->base, 0x20480, 20,
|
g84_therm_threshold_hyst_emulation(therm, 0x20480, 20,
|
||||||
&sensor->thrs_shutdown,
|
&sensor->thrs_shutdown,
|
||||||
NVKM_THERM_THRS_SHUTDOWN);
|
NVKM_THERM_THRS_SHUTDOWN);
|
||||||
intr &= ~0x004;
|
intr &= ~0x004;
|
||||||
|
@ -167,7 +166,7 @@ g84_therm_intr(struct nvkm_subdev *subdev)
|
||||||
|
|
||||||
/* THRS_1 : fan boost */
|
/* THRS_1 : fan boost */
|
||||||
if (intr & 0x008) {
|
if (intr & 0x008) {
|
||||||
g84_therm_threshold_hyst_emulation(&therm->base, 0x204c4, 21,
|
g84_therm_threshold_hyst_emulation(therm, 0x204c4, 21,
|
||||||
&sensor->thrs_fan_boost,
|
&sensor->thrs_fan_boost,
|
||||||
NVKM_THERM_THRS_FANBOOST);
|
NVKM_THERM_THRS_FANBOOST);
|
||||||
intr &= ~0x008;
|
intr &= ~0x008;
|
||||||
|
@ -175,7 +174,7 @@ g84_therm_intr(struct nvkm_subdev *subdev)
|
||||||
|
|
||||||
/* THRS_2 : critical */
|
/* THRS_2 : critical */
|
||||||
if (intr & 0x010) {
|
if (intr & 0x010) {
|
||||||
g84_therm_threshold_hyst_emulation(&therm->base, 0x204c0, 22,
|
g84_therm_threshold_hyst_emulation(therm, 0x204c0, 22,
|
||||||
&sensor->thrs_critical,
|
&sensor->thrs_critical,
|
||||||
NVKM_THERM_THRS_CRITICAL);
|
NVKM_THERM_THRS_CRITICAL);
|
||||||
intr &= ~0x010;
|
intr &= ~0x010;
|
||||||
|
@ -191,62 +190,9 @@ g84_therm_intr(struct nvkm_subdev *subdev)
|
||||||
spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
|
spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
void
|
||||||
g84_therm_init(struct nvkm_object *object)
|
g84_therm_fini(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)object;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_init(&therm->base);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
g84_sensor_setup(&therm->base);
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
|
|
||||||
static int
|
|
||||||
g84_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
|
||||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
|
||||||
struct nvkm_object **pobject)
|
|
||||||
{
|
|
||||||
struct nvkm_therm_priv *therm;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_create(parent, engine, oclass, &therm);
|
|
||||||
*pobject = nv_object(therm);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
therm->base.pwm_ctrl = nv50_fan_pwm_ctrl;
|
|
||||||
therm->base.pwm_get = nv50_fan_pwm_get;
|
|
||||||
therm->base.pwm_set = nv50_fan_pwm_set;
|
|
||||||
therm->base.pwm_clock = nv50_fan_pwm_clock;
|
|
||||||
therm->base.temp_get = g84_temp_get;
|
|
||||||
therm->sensor.program_alarms = g84_therm_program_alarms;
|
|
||||||
nv_subdev(therm)->intr = g84_therm_intr;
|
|
||||||
|
|
||||||
/* init the thresholds */
|
|
||||||
nvkm_therm_sensor_set_threshold_state(&therm->base,
|
|
||||||
NVKM_THERM_THRS_SHUTDOWN,
|
|
||||||
NVKM_THERM_THRS_LOWER);
|
|
||||||
nvkm_therm_sensor_set_threshold_state(&therm->base,
|
|
||||||
NVKM_THERM_THRS_FANBOOST,
|
|
||||||
NVKM_THERM_THRS_LOWER);
|
|
||||||
nvkm_therm_sensor_set_threshold_state(&therm->base,
|
|
||||||
NVKM_THERM_THRS_CRITICAL,
|
|
||||||
NVKM_THERM_THRS_LOWER);
|
|
||||||
nvkm_therm_sensor_set_threshold_state(&therm->base,
|
|
||||||
NVKM_THERM_THRS_DOWNCLOCK,
|
|
||||||
NVKM_THERM_THRS_LOWER);
|
|
||||||
|
|
||||||
return nvkm_therm_preinit(&therm->base);
|
|
||||||
}
|
|
||||||
|
|
||||||
int
|
|
||||||
g84_therm_fini(struct nvkm_object *object, bool suspend)
|
|
||||||
{
|
|
||||||
struct nvkm_therm *therm = (void *)object;
|
|
||||||
struct nvkm_device *device = therm->subdev.device;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
|
|
||||||
/* Disable PTherm IRQs */
|
/* Disable PTherm IRQs */
|
||||||
|
@ -255,17 +201,46 @@ g84_therm_fini(struct nvkm_object *object, bool suspend)
|
||||||
/* ACK all PTherm IRQs */
|
/* ACK all PTherm IRQs */
|
||||||
nvkm_wr32(device, 0x20100, 0xffffffff);
|
nvkm_wr32(device, 0x20100, 0xffffffff);
|
||||||
nvkm_wr32(device, 0x1100, 0x10000); /* PBUS */
|
nvkm_wr32(device, 0x1100, 0x10000); /* PBUS */
|
||||||
|
|
||||||
return _nvkm_therm_fini(object, suspend);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
struct nvkm_oclass
|
static void
|
||||||
g84_therm_oclass = {
|
g84_therm_init(struct nvkm_therm *therm)
|
||||||
.handle = NV_SUBDEV(THERM, 0x84),
|
{
|
||||||
.ofuncs = &(struct nvkm_ofuncs) {
|
g84_sensor_setup(therm);
|
||||||
.ctor = g84_therm_ctor,
|
}
|
||||||
.dtor = _nvkm_therm_dtor,
|
|
||||||
|
static const struct nvkm_therm_func
|
||||||
|
g84_therm = {
|
||||||
.init = g84_therm_init,
|
.init = g84_therm_init,
|
||||||
.fini = g84_therm_fini,
|
.fini = g84_therm_fini,
|
||||||
},
|
.intr = g84_therm_intr,
|
||||||
|
.pwm_ctrl = nv50_fan_pwm_ctrl,
|
||||||
|
.pwm_get = nv50_fan_pwm_get,
|
||||||
|
.pwm_set = nv50_fan_pwm_set,
|
||||||
|
.pwm_clock = nv50_fan_pwm_clock,
|
||||||
|
.temp_get = g84_temp_get,
|
||||||
|
.program_alarms = g84_therm_program_alarms,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
int
|
||||||
|
g84_therm_new(struct nvkm_device *device, int index, struct nvkm_therm **ptherm)
|
||||||
|
{
|
||||||
|
struct nvkm_therm *therm;
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
ret = nvkm_therm_new_(&g84_therm, device, index, &therm);
|
||||||
|
*ptherm = therm;
|
||||||
|
if (ret)
|
||||||
|
return ret;
|
||||||
|
|
||||||
|
/* init the thresholds */
|
||||||
|
nvkm_therm_sensor_set_threshold_state(therm, NVKM_THERM_THRS_SHUTDOWN,
|
||||||
|
NVKM_THERM_THRS_LOWER);
|
||||||
|
nvkm_therm_sensor_set_threshold_state(therm, NVKM_THERM_THRS_FANBOOST,
|
||||||
|
NVKM_THERM_THRS_LOWER);
|
||||||
|
nvkm_therm_sensor_set_threshold_state(therm, NVKM_THERM_THRS_CRITICAL,
|
||||||
|
NVKM_THERM_THRS_LOWER);
|
||||||
|
nvkm_therm_sensor_set_threshold_state(therm, NVKM_THERM_THRS_DOWNCLOCK,
|
||||||
|
NVKM_THERM_THRS_LOWER);
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
|
@ -50,7 +50,7 @@ pwm_info(struct nvkm_therm *therm, int line)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
gf110_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
|
gf119_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
|
||||||
{
|
{
|
||||||
struct nvkm_device *device = therm->subdev.device;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
u32 data = enable ? 0x00000040 : 0x00000000;
|
u32 data = enable ? 0x00000040 : 0x00000000;
|
||||||
|
@ -64,7 +64,7 @@ gf110_fan_pwm_ctrl(struct nvkm_therm *therm, int line, bool enable)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
gf110_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
|
gf119_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
|
||||||
{
|
{
|
||||||
struct nvkm_device *device = therm->subdev.device;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
int indx = pwm_info(therm, line);
|
int indx = pwm_info(therm, line);
|
||||||
|
@ -86,7 +86,7 @@ gf110_fan_pwm_get(struct nvkm_therm *therm, int line, u32 *divs, u32 *duty)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
gf110_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
|
gf119_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
|
||||||
{
|
{
|
||||||
struct nvkm_device *device = therm->subdev.device;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
int indx = pwm_info(therm, line);
|
int indx = pwm_info(therm, line);
|
||||||
|
@ -103,7 +103,7 @@ gf110_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
gf110_fan_pwm_clock(struct nvkm_therm *therm, int line)
|
gf119_fan_pwm_clock(struct nvkm_therm *therm, int line)
|
||||||
{
|
{
|
||||||
struct nvkm_device *device = therm->subdev.device;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
int indx = pwm_info(therm, line);
|
int indx = pwm_info(therm, line);
|
||||||
|
@ -115,61 +115,39 @@ gf110_fan_pwm_clock(struct nvkm_therm *therm, int line)
|
||||||
return device->crystal * 1000 / 10;
|
return device->crystal * 1000 / 10;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
void
|
||||||
gf110_therm_init(struct nvkm_object *object)
|
gf119_therm_init(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)object;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_init(&therm->base);
|
g84_sensor_setup(therm);
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
/* enable fan tach, count revolutions per-second */
|
/* enable fan tach, count revolutions per-second */
|
||||||
nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);
|
nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);
|
||||||
if (therm->fan->tach.func != DCB_GPIO_UNUSED) {
|
if (therm->fan->tach.func != DCB_GPIO_UNUSED) {
|
||||||
nvkm_mask(device, 0x00d79c, 0x000000ff, therm->fan->tach.line);
|
nvkm_mask(device, 0x00d79c, 0x000000ff, therm->fan->tach.line);
|
||||||
nvkm_wr32(device, 0x00e724, nv_device(therm)->crystal * 1000);
|
nvkm_wr32(device, 0x00e724, device->crystal * 1000);
|
||||||
nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);
|
nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);
|
||||||
}
|
}
|
||||||
nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);
|
nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static const struct nvkm_therm_func
|
||||||
gf110_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
gf119_therm = {
|
||||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
.init = gf119_therm_init,
|
||||||
struct nvkm_object **pobject)
|
|
||||||
{
|
|
||||||
struct nvkm_therm_priv *therm;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_create(parent, engine, oclass, &therm);
|
|
||||||
*pobject = nv_object(therm);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
g84_sensor_setup(&therm->base);
|
|
||||||
|
|
||||||
therm->base.pwm_ctrl = gf110_fan_pwm_ctrl;
|
|
||||||
therm->base.pwm_get = gf110_fan_pwm_get;
|
|
||||||
therm->base.pwm_set = gf110_fan_pwm_set;
|
|
||||||
therm->base.pwm_clock = gf110_fan_pwm_clock;
|
|
||||||
therm->base.temp_get = g84_temp_get;
|
|
||||||
therm->base.fan_sense = gt215_therm_fan_sense;
|
|
||||||
therm->sensor.program_alarms = nvkm_therm_program_alarms_polling;
|
|
||||||
return nvkm_therm_preinit(&therm->base);
|
|
||||||
}
|
|
||||||
|
|
||||||
struct nvkm_oclass
|
|
||||||
gf110_therm_oclass = {
|
|
||||||
.handle = NV_SUBDEV(THERM, 0xd0),
|
|
||||||
.ofuncs = &(struct nvkm_ofuncs) {
|
|
||||||
.ctor = gf110_therm_ctor,
|
|
||||||
.dtor = _nvkm_therm_dtor,
|
|
||||||
.init = gf110_therm_init,
|
|
||||||
.fini = g84_therm_fini,
|
.fini = g84_therm_fini,
|
||||||
},
|
.pwm_ctrl = gf119_fan_pwm_ctrl,
|
||||||
|
.pwm_get = gf119_fan_pwm_get,
|
||||||
|
.pwm_set = gf119_fan_pwm_set,
|
||||||
|
.pwm_clock = gf119_fan_pwm_clock,
|
||||||
|
.temp_get = g84_temp_get,
|
||||||
|
.fan_sense = gt215_therm_fan_sense,
|
||||||
|
.program_alarms = nvkm_therm_program_alarms_polling,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
int
|
||||||
|
gf119_therm_new(struct nvkm_device *device, int index,
|
||||||
|
struct nvkm_therm **ptherm)
|
||||||
|
{
|
||||||
|
return nvkm_therm_new_(&gf119_therm, device, index, ptherm);
|
||||||
|
}
|
|
@ -54,36 +54,22 @@ gm107_fan_pwm_clock(struct nvkm_therm *therm, int line)
|
||||||
return therm->subdev.device->crystal * 1000;
|
return therm->subdev.device->crystal * 1000;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static const struct nvkm_therm_func
|
||||||
gm107_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
gm107_therm = {
|
||||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
.init = gf119_therm_init,
|
||||||
struct nvkm_object **pobject)
|
|
||||||
{
|
|
||||||
struct nvkm_therm_priv *therm;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_create(parent, engine, oclass, &therm);
|
|
||||||
*pobject = nv_object(therm);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
therm->base.pwm_ctrl = gm107_fan_pwm_ctrl;
|
|
||||||
therm->base.pwm_get = gm107_fan_pwm_get;
|
|
||||||
therm->base.pwm_set = gm107_fan_pwm_set;
|
|
||||||
therm->base.pwm_clock = gm107_fan_pwm_clock;
|
|
||||||
therm->base.temp_get = g84_temp_get;
|
|
||||||
therm->base.fan_sense = gt215_therm_fan_sense;
|
|
||||||
therm->sensor.program_alarms = nvkm_therm_program_alarms_polling;
|
|
||||||
return nvkm_therm_preinit(&therm->base);
|
|
||||||
}
|
|
||||||
|
|
||||||
struct nvkm_oclass
|
|
||||||
gm107_therm_oclass = {
|
|
||||||
.handle = NV_SUBDEV(THERM, 0x117),
|
|
||||||
.ofuncs = &(struct nvkm_ofuncs) {
|
|
||||||
.ctor = gm107_therm_ctor,
|
|
||||||
.dtor = _nvkm_therm_dtor,
|
|
||||||
.init = gf110_therm_init,
|
|
||||||
.fini = g84_therm_fini,
|
.fini = g84_therm_fini,
|
||||||
},
|
.pwm_ctrl = gm107_fan_pwm_ctrl,
|
||||||
|
.pwm_get = gm107_fan_pwm_get,
|
||||||
|
.pwm_set = gm107_fan_pwm_set,
|
||||||
|
.pwm_clock = gm107_fan_pwm_clock,
|
||||||
|
.temp_get = g84_temp_get,
|
||||||
|
.fan_sense = gt215_therm_fan_sense,
|
||||||
|
.program_alarms = nvkm_therm_program_alarms_polling,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
int
|
||||||
|
gm107_therm_new(struct nvkm_device *device, int index,
|
||||||
|
struct nvkm_therm **ptherm)
|
||||||
|
{
|
||||||
|
return nvkm_therm_new_(&gm107_therm, device, index, ptherm);
|
||||||
|
}
|
||||||
|
|
|
@ -36,62 +36,40 @@ gt215_therm_fan_sense(struct nvkm_therm *therm)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static void
|
||||||
gt215_therm_init(struct nvkm_object *object)
|
gt215_therm_init(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = (void *)object;
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
|
||||||
struct dcb_gpio_func *tach = &therm->fan->tach;
|
struct dcb_gpio_func *tach = &therm->fan->tach;
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_init(&therm->base);
|
g84_sensor_setup(therm);
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
g84_sensor_setup(&therm->base);
|
|
||||||
|
|
||||||
/* enable fan tach, count revolutions per-second */
|
/* enable fan tach, count revolutions per-second */
|
||||||
nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);
|
nvkm_mask(device, 0x00e720, 0x00000003, 0x00000002);
|
||||||
if (tach->func != DCB_GPIO_UNUSED) {
|
if (tach->func != DCB_GPIO_UNUSED) {
|
||||||
nvkm_wr32(device, 0x00e724, nv_device(therm)->crystal * 1000);
|
nvkm_wr32(device, 0x00e724, device->crystal * 1000);
|
||||||
nvkm_mask(device, 0x00e720, 0x001f0000, tach->line << 16);
|
nvkm_mask(device, 0x00e720, 0x001f0000, tach->line << 16);
|
||||||
nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);
|
nvkm_mask(device, 0x00e720, 0x00000001, 0x00000001);
|
||||||
}
|
}
|
||||||
nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);
|
nvkm_mask(device, 0x00e720, 0x00000002, 0x00000000);
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static const struct nvkm_therm_func
|
||||||
gt215_therm_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
gt215_therm = {
|
||||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
|
||||||
struct nvkm_object **pobject)
|
|
||||||
{
|
|
||||||
struct nvkm_therm_priv *therm;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_create(parent, engine, oclass, &therm);
|
|
||||||
*pobject = nv_object(therm);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
therm->base.pwm_ctrl = nv50_fan_pwm_ctrl;
|
|
||||||
therm->base.pwm_get = nv50_fan_pwm_get;
|
|
||||||
therm->base.pwm_set = nv50_fan_pwm_set;
|
|
||||||
therm->base.pwm_clock = nv50_fan_pwm_clock;
|
|
||||||
therm->base.temp_get = g84_temp_get;
|
|
||||||
therm->base.fan_sense = gt215_therm_fan_sense;
|
|
||||||
therm->sensor.program_alarms = nvkm_therm_program_alarms_polling;
|
|
||||||
return nvkm_therm_preinit(&therm->base);
|
|
||||||
}
|
|
||||||
|
|
||||||
struct nvkm_oclass
|
|
||||||
gt215_therm_oclass = {
|
|
||||||
.handle = NV_SUBDEV(THERM, 0xa3),
|
|
||||||
.ofuncs = &(struct nvkm_ofuncs) {
|
|
||||||
.ctor = gt215_therm_ctor,
|
|
||||||
.dtor = _nvkm_therm_dtor,
|
|
||||||
.init = gt215_therm_init,
|
.init = gt215_therm_init,
|
||||||
.fini = g84_therm_fini,
|
.fini = g84_therm_fini,
|
||||||
},
|
.pwm_ctrl = nv50_fan_pwm_ctrl,
|
||||||
|
.pwm_get = nv50_fan_pwm_get,
|
||||||
|
.pwm_set = nv50_fan_pwm_set,
|
||||||
|
.pwm_clock = nv50_fan_pwm_clock,
|
||||||
|
.temp_get = g84_temp_get,
|
||||||
|
.fan_sense = gt215_therm_fan_sense,
|
||||||
|
.program_alarms = nvkm_therm_program_alarms_polling,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
int
|
||||||
|
gt215_therm_new(struct nvkm_device *device, int index,
|
||||||
|
struct nvkm_therm **ptherm)
|
||||||
|
{
|
||||||
|
return nvkm_therm_new_(>215_therm, device, index, ptherm);
|
||||||
|
}
|
||||||
|
|
|
@ -30,7 +30,7 @@ static bool
|
||||||
probe_monitoring_device(struct nvkm_i2c_bus *bus,
|
probe_monitoring_device(struct nvkm_i2c_bus *bus,
|
||||||
struct i2c_board_info *info, void *data)
|
struct i2c_board_info *info, void *data)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = data;
|
struct nvkm_therm *therm = data;
|
||||||
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
||||||
struct i2c_client *client;
|
struct i2c_client *client;
|
||||||
|
|
||||||
|
@ -46,7 +46,7 @@ probe_monitoring_device(struct nvkm_i2c_bus *bus,
|
||||||
return false;
|
return false;
|
||||||
}
|
}
|
||||||
|
|
||||||
nvkm_debug(&therm->base.subdev,
|
nvkm_debug(&therm->subdev,
|
||||||
"Found an %s at address 0x%x (controlled by lm_sensors, "
|
"Found an %s at address 0x%x (controlled by lm_sensors, "
|
||||||
"temp offset %+i C)\n",
|
"temp offset %+i C)\n",
|
||||||
info->type, info->addr, sensor->offset_constant);
|
info->type, info->addr, sensor->offset_constant);
|
||||||
|
@ -80,10 +80,9 @@ nv_board_infos[] = {
|
||||||
};
|
};
|
||||||
|
|
||||||
void
|
void
|
||||||
nvkm_therm_ic_ctor(struct nvkm_therm *obj)
|
nvkm_therm_ic_ctor(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
|
||||||
struct nvkm_bios *bios = device->bios;
|
struct nvkm_bios *bios = device->bios;
|
||||||
struct nvkm_i2c *i2c = device->i2c;
|
struct nvkm_i2c *i2c = device->i2c;
|
||||||
struct nvkm_i2c_bus *bus;
|
struct nvkm_i2c_bus *bus;
|
||||||
|
|
|
@ -29,15 +29,12 @@ enum nv40_sensor_style { INVALID_STYLE = -1, OLD_STYLE = 0, NEW_STYLE = 1 };
|
||||||
static enum nv40_sensor_style
|
static enum nv40_sensor_style
|
||||||
nv40_sensor_style(struct nvkm_therm *therm)
|
nv40_sensor_style(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_device *device = nv_device(therm);
|
switch (therm->subdev.device->chipset) {
|
||||||
|
|
||||||
switch (device->chipset) {
|
|
||||||
case 0x43:
|
case 0x43:
|
||||||
case 0x44:
|
case 0x44:
|
||||||
case 0x4a:
|
case 0x4a:
|
||||||
case 0x47:
|
case 0x47:
|
||||||
return OLD_STYLE;
|
return OLD_STYLE;
|
||||||
|
|
||||||
case 0x46:
|
case 0x46:
|
||||||
case 0x49:
|
case 0x49:
|
||||||
case 0x4b:
|
case 0x4b:
|
||||||
|
@ -73,12 +70,11 @@ nv40_sensor_setup(struct nvkm_therm *therm)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nv40_temp_get(struct nvkm_therm *obj)
|
nv40_temp_get(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
|
||||||
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
||||||
enum nv40_sensor_style style = nv40_sensor_style(&therm->base);
|
enum nv40_sensor_style style = nv40_sensor_style(therm);
|
||||||
int core_temp;
|
int core_temp;
|
||||||
|
|
||||||
if (style == NEW_STYLE) {
|
if (style == NEW_STYLE) {
|
||||||
|
@ -169,10 +165,10 @@ nv40_fan_pwm_set(struct nvkm_therm *therm, int line, u32 divs, u32 duty)
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
nv40_therm_intr(struct nvkm_subdev *subdev)
|
nv40_therm_intr(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm *therm = nvkm_therm(subdev);
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_device *device = therm->subdev.device;
|
struct nvkm_device *device = subdev->device;
|
||||||
uint32_t stat = nvkm_rd32(device, 0x1100);
|
uint32_t stat = nvkm_rd32(device, 0x1100);
|
||||||
|
|
||||||
/* traitement */
|
/* traitement */
|
||||||
|
@ -183,46 +179,26 @@ nv40_therm_intr(struct nvkm_subdev *subdev)
|
||||||
nvkm_error(subdev, "THERM received an IRQ: stat = %x\n", stat);
|
nvkm_error(subdev, "THERM received an IRQ: stat = %x\n", stat);
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static void
|
||||||
nv40_therm_ctor(struct nvkm_object *parent,
|
nv40_therm_init(struct nvkm_therm *therm)
|
||||||
struct nvkm_object *engine,
|
|
||||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
|
||||||
struct nvkm_object **pobject)
|
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_create(parent, engine, oclass, &therm);
|
|
||||||
*pobject = nv_object(therm);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
therm->base.pwm_ctrl = nv40_fan_pwm_ctrl;
|
|
||||||
therm->base.pwm_get = nv40_fan_pwm_get;
|
|
||||||
therm->base.pwm_set = nv40_fan_pwm_set;
|
|
||||||
therm->base.temp_get = nv40_temp_get;
|
|
||||||
therm->sensor.program_alarms = nvkm_therm_program_alarms_polling;
|
|
||||||
nv_subdev(therm)->intr = nv40_therm_intr;
|
|
||||||
return nvkm_therm_preinit(&therm->base);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int
|
|
||||||
nv40_therm_init(struct nvkm_object *object)
|
|
||||||
{
|
|
||||||
struct nvkm_therm *therm = (void *)object;
|
|
||||||
|
|
||||||
nv40_sensor_setup(therm);
|
nv40_sensor_setup(therm);
|
||||||
|
|
||||||
return _nvkm_therm_init(object);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
struct nvkm_oclass
|
static const struct nvkm_therm_func
|
||||||
nv40_therm_oclass = {
|
nv40_therm = {
|
||||||
.handle = NV_SUBDEV(THERM, 0x40),
|
|
||||||
.ofuncs = &(struct nvkm_ofuncs) {
|
|
||||||
.ctor = nv40_therm_ctor,
|
|
||||||
.dtor = _nvkm_therm_dtor,
|
|
||||||
.init = nv40_therm_init,
|
.init = nv40_therm_init,
|
||||||
.fini = _nvkm_therm_fini,
|
.intr = nv40_therm_intr,
|
||||||
},
|
.pwm_ctrl = nv40_fan_pwm_ctrl,
|
||||||
|
.pwm_get = nv40_fan_pwm_get,
|
||||||
|
.pwm_set = nv40_fan_pwm_set,
|
||||||
|
.temp_get = nv40_temp_get,
|
||||||
|
.program_alarms = nvkm_therm_program_alarms_polling,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
int
|
||||||
|
nv40_therm_new(struct nvkm_device *device, int index,
|
||||||
|
struct nvkm_therm **ptherm)
|
||||||
|
{
|
||||||
|
return nvkm_therm_new_(&nv40_therm, device, index, ptherm);
|
||||||
|
}
|
||||||
|
|
|
@ -126,10 +126,9 @@ nv50_sensor_setup(struct nvkm_therm *therm)
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static int
|
||||||
nv50_temp_get(struct nvkm_therm *obj)
|
nv50_temp_get(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_device *device = therm->subdev.device;
|
||||||
struct nvkm_device *device = therm->base.subdev.device;
|
|
||||||
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
||||||
int core_temp;
|
int core_temp;
|
||||||
|
|
||||||
|
@ -151,48 +150,27 @@ nv50_temp_get(struct nvkm_therm *obj)
|
||||||
return core_temp;
|
return core_temp;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int
|
static void
|
||||||
nv50_therm_ctor(struct nvkm_object *parent,
|
nv50_therm_init(struct nvkm_therm *therm)
|
||||||
struct nvkm_object *engine,
|
|
||||||
struct nvkm_oclass *oclass, void *data, u32 size,
|
|
||||||
struct nvkm_object **pobject)
|
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm;
|
|
||||||
int ret;
|
|
||||||
|
|
||||||
ret = nvkm_therm_create(parent, engine, oclass, &therm);
|
|
||||||
*pobject = nv_object(therm);
|
|
||||||
if (ret)
|
|
||||||
return ret;
|
|
||||||
|
|
||||||
therm->base.pwm_ctrl = nv50_fan_pwm_ctrl;
|
|
||||||
therm->base.pwm_get = nv50_fan_pwm_get;
|
|
||||||
therm->base.pwm_set = nv50_fan_pwm_set;
|
|
||||||
therm->base.pwm_clock = nv50_fan_pwm_clock;
|
|
||||||
therm->base.temp_get = nv50_temp_get;
|
|
||||||
therm->sensor.program_alarms = nvkm_therm_program_alarms_polling;
|
|
||||||
nv_subdev(therm)->intr = nv40_therm_intr;
|
|
||||||
|
|
||||||
return nvkm_therm_preinit(&therm->base);
|
|
||||||
}
|
|
||||||
|
|
||||||
static int
|
|
||||||
nv50_therm_init(struct nvkm_object *object)
|
|
||||||
{
|
|
||||||
struct nvkm_therm *therm = (void *)object;
|
|
||||||
|
|
||||||
nv50_sensor_setup(therm);
|
nv50_sensor_setup(therm);
|
||||||
|
|
||||||
return _nvkm_therm_init(object);
|
|
||||||
}
|
}
|
||||||
|
|
||||||
struct nvkm_oclass
|
static const struct nvkm_therm_func
|
||||||
nv50_therm_oclass = {
|
nv50_therm = {
|
||||||
.handle = NV_SUBDEV(THERM, 0x50),
|
|
||||||
.ofuncs = &(struct nvkm_ofuncs) {
|
|
||||||
.ctor = nv50_therm_ctor,
|
|
||||||
.dtor = _nvkm_therm_dtor,
|
|
||||||
.init = nv50_therm_init,
|
.init = nv50_therm_init,
|
||||||
.fini = _nvkm_therm_fini,
|
.intr = nv40_therm_intr,
|
||||||
},
|
.pwm_ctrl = nv50_fan_pwm_ctrl,
|
||||||
|
.pwm_get = nv50_fan_pwm_get,
|
||||||
|
.pwm_set = nv50_fan_pwm_set,
|
||||||
|
.pwm_clock = nv50_fan_pwm_clock,
|
||||||
|
.temp_get = nv50_temp_get,
|
||||||
|
.program_alarms = nvkm_therm_program_alarms_polling,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
int
|
||||||
|
nv50_therm_new(struct nvkm_device *device, int index,
|
||||||
|
struct nvkm_therm **ptherm)
|
||||||
|
{
|
||||||
|
return nvkm_therm_new_(&nv50_therm, device, index, ptherm);
|
||||||
|
}
|
||||||
|
|
|
@ -1,5 +1,6 @@
|
||||||
#ifndef __NVTHERM_PRIV_H__
|
#ifndef __NVTHERM_PRIV_H__
|
||||||
#define __NVTHERM_PRIV_H__
|
#define __NVTHERM_PRIV_H__
|
||||||
|
#define nvkm_therm(p) container_of((p), struct nvkm_therm, subdev)
|
||||||
/*
|
/*
|
||||||
* Copyright 2012 The Nouveau community
|
* Copyright 2012 The Nouveau community
|
||||||
*
|
*
|
||||||
|
@ -28,8 +29,9 @@
|
||||||
#include <subdev/bios/extdev.h>
|
#include <subdev/bios/extdev.h>
|
||||||
#include <subdev/bios/gpio.h>
|
#include <subdev/bios/gpio.h>
|
||||||
#include <subdev/bios/perf.h>
|
#include <subdev/bios/perf.h>
|
||||||
#include <subdev/bios/therm.h>
|
|
||||||
#include <subdev/timer.h>
|
int nvkm_therm_new_(const struct nvkm_therm_func *, struct nvkm_device *,
|
||||||
|
int index, struct nvkm_therm **);
|
||||||
|
|
||||||
struct nvkm_fan {
|
struct nvkm_fan {
|
||||||
struct nvkm_therm *parent;
|
struct nvkm_therm *parent;
|
||||||
|
@ -48,59 +50,6 @@ struct nvkm_fan {
|
||||||
struct dcb_gpio_func tach;
|
struct dcb_gpio_func tach;
|
||||||
};
|
};
|
||||||
|
|
||||||
enum nvkm_therm_thrs_direction {
|
|
||||||
NVKM_THERM_THRS_FALLING = 0,
|
|
||||||
NVKM_THERM_THRS_RISING = 1
|
|
||||||
};
|
|
||||||
|
|
||||||
enum nvkm_therm_thrs_state {
|
|
||||||
NVKM_THERM_THRS_LOWER = 0,
|
|
||||||
NVKM_THERM_THRS_HIGHER = 1
|
|
||||||
};
|
|
||||||
|
|
||||||
enum nvkm_therm_thrs {
|
|
||||||
NVKM_THERM_THRS_FANBOOST = 0,
|
|
||||||
NVKM_THERM_THRS_DOWNCLOCK = 1,
|
|
||||||
NVKM_THERM_THRS_CRITICAL = 2,
|
|
||||||
NVKM_THERM_THRS_SHUTDOWN = 3,
|
|
||||||
NVKM_THERM_THRS_NR
|
|
||||||
};
|
|
||||||
|
|
||||||
struct nvkm_therm_priv {
|
|
||||||
struct nvkm_therm base;
|
|
||||||
|
|
||||||
/* automatic thermal management */
|
|
||||||
struct nvkm_alarm alarm;
|
|
||||||
spinlock_t lock;
|
|
||||||
struct nvbios_therm_trip_point *last_trip;
|
|
||||||
int mode;
|
|
||||||
int cstate;
|
|
||||||
int suspend;
|
|
||||||
|
|
||||||
/* bios */
|
|
||||||
struct nvbios_therm_sensor bios_sensor;
|
|
||||||
|
|
||||||
/* fan priv */
|
|
||||||
struct nvkm_fan *fan;
|
|
||||||
|
|
||||||
/* alarms priv */
|
|
||||||
struct {
|
|
||||||
spinlock_t alarm_program_lock;
|
|
||||||
struct nvkm_alarm therm_poll_alarm;
|
|
||||||
enum nvkm_therm_thrs_state alarm_state[NVKM_THERM_THRS_NR];
|
|
||||||
void (*program_alarms)(struct nvkm_therm *);
|
|
||||||
} sensor;
|
|
||||||
|
|
||||||
/* what should be done if the card overheats */
|
|
||||||
struct {
|
|
||||||
void (*downclock)(struct nvkm_therm *, bool active);
|
|
||||||
void (*pause)(struct nvkm_therm *, bool active);
|
|
||||||
} emergency;
|
|
||||||
|
|
||||||
/* ic */
|
|
||||||
struct i2c_client *ic;
|
|
||||||
};
|
|
||||||
|
|
||||||
int nvkm_therm_fan_mode(struct nvkm_therm *, int mode);
|
int nvkm_therm_fan_mode(struct nvkm_therm *, int mode);
|
||||||
int nvkm_therm_attr_get(struct nvkm_therm *, enum nvkm_therm_attr_type);
|
int nvkm_therm_attr_get(struct nvkm_therm *, enum nvkm_therm_attr_type);
|
||||||
int nvkm_therm_attr_set(struct nvkm_therm *, enum nvkm_therm_attr_type, int);
|
int nvkm_therm_attr_set(struct nvkm_therm *, enum nvkm_therm_attr_type, int);
|
||||||
|
@ -117,8 +66,6 @@ int nvkm_therm_fan_set(struct nvkm_therm *, bool now, int percent);
|
||||||
int nvkm_therm_fan_user_get(struct nvkm_therm *);
|
int nvkm_therm_fan_user_get(struct nvkm_therm *);
|
||||||
int nvkm_therm_fan_user_set(struct nvkm_therm *, int percent);
|
int nvkm_therm_fan_user_set(struct nvkm_therm *, int percent);
|
||||||
|
|
||||||
int nvkm_therm_fan_sense(struct nvkm_therm *);
|
|
||||||
|
|
||||||
int nvkm_therm_preinit(struct nvkm_therm *);
|
int nvkm_therm_preinit(struct nvkm_therm *);
|
||||||
|
|
||||||
int nvkm_therm_sensor_init(struct nvkm_therm *);
|
int nvkm_therm_sensor_init(struct nvkm_therm *);
|
||||||
|
@ -134,18 +81,37 @@ void nvkm_therm_sensor_event(struct nvkm_therm *, enum nvkm_therm_thrs,
|
||||||
enum nvkm_therm_thrs_direction);
|
enum nvkm_therm_thrs_direction);
|
||||||
void nvkm_therm_program_alarms_polling(struct nvkm_therm *);
|
void nvkm_therm_program_alarms_polling(struct nvkm_therm *);
|
||||||
|
|
||||||
void nv40_therm_intr(struct nvkm_subdev *);
|
struct nvkm_therm_func {
|
||||||
|
void (*init)(struct nvkm_therm *);
|
||||||
|
void (*fini)(struct nvkm_therm *);
|
||||||
|
void (*intr)(struct nvkm_therm *);
|
||||||
|
|
||||||
|
int (*pwm_ctrl)(struct nvkm_therm *, int line, bool);
|
||||||
|
int (*pwm_get)(struct nvkm_therm *, int line, u32 *, u32 *);
|
||||||
|
int (*pwm_set)(struct nvkm_therm *, int line, u32, u32);
|
||||||
|
int (*pwm_clock)(struct nvkm_therm *, int line);
|
||||||
|
|
||||||
|
int (*temp_get)(struct nvkm_therm *);
|
||||||
|
|
||||||
|
int (*fan_sense)(struct nvkm_therm *);
|
||||||
|
|
||||||
|
void (*program_alarms)(struct nvkm_therm *);
|
||||||
|
};
|
||||||
|
|
||||||
|
void nv40_therm_intr(struct nvkm_therm *);
|
||||||
|
|
||||||
int nv50_fan_pwm_ctrl(struct nvkm_therm *, int, bool);
|
int nv50_fan_pwm_ctrl(struct nvkm_therm *, int, bool);
|
||||||
int nv50_fan_pwm_get(struct nvkm_therm *, int, u32 *, u32 *);
|
int nv50_fan_pwm_get(struct nvkm_therm *, int, u32 *, u32 *);
|
||||||
int nv50_fan_pwm_set(struct nvkm_therm *, int, u32, u32);
|
int nv50_fan_pwm_set(struct nvkm_therm *, int, u32, u32);
|
||||||
int nv50_fan_pwm_clock(struct nvkm_therm *, int);
|
int nv50_fan_pwm_clock(struct nvkm_therm *, int);
|
||||||
|
|
||||||
int g84_temp_get(struct nvkm_therm *);
|
int g84_temp_get(struct nvkm_therm *);
|
||||||
void g84_sensor_setup(struct nvkm_therm *);
|
void g84_sensor_setup(struct nvkm_therm *);
|
||||||
int g84_therm_fini(struct nvkm_object *, bool suspend);
|
void g84_therm_fini(struct nvkm_therm *);
|
||||||
|
|
||||||
int gt215_therm_fan_sense(struct nvkm_therm *);
|
int gt215_therm_fan_sense(struct nvkm_therm *);
|
||||||
|
|
||||||
int gf110_therm_init(struct nvkm_object *);
|
void gf119_therm_init(struct nvkm_therm *);
|
||||||
|
|
||||||
int nvkm_fanpwm_create(struct nvkm_therm *, struct dcb_gpio_func *);
|
int nvkm_fanpwm_create(struct nvkm_therm *, struct dcb_gpio_func *);
|
||||||
int nvkm_fantog_create(struct nvkm_therm *, struct dcb_gpio_func *);
|
int nvkm_fantog_create(struct nvkm_therm *, struct dcb_gpio_func *);
|
||||||
|
|
|
@ -24,10 +24,8 @@
|
||||||
#include "priv.h"
|
#include "priv.h"
|
||||||
|
|
||||||
static void
|
static void
|
||||||
nvkm_therm_temp_set_defaults(struct nvkm_therm *obj)
|
nvkm_therm_temp_set_defaults(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
|
|
||||||
therm->bios_sensor.offset_constant = 0;
|
therm->bios_sensor.offset_constant = 0;
|
||||||
|
|
||||||
therm->bios_sensor.thrs_fan_boost.temp = 90;
|
therm->bios_sensor.thrs_fan_boost.temp = 90;
|
||||||
|
@ -43,11 +41,9 @@ nvkm_therm_temp_set_defaults(struct nvkm_therm *obj)
|
||||||
therm->bios_sensor.thrs_shutdown.hysteresis = 5; /*not that it matters */
|
therm->bios_sensor.thrs_shutdown.hysteresis = 5; /*not that it matters */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
static void
|
static void
|
||||||
nvkm_therm_temp_safety_checks(struct nvkm_therm *obj)
|
nvkm_therm_temp_safety_checks(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvbios_therm_sensor *s = &therm->bios_sensor;
|
struct nvbios_therm_sensor *s = &therm->bios_sensor;
|
||||||
|
|
||||||
/* enforce a minimum hysteresis on thresholds */
|
/* enforce a minimum hysteresis on thresholds */
|
||||||
|
@ -59,20 +55,18 @@ nvkm_therm_temp_safety_checks(struct nvkm_therm *obj)
|
||||||
|
|
||||||
/* must be called with alarm_program_lock taken ! */
|
/* must be called with alarm_program_lock taken ! */
|
||||||
void
|
void
|
||||||
nvkm_therm_sensor_set_threshold_state(struct nvkm_therm *obj,
|
nvkm_therm_sensor_set_threshold_state(struct nvkm_therm *therm,
|
||||||
enum nvkm_therm_thrs thrs,
|
enum nvkm_therm_thrs thrs,
|
||||||
enum nvkm_therm_thrs_state st)
|
enum nvkm_therm_thrs_state st)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
therm->sensor.alarm_state[thrs] = st;
|
therm->sensor.alarm_state[thrs] = st;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* must be called with alarm_program_lock taken ! */
|
/* must be called with alarm_program_lock taken ! */
|
||||||
enum nvkm_therm_thrs_state
|
enum nvkm_therm_thrs_state
|
||||||
nvkm_therm_sensor_get_threshold_state(struct nvkm_therm *obj,
|
nvkm_therm_sensor_get_threshold_state(struct nvkm_therm *therm,
|
||||||
enum nvkm_therm_thrs thrs)
|
enum nvkm_therm_thrs thrs)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
return therm->sensor.alarm_state[thrs];
|
return therm->sensor.alarm_state[thrs];
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -84,16 +78,15 @@ nv_poweroff_work(struct work_struct *work)
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
nvkm_therm_sensor_event(struct nvkm_therm *obj, enum nvkm_therm_thrs thrs,
|
nvkm_therm_sensor_event(struct nvkm_therm *therm, enum nvkm_therm_thrs thrs,
|
||||||
enum nvkm_therm_thrs_direction dir)
|
enum nvkm_therm_thrs_direction dir)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
|
||||||
bool active;
|
bool active;
|
||||||
const char *thresolds[] = {
|
const char *thresolds[] = {
|
||||||
"fanboost", "downclock", "critical", "shutdown"
|
"fanboost", "downclock", "critical", "shutdown"
|
||||||
};
|
};
|
||||||
int temperature = therm->base.temp_get(&therm->base);
|
int temperature = therm->func->temp_get(therm);
|
||||||
|
|
||||||
if (thrs < 0 || thrs > 3)
|
if (thrs < 0 || thrs > 3)
|
||||||
return;
|
return;
|
||||||
|
@ -110,17 +103,17 @@ nvkm_therm_sensor_event(struct nvkm_therm *obj, enum nvkm_therm_thrs thrs,
|
||||||
switch (thrs) {
|
switch (thrs) {
|
||||||
case NVKM_THERM_THRS_FANBOOST:
|
case NVKM_THERM_THRS_FANBOOST:
|
||||||
if (active) {
|
if (active) {
|
||||||
nvkm_therm_fan_set(&therm->base, true, 100);
|
nvkm_therm_fan_set(therm, true, 100);
|
||||||
nvkm_therm_fan_mode(&therm->base, NVKM_THERM_CTRL_AUTO);
|
nvkm_therm_fan_mode(therm, NVKM_THERM_CTRL_AUTO);
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
case NVKM_THERM_THRS_DOWNCLOCK:
|
case NVKM_THERM_THRS_DOWNCLOCK:
|
||||||
if (therm->emergency.downclock)
|
if (therm->emergency.downclock)
|
||||||
therm->emergency.downclock(&therm->base, active);
|
therm->emergency.downclock(therm, active);
|
||||||
break;
|
break;
|
||||||
case NVKM_THERM_THRS_CRITICAL:
|
case NVKM_THERM_THRS_CRITICAL:
|
||||||
if (therm->emergency.pause)
|
if (therm->emergency.pause)
|
||||||
therm->emergency.pause(&therm->base, active);
|
therm->emergency.pause(therm, active);
|
||||||
break;
|
break;
|
||||||
case NVKM_THERM_THRS_SHUTDOWN:
|
case NVKM_THERM_THRS_SHUTDOWN:
|
||||||
if (active) {
|
if (active) {
|
||||||
|
@ -147,7 +140,7 @@ nvkm_therm_threshold_hyst_polling(struct nvkm_therm *therm,
|
||||||
{
|
{
|
||||||
enum nvkm_therm_thrs_direction direction;
|
enum nvkm_therm_thrs_direction direction;
|
||||||
enum nvkm_therm_thrs_state prev_state, new_state;
|
enum nvkm_therm_thrs_state prev_state, new_state;
|
||||||
int temp = therm->temp_get(therm);
|
int temp = therm->func->temp_get(therm);
|
||||||
|
|
||||||
prev_state = nvkm_therm_sensor_get_threshold_state(therm, thrs_name);
|
prev_state = nvkm_therm_sensor_get_threshold_state(therm, thrs_name);
|
||||||
|
|
||||||
|
@ -168,41 +161,40 @@ nvkm_therm_threshold_hyst_polling(struct nvkm_therm *therm,
|
||||||
static void
|
static void
|
||||||
alarm_timer_callback(struct nvkm_alarm *alarm)
|
alarm_timer_callback(struct nvkm_alarm *alarm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm =
|
struct nvkm_therm *therm =
|
||||||
container_of(alarm, struct nvkm_therm_priv, sensor.therm_poll_alarm);
|
container_of(alarm, struct nvkm_therm, sensor.therm_poll_alarm);
|
||||||
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
||||||
struct nvkm_timer *tmr = nvkm_timer(therm);
|
struct nvkm_timer *tmr = therm->subdev.device->timer;
|
||||||
unsigned long flags;
|
unsigned long flags;
|
||||||
|
|
||||||
spin_lock_irqsave(&therm->sensor.alarm_program_lock, flags);
|
spin_lock_irqsave(&therm->sensor.alarm_program_lock, flags);
|
||||||
|
|
||||||
nvkm_therm_threshold_hyst_polling(&therm->base, &sensor->thrs_fan_boost,
|
nvkm_therm_threshold_hyst_polling(therm, &sensor->thrs_fan_boost,
|
||||||
NVKM_THERM_THRS_FANBOOST);
|
NVKM_THERM_THRS_FANBOOST);
|
||||||
|
|
||||||
nvkm_therm_threshold_hyst_polling(&therm->base,
|
nvkm_therm_threshold_hyst_polling(therm,
|
||||||
&sensor->thrs_down_clock,
|
&sensor->thrs_down_clock,
|
||||||
NVKM_THERM_THRS_DOWNCLOCK);
|
NVKM_THERM_THRS_DOWNCLOCK);
|
||||||
|
|
||||||
nvkm_therm_threshold_hyst_polling(&therm->base, &sensor->thrs_critical,
|
nvkm_therm_threshold_hyst_polling(therm, &sensor->thrs_critical,
|
||||||
NVKM_THERM_THRS_CRITICAL);
|
NVKM_THERM_THRS_CRITICAL);
|
||||||
|
|
||||||
nvkm_therm_threshold_hyst_polling(&therm->base, &sensor->thrs_shutdown,
|
nvkm_therm_threshold_hyst_polling(therm, &sensor->thrs_shutdown,
|
||||||
NVKM_THERM_THRS_SHUTDOWN);
|
NVKM_THERM_THRS_SHUTDOWN);
|
||||||
|
|
||||||
spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
|
spin_unlock_irqrestore(&therm->sensor.alarm_program_lock, flags);
|
||||||
|
|
||||||
/* schedule the next poll in one second */
|
/* schedule the next poll in one second */
|
||||||
if (therm->base.temp_get(&therm->base) >= 0 && list_empty(&alarm->head))
|
if (therm->func->temp_get(therm) >= 0 && list_empty(&alarm->head))
|
||||||
tmr->alarm(tmr, 1000000000ULL, alarm);
|
tmr->alarm(tmr, 1000000000ULL, alarm);
|
||||||
}
|
}
|
||||||
|
|
||||||
void
|
void
|
||||||
nvkm_therm_program_alarms_polling(struct nvkm_therm *obj)
|
nvkm_therm_program_alarms_polling(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
|
||||||
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
struct nvbios_therm_sensor *sensor = &therm->bios_sensor;
|
||||||
|
|
||||||
nvkm_debug(&therm->base.subdev,
|
nvkm_debug(&therm->subdev,
|
||||||
"programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
|
"programmed thresholds [ %d(%d), %d(%d), %d(%d), %d(%d) ]\n",
|
||||||
sensor->thrs_fan_boost.temp,
|
sensor->thrs_fan_boost.temp,
|
||||||
sensor->thrs_fan_boost.hysteresis,
|
sensor->thrs_fan_boost.hysteresis,
|
||||||
|
@ -217,19 +209,16 @@ nvkm_therm_program_alarms_polling(struct nvkm_therm *obj)
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_sensor_init(struct nvkm_therm *obj)
|
nvkm_therm_sensor_init(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
therm->func->program_alarms(therm);
|
||||||
therm->sensor.program_alarms(&therm->base);
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_sensor_fini(struct nvkm_therm *obj, bool suspend)
|
nvkm_therm_sensor_fini(struct nvkm_therm *therm, bool suspend)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_timer *tmr = therm->subdev.device->timer;
|
||||||
struct nvkm_timer *tmr = nvkm_timer(therm);
|
|
||||||
|
|
||||||
if (suspend)
|
if (suspend)
|
||||||
tmr->alarm_cancel(tmr, &therm->sensor.therm_poll_alarm);
|
tmr->alarm_cancel(tmr, &therm->sensor.therm_poll_alarm);
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -240,26 +229,25 @@ nvkm_therm_sensor_preinit(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
const char *sensor_avail = "yes";
|
const char *sensor_avail = "yes";
|
||||||
|
|
||||||
if (therm->temp_get(therm) < 0)
|
if (therm->func->temp_get(therm) < 0)
|
||||||
sensor_avail = "no";
|
sensor_avail = "no";
|
||||||
|
|
||||||
nvkm_debug(&therm->subdev, "internal sensor: %s\n", sensor_avail);
|
nvkm_debug(&therm->subdev, "internal sensor: %s\n", sensor_avail);
|
||||||
}
|
}
|
||||||
|
|
||||||
int
|
int
|
||||||
nvkm_therm_sensor_ctor(struct nvkm_therm *obj)
|
nvkm_therm_sensor_ctor(struct nvkm_therm *therm)
|
||||||
{
|
{
|
||||||
struct nvkm_therm_priv *therm = container_of(obj, typeof(*therm), base);
|
struct nvkm_subdev *subdev = &therm->subdev;
|
||||||
struct nvkm_subdev *subdev = &therm->base.subdev;
|
|
||||||
struct nvkm_bios *bios = subdev->device->bios;
|
struct nvkm_bios *bios = subdev->device->bios;
|
||||||
|
|
||||||
nvkm_alarm_init(&therm->sensor.therm_poll_alarm, alarm_timer_callback);
|
nvkm_alarm_init(&therm->sensor.therm_poll_alarm, alarm_timer_callback);
|
||||||
|
|
||||||
nvkm_therm_temp_set_defaults(&therm->base);
|
nvkm_therm_temp_set_defaults(therm);
|
||||||
if (nvbios_therm_sensor_parse(bios, NVBIOS_THERM_DOMAIN_CORE,
|
if (nvbios_therm_sensor_parse(bios, NVBIOS_THERM_DOMAIN_CORE,
|
||||||
&therm->bios_sensor))
|
&therm->bios_sensor))
|
||||||
nvkm_error(subdev, "nvbios_therm_sensor_parse failed\n");
|
nvkm_error(subdev, "nvbios_therm_sensor_parse failed\n");
|
||||||
nvkm_therm_temp_safety_checks(&therm->base);
|
nvkm_therm_temp_safety_checks(therm);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue