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drm/amdgpu/sdma4: set wptr shadow atomically (v2)
No functional change until wptr polling uses this location (future patch). v2: use WRITE_ONCE Cc: Frank Min <Frank.Min@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -293,6 +293,8 @@ static void sdma_v4_0_ring_set_wptr(struct amdgpu_ring *ring)
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DRM_DEBUG("Setting write pointer\n");
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DRM_DEBUG("Setting write pointer\n");
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if (ring->use_doorbell) {
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if (ring->use_doorbell) {
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u64 *wb = (u64 *)&adev->wb.wb[ring->wptr_offs];
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DRM_DEBUG("Using doorbell -- "
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DRM_DEBUG("Using doorbell -- "
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"wptr_offs == 0x%08x "
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"wptr_offs == 0x%08x "
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"lower_32_bits(ring->wptr) << 2 == 0x%08x "
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"lower_32_bits(ring->wptr) << 2 == 0x%08x "
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@ -301,8 +303,7 @@ static void sdma_v4_0_ring_set_wptr(struct amdgpu_ring *ring)
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lower_32_bits(ring->wptr << 2),
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lower_32_bits(ring->wptr << 2),
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upper_32_bits(ring->wptr << 2));
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upper_32_bits(ring->wptr << 2));
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/* XXX check if swapping is necessary on BE */
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/* XXX check if swapping is necessary on BE */
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adev->wb.wb[ring->wptr_offs] = lower_32_bits(ring->wptr << 2);
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WRITE_ONCE(*wb, (ring->wptr << 2));
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adev->wb.wb[ring->wptr_offs + 1] = upper_32_bits(ring->wptr << 2);
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DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
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DRM_DEBUG("calling WDOORBELL64(0x%08x, 0x%016llx)\n",
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ring->doorbell_index, ring->wptr << 2);
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ring->doorbell_index, ring->wptr << 2);
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