mirror of https://gitee.com/openkylin/linux.git
Merge branch 'topic/s3c64xx' into for-linus
This commit is contained in:
commit
57fb7ee10c
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@ -117,6 +117,25 @@ static struct pl08x_channel_data s3c64xx_dma0_info[] = {
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}
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};
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static const struct dma_slave_map s3c64xx_dma0_slave_map[] = {
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{ "s3c6400-uart.0", "tx", &s3c64xx_dma0_info[0] },
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{ "s3c6400-uart.0", "rx", &s3c64xx_dma0_info[1] },
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{ "s3c6400-uart.1", "tx", &s3c64xx_dma0_info[2] },
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{ "s3c6400-uart.1", "rx", &s3c64xx_dma0_info[3] },
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{ "s3c6400-uart.2", "tx", &s3c64xx_dma0_info[4] },
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{ "s3c6400-uart.2", "rx", &s3c64xx_dma0_info[5] },
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{ "s3c6400-uart.3", "tx", &s3c64xx_dma0_info[6] },
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{ "s3c6400-uart.3", "rx", &s3c64xx_dma0_info[7] },
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{ "samsung-pcm.0", "tx", &s3c64xx_dma0_info[8] },
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{ "samsung-pcm.0", "rx", &s3c64xx_dma0_info[9] },
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{ "samsung-i2s.0", "tx", &s3c64xx_dma0_info[10] },
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{ "samsung-i2s.0", "rx", &s3c64xx_dma0_info[11] },
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{ "s3c6410-spi.0", "tx", &s3c64xx_dma0_info[12] },
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{ "s3c6410-spi.0", "rx", &s3c64xx_dma0_info[13] },
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{ "samsung-i2s.2", "tx", &s3c64xx_dma0_info[14] },
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{ "samsung-i2s.2", "rx", &s3c64xx_dma0_info[15] },
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};
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struct pl08x_platform_data s3c64xx_dma0_plat_data = {
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.memcpy_channel = {
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.bus_id = "memcpy",
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@ -134,6 +153,8 @@ struct pl08x_platform_data s3c64xx_dma0_plat_data = {
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.put_xfer_signal = pl08x_put_xfer_signal,
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.slave_channels = s3c64xx_dma0_info,
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.num_slave_channels = ARRAY_SIZE(s3c64xx_dma0_info),
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.slave_map = s3c64xx_dma0_slave_map,
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.slave_map_len = ARRAY_SIZE(s3c64xx_dma0_slave_map),
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};
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static AMBA_AHB_DEVICE(s3c64xx_dma0, "dma-pl080s.0", 0,
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@ -207,6 +228,15 @@ static struct pl08x_channel_data s3c64xx_dma1_info[] = {
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},
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};
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static const struct dma_slave_map s3c64xx_dma1_slave_map[] = {
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{ "samsung-pcm.1", "tx", &s3c64xx_dma1_info[0] },
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{ "samsung-pcm.1", "rx", &s3c64xx_dma1_info[1] },
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{ "samsung-i2s.1", "tx", &s3c64xx_dma1_info[2] },
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{ "samsung-i2s.1", "rx", &s3c64xx_dma1_info[3] },
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{ "s3c6410-spi.1", "tx", &s3c64xx_dma1_info[4] },
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{ "s3c6410-spi.1", "rx", &s3c64xx_dma1_info[5] },
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};
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struct pl08x_platform_data s3c64xx_dma1_plat_data = {
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.memcpy_channel = {
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.bus_id = "memcpy",
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@ -224,6 +254,8 @@ struct pl08x_platform_data s3c64xx_dma1_plat_data = {
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.put_xfer_signal = pl08x_put_xfer_signal,
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.slave_channels = s3c64xx_dma1_info,
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.num_slave_channels = ARRAY_SIZE(s3c64xx_dma1_info),
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.slave_map = s3c64xx_dma1_slave_map,
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.slave_map_len = ARRAY_SIZE(s3c64xx_dma1_slave_map),
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};
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static AMBA_AHB_DEVICE(s3c64xx_dma1, "dma-pl080s.1", 0,
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@ -1124,15 +1124,6 @@ void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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pd.num_cs = num_cs;
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pd.src_clk_nr = src_clk_nr;
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pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
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pd.dma_tx = (void *)DMACH_SPI0_TX;
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pd.dma_rx = (void *)DMACH_SPI0_RX;
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#if defined(CONFIG_PL330_DMA)
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pd.filter = pl330_filter;
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#elif defined(CONFIG_S3C64XX_PL080)
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pd.filter = pl08x_filter_id;
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#elif defined(CONFIG_S3C24XX_DMAC)
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pd.filter = s3c24xx_dma_filter;
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#endif
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s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
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}
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@ -1169,14 +1160,6 @@ void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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pd.num_cs = num_cs;
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pd.src_clk_nr = src_clk_nr;
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pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
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pd.dma_tx = (void *)DMACH_SPI1_TX;
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pd.dma_rx = (void *)DMACH_SPI1_RX;
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#if defined(CONFIG_PL330_DMA)
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pd.filter = pl330_filter;
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#elif defined(CONFIG_S3C64XX_PL080)
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pd.filter = pl08x_filter_id;
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#endif
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s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
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}
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@ -1213,13 +1196,6 @@ void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
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pd.num_cs = num_cs;
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pd.src_clk_nr = src_clk_nr;
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pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
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pd.dma_tx = (void *)DMACH_SPI2_TX;
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pd.dma_rx = (void *)DMACH_SPI2_RX;
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#if defined(CONFIG_PL330_DMA)
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pd.filter = pl330_filter;
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#elif defined(CONFIG_S3C64XX_PL080)
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pd.filter = pl08x_filter_id;
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#endif
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s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
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}
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@ -1793,6 +1793,13 @@ bool pl08x_filter_id(struct dma_chan *chan, void *chan_id)
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}
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EXPORT_SYMBOL_GPL(pl08x_filter_id);
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static bool pl08x_filter_fn(struct dma_chan *chan, void *chan_id)
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{
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struct pl08x_dma_chan *plchan = to_pl08x_chan(chan);
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return plchan->cd == chan_id;
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}
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/*
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* Just check that the device is there and active
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* TODO: turn this bit on/off depending on the number of physical channels
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@ -2307,6 +2314,10 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
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ret = -EINVAL;
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goto out_no_platdata;
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}
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} else {
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pl08x->slave.filter.map = pl08x->pd->slave_map;
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pl08x->slave.filter.mapcnt = pl08x->pd->slave_map_len;
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pl08x->slave.filter.fn = pl08x_filter_fn;
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}
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/* By default, AHB1 only. If dualmaster, from platform */
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@ -341,27 +341,20 @@ static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable)
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static int s3c64xx_spi_prepare_transfer(struct spi_master *spi)
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{
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struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(spi);
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dma_filter_fn filter = sdd->cntrlr_info->filter;
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struct device *dev = &sdd->pdev->dev;
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dma_cap_mask_t mask;
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if (is_polling(sdd))
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return 0;
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dma_cap_zero(mask);
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dma_cap_set(DMA_SLAVE, mask);
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/* Acquire DMA channels */
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sdd->rx_dma.ch = dma_request_slave_channel_compat(mask, filter,
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sdd->cntrlr_info->dma_rx, dev, "rx");
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sdd->rx_dma.ch = dma_request_slave_channel(dev, "rx");
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if (!sdd->rx_dma.ch) {
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dev_err(dev, "Failed to get RX DMA channel\n");
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return -EBUSY;
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}
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spi->dma_rx = sdd->rx_dma.ch;
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sdd->tx_dma.ch = dma_request_slave_channel_compat(mask, filter,
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sdd->cntrlr_info->dma_tx, dev, "tx");
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sdd->tx_dma.ch = dma_request_slave_channel(dev, "tx");
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if (!sdd->tx_dma.ch) {
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dev_err(dev, "Failed to get TX DMA channel\n");
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dma_release_channel(sdd->rx_dma.ch);
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@ -1091,11 +1084,6 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
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sdd->cur_bpw = 8;
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if (!sdd->pdev->dev.of_node && (!sci->dma_tx || !sci->dma_rx)) {
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dev_warn(&pdev->dev, "Unable to get SPI tx/rx DMA data. Switching to poll mode\n");
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sdd->port_conf->quirks = S3C64XX_SPI_QUIRK_POLL;
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}
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sdd->tx_dma.direction = DMA_MEM_TO_DEV;
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sdd->rx_dma.direction = DMA_DEV_TO_MEM;
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@ -1205,9 +1193,8 @@ static int s3c64xx_spi_probe(struct platform_device *pdev)
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dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d with %d Slaves attached\n",
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sdd->port_id, master->num_chipselect);
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dev_dbg(&pdev->dev, "\tIOmem=[%pR]\tFIFO %dbytes\tDMA=[Rx-%p, Tx-%p]\n",
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mem_res, (FIFO_LVL_MASK(sdd) >> 1) + 1,
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sci->dma_rx, sci->dma_tx);
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dev_dbg(&pdev->dev, "\tIOmem=[%pR]\tFIFO %dbytes\n",
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mem_res, (FIFO_LVL_MASK(sdd) >> 1) + 1);
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pm_runtime_mark_last_busy(&pdev->dev);
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pm_runtime_put_autosuspend(&pdev->dev);
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@ -84,6 +84,8 @@ struct pl08x_channel_data {
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* running any DMA transfer and multiplexing can be recycled
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* @lli_buses: buses which LLIs can be fetched from: PL08X_AHB1 | PL08X_AHB2
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* @mem_buses: buses which memory can be accessed from: PL08X_AHB1 | PL08X_AHB2
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* @slave_map: DMA slave matching table
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* @slave_map_len: number of elements in @slave_map
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*/
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struct pl08x_platform_data {
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struct pl08x_channel_data *slave_channels;
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@ -93,6 +95,8 @@ struct pl08x_platform_data {
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void (*put_xfer_signal)(const struct pl08x_channel_data *, int);
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u8 lli_buses;
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u8 mem_buses;
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const struct dma_slave_map *slave_map;
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int slave_map_len;
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};
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#ifdef CONFIG_AMBA_PL08X
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@ -40,9 +40,6 @@ struct s3c64xx_spi_info {
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int num_cs;
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bool no_cs;
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int (*cfg_gpio)(void);
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dma_filter_fn filter;
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void *dma_tx;
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void *dma_rx;
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};
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/**
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