mirror of https://gitee.com/openkylin/linux.git
mmc: sh_mmcif: add sh_mmcif_host_to_dev() macro and use it.
Current sh_mmcif driver is directly using &host->pd->dev in all place. It is not big problem, but it is unreadable, and it can be cause of future bug. This patch adds new sh_mmcif_host_to_dev() and use it. Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Tested-by: Keita Kobayashi <keita.kobayashi.ym@renesas.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
Kuninori Morimoto
Ulf Hansson
parent
43e943a040
commit
585c3a5a0b
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@ -262,6 +262,8 @@ static const struct of_device_id mmcif_of_match[] = {
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};
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MODULE_DEVICE_TABLE(of, mmcif_of_match);
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#define sh_mmcif_host_to_dev(host) (&host->pd->dev)
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static inline void sh_mmcif_bitset(struct sh_mmcif_host *host,
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unsigned int reg, u32 val)
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{
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@ -278,11 +280,12 @@ static void mmcif_dma_complete(void *arg)
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{
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struct sh_mmcif_host *host = arg;
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struct mmc_request *mrq = host->mrq;
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struct device *dev = sh_mmcif_host_to_dev(host);
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dev_dbg(&host->pd->dev, "Command completed\n");
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dev_dbg(dev, "Command completed\n");
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if (WARN(!mrq || !mrq->data, "%s: NULL data in DMA completion!\n",
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dev_name(&host->pd->dev)))
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dev_name(dev)))
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return;
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complete(&host->dma_complete);
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@ -294,6 +297,7 @@ static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host)
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struct scatterlist *sg = data->sg;
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struct dma_async_tx_descriptor *desc = NULL;
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struct dma_chan *chan = host->chan_rx;
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struct device *dev = sh_mmcif_host_to_dev(host);
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dma_cookie_t cookie = -EINVAL;
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int ret;
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@ -312,7 +316,7 @@ static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host)
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sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN);
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dma_async_issue_pending(chan);
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}
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dev_dbg(&host->pd->dev, "%s(): mapped %d -> %d, cookie %d\n",
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dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n",
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__func__, data->sg_len, ret, cookie);
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if (!desc) {
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@ -328,12 +332,12 @@ static void sh_mmcif_start_dma_rx(struct sh_mmcif_host *host)
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host->chan_tx = NULL;
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dma_release_channel(chan);
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}
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dev_warn(&host->pd->dev,
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dev_warn(dev,
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"DMA failed: %d, falling back to PIO\n", ret);
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sh_mmcif_bitclr(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN | BUF_ACC_DMAWEN);
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}
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dev_dbg(&host->pd->dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__,
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dev_dbg(dev, "%s(): desc %p, cookie %d, sg[%d]\n", __func__,
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desc, cookie, data->sg_len);
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}
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@ -343,6 +347,7 @@ static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host)
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struct scatterlist *sg = data->sg;
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struct dma_async_tx_descriptor *desc = NULL;
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struct dma_chan *chan = host->chan_tx;
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struct device *dev = sh_mmcif_host_to_dev(host);
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dma_cookie_t cookie = -EINVAL;
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int ret;
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@ -361,7 +366,7 @@ static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host)
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sh_mmcif_bitset(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAWEN);
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dma_async_issue_pending(chan);
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}
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dev_dbg(&host->pd->dev, "%s(): mapped %d -> %d, cookie %d\n",
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dev_dbg(dev, "%s(): mapped %d -> %d, cookie %d\n",
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__func__, data->sg_len, ret, cookie);
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if (!desc) {
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@ -377,12 +382,12 @@ static void sh_mmcif_start_dma_tx(struct sh_mmcif_host *host)
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host->chan_rx = NULL;
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dma_release_channel(chan);
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}
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dev_warn(&host->pd->dev,
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dev_warn(dev,
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"DMA failed: %d, falling back to PIO\n", ret);
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sh_mmcif_bitclr(host, MMCIF_CE_BUF_ACC, BUF_ACC_DMAREN | BUF_ACC_DMAWEN);
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}
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dev_dbg(&host->pd->dev, "%s(): desc %p, cookie %d\n", __func__,
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dev_dbg(dev, "%s(): desc %p, cookie %d\n", __func__,
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desc, cookie);
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}
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@ -395,6 +400,7 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host,
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struct dma_chan *chan;
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void *slave_data = NULL;
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struct resource *res;
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struct device *dev = sh_mmcif_host_to_dev(host);
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dma_cap_mask_t mask;
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int ret;
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@ -407,10 +413,10 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host,
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(void *)pdata->slave_id_rx;
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chan = dma_request_slave_channel_compat(mask, shdma_chan_filter,
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slave_data, &host->pd->dev,
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slave_data, dev,
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direction == DMA_MEM_TO_DEV ? "tx" : "rx");
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dev_dbg(&host->pd->dev, "%s: %s: got channel %p\n", __func__,
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dev_dbg(dev, "%s: %s: got channel %p\n", __func__,
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direction == DMA_MEM_TO_DEV ? "TX" : "RX", chan);
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if (!chan)
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@ -440,12 +446,13 @@ sh_mmcif_request_dma_one(struct sh_mmcif_host *host,
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static void sh_mmcif_request_dma(struct sh_mmcif_host *host,
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struct sh_mmcif_plat_data *pdata)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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host->dma_active = false;
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if (pdata) {
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if (pdata->slave_id_tx <= 0 || pdata->slave_id_rx <= 0)
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return;
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} else if (!host->pd->dev.of_node) {
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} else if (!dev->of_node) {
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return;
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}
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@ -481,7 +488,8 @@ static void sh_mmcif_release_dma(struct sh_mmcif_host *host)
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static void sh_mmcif_clock_control(struct sh_mmcif_host *host, unsigned int clk)
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{
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struct sh_mmcif_plat_data *p = host->pd->dev.platform_data;
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struct device *dev = sh_mmcif_host_to_dev(host);
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struct sh_mmcif_plat_data *p = dev->platform_data;
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bool sup_pclk = p ? p->sup_pclk : false;
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unsigned int current_clk = clk_get_rate(host->clk);
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@ -520,6 +528,7 @@ static void sh_mmcif_sync_reset(struct sh_mmcif_host *host)
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static int sh_mmcif_error_manage(struct sh_mmcif_host *host)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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u32 state1, state2;
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int ret, timeout;
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@ -527,8 +536,8 @@ static int sh_mmcif_error_manage(struct sh_mmcif_host *host)
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state1 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS1);
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state2 = sh_mmcif_readl(host->addr, MMCIF_CE_HOST_STS2);
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dev_dbg(&host->pd->dev, "ERR HOST_STS1 = %08x\n", state1);
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dev_dbg(&host->pd->dev, "ERR HOST_STS2 = %08x\n", state2);
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dev_dbg(dev, "ERR HOST_STS1 = %08x\n", state1);
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dev_dbg(dev, "ERR HOST_STS2 = %08x\n", state2);
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if (state1 & STS1_CMDSEQ) {
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sh_mmcif_bitset(host, MMCIF_CE_CMD_CTRL, CMD_CTRL_BREAK);
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@ -540,25 +549,25 @@ static int sh_mmcif_error_manage(struct sh_mmcif_host *host)
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mdelay(1);
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}
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if (!timeout) {
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dev_err(&host->pd->dev,
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dev_err(dev,
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"Forced end of command sequence timeout err\n");
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return -EIO;
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}
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sh_mmcif_sync_reset(host);
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dev_dbg(&host->pd->dev, "Forced end of command sequence\n");
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dev_dbg(dev, "Forced end of command sequence\n");
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return -EIO;
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}
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if (state2 & STS2_CRC_ERR) {
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dev_err(&host->pd->dev, " CRC error: state %u, wait %u\n",
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dev_err(dev, " CRC error: state %u, wait %u\n",
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host->state, host->wait_for);
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ret = -EIO;
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} else if (state2 & STS2_TIMEOUT_ERR) {
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dev_err(&host->pd->dev, " Timeout: state %u, wait %u\n",
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dev_err(dev, " Timeout: state %u, wait %u\n",
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host->state, host->wait_for);
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ret = -ETIMEDOUT;
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} else {
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dev_dbg(&host->pd->dev, " End/Index error: state %u, wait %u\n",
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dev_dbg(dev, " End/Index error: state %u, wait %u\n",
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host->state, host->wait_for);
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ret = -EIO;
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}
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@ -599,13 +608,14 @@ static void sh_mmcif_single_read(struct sh_mmcif_host *host,
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static bool sh_mmcif_read_block(struct sh_mmcif_host *host)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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struct mmc_data *data = host->mrq->data;
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u32 *p = sg_virt(data->sg);
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int i;
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if (host->sd_error) {
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data->error = sh_mmcif_error_manage(host);
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dev_dbg(&host->pd->dev, "%s(): %d\n", __func__, data->error);
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dev_dbg(dev, "%s(): %d\n", __func__, data->error);
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return false;
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}
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@ -640,13 +650,14 @@ static void sh_mmcif_multi_read(struct sh_mmcif_host *host,
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static bool sh_mmcif_mread_block(struct sh_mmcif_host *host)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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struct mmc_data *data = host->mrq->data;
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u32 *p = host->pio_ptr;
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int i;
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if (host->sd_error) {
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data->error = sh_mmcif_error_manage(host);
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dev_dbg(&host->pd->dev, "%s(): %d\n", __func__, data->error);
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dev_dbg(dev, "%s(): %d\n", __func__, data->error);
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return false;
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}
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@ -677,13 +688,14 @@ static void sh_mmcif_single_write(struct sh_mmcif_host *host,
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static bool sh_mmcif_write_block(struct sh_mmcif_host *host)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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struct mmc_data *data = host->mrq->data;
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u32 *p = sg_virt(data->sg);
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int i;
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if (host->sd_error) {
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data->error = sh_mmcif_error_manage(host);
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dev_dbg(&host->pd->dev, "%s(): %d\n", __func__, data->error);
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dev_dbg(dev, "%s(): %d\n", __func__, data->error);
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return false;
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}
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@ -718,13 +730,14 @@ static void sh_mmcif_multi_write(struct sh_mmcif_host *host,
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static bool sh_mmcif_mwrite_block(struct sh_mmcif_host *host)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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struct mmc_data *data = host->mrq->data;
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u32 *p = host->pio_ptr;
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int i;
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if (host->sd_error) {
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data->error = sh_mmcif_error_manage(host);
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dev_dbg(&host->pd->dev, "%s(): %d\n", __func__, data->error);
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dev_dbg(dev, "%s(): %d\n", __func__, data->error);
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return false;
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}
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@ -762,6 +775,7 @@ static void sh_mmcif_get_cmd12response(struct sh_mmcif_host *host,
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static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
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struct mmc_request *mrq)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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struct mmc_data *data = mrq->data;
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struct mmc_command *cmd = mrq->cmd;
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u32 opc = cmd->opcode;
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@ -781,7 +795,7 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
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tmp |= CMD_SET_RTYP_17B;
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break;
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default:
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dev_err(&host->pd->dev, "Unsupported response type.\n");
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dev_err(dev, "Unsupported response type.\n");
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break;
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}
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switch (opc) {
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@ -809,7 +823,7 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
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tmp |= CMD_SET_DATW_8;
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break;
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default:
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dev_err(&host->pd->dev, "Unsupported bus width.\n");
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dev_err(dev, "Unsupported bus width.\n");
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break;
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}
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switch (host->timing) {
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@ -852,6 +866,8 @@ static u32 sh_mmcif_set_cmd(struct sh_mmcif_host *host,
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static int sh_mmcif_data_trans(struct sh_mmcif_host *host,
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struct mmc_request *mrq, u32 opc)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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switch (opc) {
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case MMC_READ_MULTIPLE_BLOCK:
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sh_mmcif_multi_read(host, mrq);
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@ -867,7 +883,7 @@ static int sh_mmcif_data_trans(struct sh_mmcif_host *host,
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sh_mmcif_single_read(host, mrq);
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return 0;
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default:
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dev_err(&host->pd->dev, "Unsupported CMD%d\n", opc);
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dev_err(dev, "Unsupported CMD%d\n", opc);
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return -EINVAL;
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}
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}
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@ -924,6 +940,8 @@ static void sh_mmcif_start_cmd(struct sh_mmcif_host *host,
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static void sh_mmcif_stop_cmd(struct sh_mmcif_host *host,
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struct mmc_request *mrq)
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{
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struct device *dev = sh_mmcif_host_to_dev(host);
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switch (mrq->cmd->opcode) {
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case MMC_READ_MULTIPLE_BLOCK:
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MCMD12DRE);
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@ -932,7 +950,7 @@ static void sh_mmcif_stop_cmd(struct sh_mmcif_host *host,
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sh_mmcif_bitset(host, MMCIF_CE_INT_MASK, MASK_MCMD12RBE);
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break;
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default:
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dev_err(&host->pd->dev, "unsupported stop cmd\n");
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dev_err(dev, "unsupported stop cmd\n");
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mrq->stop->error = sh_mmcif_error_manage(host);
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return;
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}
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@ -943,11 +961,13 @@ static void sh_mmcif_stop_cmd(struct sh_mmcif_host *host,
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static void sh_mmcif_request(struct mmc_host *mmc, struct mmc_request *mrq)
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{
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struct sh_mmcif_host *host = mmc_priv(mmc);
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struct device *dev = sh_mmcif_host_to_dev(host);
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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if (host->state != STATE_IDLE) {
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dev_dbg(&host->pd->dev, "%s() rejected, state %u\n", __func__, host->state);
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dev_dbg(dev, "%s() rejected, state %u\n",
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__func__, host->state);
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spin_unlock_irqrestore(&host->lock, flags);
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mrq->cmd->error = -EAGAIN;
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mmc_request_done(mmc, mrq);
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@ -999,11 +1019,13 @@ static void sh_mmcif_set_power(struct sh_mmcif_host *host, struct mmc_ios *ios)
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static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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{
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struct sh_mmcif_host *host = mmc_priv(mmc);
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struct device *dev = sh_mmcif_host_to_dev(host);
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unsigned long flags;
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spin_lock_irqsave(&host->lock, flags);
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if (host->state != STATE_IDLE) {
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dev_dbg(&host->pd->dev, "%s() rejected, state %u\n", __func__, host->state);
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dev_dbg(dev, "%s() rejected, state %u\n",
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__func__, host->state);
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spin_unlock_irqrestore(&host->lock, flags);
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return;
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}
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@ -1014,7 +1036,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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if (ios->power_mode == MMC_POWER_UP) {
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if (!host->card_present) {
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/* See if we also get DMA */
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sh_mmcif_request_dma(host, host->pd->dev.platform_data);
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sh_mmcif_request_dma(host, dev->platform_data);
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host->card_present = true;
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}
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sh_mmcif_set_power(host, ios);
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@ -1028,7 +1050,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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}
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}
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if (host->power) {
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pm_runtime_put_sync(&host->pd->dev);
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pm_runtime_put_sync(dev);
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clk_disable_unprepare(host->clk);
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host->power = false;
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if (ios->power_mode == MMC_POWER_OFF)
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@ -1042,7 +1064,7 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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if (!host->power) {
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clk_prepare_enable(host->clk);
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pm_runtime_get_sync(&host->pd->dev);
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pm_runtime_get_sync(dev);
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host->power = true;
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sh_mmcif_sync_reset(host);
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}
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@ -1057,7 +1079,8 @@ static void sh_mmcif_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
|
|||
static int sh_mmcif_get_cd(struct mmc_host *mmc)
|
||||
{
|
||||
struct sh_mmcif_host *host = mmc_priv(mmc);
|
||||
struct sh_mmcif_plat_data *p = host->pd->dev.platform_data;
|
||||
struct device *dev = sh_mmcif_host_to_dev(host);
|
||||
struct sh_mmcif_plat_data *p = dev->platform_data;
|
||||
int ret = mmc_gpio_get_cd(mmc);
|
||||
|
||||
if (ret >= 0)
|
||||
|
|
@ -1079,6 +1102,7 @@ static bool sh_mmcif_end_cmd(struct sh_mmcif_host *host)
|
|||
{
|
||||
struct mmc_command *cmd = host->mrq->cmd;
|
||||
struct mmc_data *data = host->mrq->data;
|
||||
struct device *dev = sh_mmcif_host_to_dev(host);
|
||||
long time;
|
||||
|
||||
if (host->sd_error) {
|
||||
|
|
@ -1092,7 +1116,7 @@ static bool sh_mmcif_end_cmd(struct sh_mmcif_host *host)
|
|||
cmd->error = sh_mmcif_error_manage(host);
|
||||
break;
|
||||
}
|
||||
dev_dbg(&host->pd->dev, "CMD%d error %d\n",
|
||||
dev_dbg(dev, "CMD%d error %d\n",
|
||||
cmd->opcode, cmd->error);
|
||||
host->sd_error = false;
|
||||
return false;
|
||||
|
|
@ -1172,6 +1196,7 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
|
|||
{
|
||||
struct sh_mmcif_host *host = dev_id;
|
||||
struct mmc_request *mrq;
|
||||
struct device *dev = sh_mmcif_host_to_dev(host);
|
||||
bool wait = false;
|
||||
unsigned long flags;
|
||||
int wait_work;
|
||||
|
|
@ -1186,7 +1211,7 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
|
|||
|
||||
mrq = host->mrq;
|
||||
if (!mrq) {
|
||||
dev_dbg(&host->pd->dev, "IRQ thread state %u, wait %u: NULL mrq!\n",
|
||||
dev_dbg(dev, "IRQ thread state %u, wait %u: NULL mrq!\n",
|
||||
host->state, host->wait_for);
|
||||
mutex_unlock(&host->thread_lock);
|
||||
return IRQ_HANDLED;
|
||||
|
|
@ -1224,7 +1249,7 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
|
|||
case MMCIF_WAIT_FOR_STOP:
|
||||
if (host->sd_error) {
|
||||
mrq->stop->error = sh_mmcif_error_manage(host);
|
||||
dev_dbg(&host->pd->dev, "%s(): %d\n", __func__, mrq->stop->error);
|
||||
dev_dbg(dev, "%s(): %d\n", __func__, mrq->stop->error);
|
||||
break;
|
||||
}
|
||||
sh_mmcif_get_cmd12response(host, mrq->stop);
|
||||
|
|
@ -1234,7 +1259,7 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
|
|||
case MMCIF_WAIT_FOR_WRITE_END:
|
||||
if (host->sd_error) {
|
||||
mrq->data->error = sh_mmcif_error_manage(host);
|
||||
dev_dbg(&host->pd->dev, "%s(): %d\n", __func__, mrq->data->error);
|
||||
dev_dbg(dev, "%s(): %d\n", __func__, mrq->data->error);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
|
|
@ -1277,6 +1302,7 @@ static irqreturn_t sh_mmcif_irqt(int irq, void *dev_id)
|
|||
static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
|
||||
{
|
||||
struct sh_mmcif_host *host = dev_id;
|
||||
struct device *dev = sh_mmcif_host_to_dev(host);
|
||||
u32 state, mask;
|
||||
|
||||
state = sh_mmcif_readl(host->addr, MMCIF_CE_INT);
|
||||
|
|
@ -1288,22 +1314,22 @@ static irqreturn_t sh_mmcif_intr(int irq, void *dev_id)
|
|||
sh_mmcif_bitclr(host, MMCIF_CE_INT_MASK, state & MASK_CLEAN);
|
||||
|
||||
if (state & ~MASK_CLEAN)
|
||||
dev_dbg(&host->pd->dev, "IRQ state = 0x%08x incompletely cleared\n",
|
||||
dev_dbg(dev, "IRQ state = 0x%08x incompletely cleared\n",
|
||||
state);
|
||||
|
||||
if (state & INT_ERR_STS || state & ~INT_ALL) {
|
||||
host->sd_error = true;
|
||||
dev_dbg(&host->pd->dev, "int err state = 0x%08x\n", state);
|
||||
dev_dbg(dev, "int err state = 0x%08x\n", state);
|
||||
}
|
||||
if (state & ~(INT_CMD12RBE | INT_CMD12CRE)) {
|
||||
if (!host->mrq)
|
||||
dev_dbg(&host->pd->dev, "NULL IRQ state = 0x%08x\n", state);
|
||||
dev_dbg(dev, "NULL IRQ state = 0x%08x\n", state);
|
||||
if (!host->dma_active)
|
||||
return IRQ_WAKE_THREAD;
|
||||
else if (host->sd_error)
|
||||
mmcif_dma_complete(host);
|
||||
} else {
|
||||
dev_dbg(&host->pd->dev, "Unexpected IRQ 0x%x\n", state);
|
||||
dev_dbg(dev, "Unexpected IRQ 0x%x\n", state);
|
||||
}
|
||||
|
||||
return IRQ_HANDLED;
|
||||
|
|
@ -1314,6 +1340,7 @@ static void mmcif_timeout_work(struct work_struct *work)
|
|||
struct delayed_work *d = container_of(work, struct delayed_work, work);
|
||||
struct sh_mmcif_host *host = container_of(d, struct sh_mmcif_host, timeout_work);
|
||||
struct mmc_request *mrq = host->mrq;
|
||||
struct device *dev = sh_mmcif_host_to_dev(host);
|
||||
unsigned long flags;
|
||||
|
||||
if (host->dying)
|
||||
|
|
@ -1326,7 +1353,7 @@ static void mmcif_timeout_work(struct work_struct *work)
|
|||
return;
|
||||
}
|
||||
|
||||
dev_err(&host->pd->dev, "Timeout waiting for %u on CMD%u\n",
|
||||
dev_err(dev, "Timeout waiting for %u on CMD%u\n",
|
||||
host->wait_for, mrq->cmd->opcode);
|
||||
|
||||
host->state = STATE_TIMEOUT;
|
||||
|
|
@ -1363,7 +1390,8 @@ static void mmcif_timeout_work(struct work_struct *work)
|
|||
|
||||
static void sh_mmcif_init_ocr(struct sh_mmcif_host *host)
|
||||
{
|
||||
struct sh_mmcif_plat_data *pd = host->pd->dev.platform_data;
|
||||
struct device *dev = sh_mmcif_host_to_dev(host);
|
||||
struct sh_mmcif_plat_data *pd = dev->platform_data;
|
||||
struct mmc_host *mmc = host->mmc;
|
||||
|
||||
mmc_regulator_get_supply(mmc);
|
||||
|
|
|
|||
Loading…
Reference in New Issue