mirror of https://gitee.com/openkylin/linux.git
staging:iio:trigger:bfintmr Add output support
Some converters require an external signal to start the conversion. This patch adds support to the bfintmr trigger driver to generate such a signal. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
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2aecc5b95c
commit
587a51241c
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@ -14,14 +14,18 @@
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#include <linux/delay.h>
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#include <asm/gptimers.h>
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#include <asm/portmux.h>
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#include <linux/iio/iio.h>
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#include <linux/iio/trigger.h>
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#include "iio-trig-bfin-timer.h"
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struct bfin_timer {
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unsigned short id, bit;
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unsigned long irqbit;
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int irq;
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int pin;
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};
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/*
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@ -30,22 +34,22 @@ struct bfin_timer {
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*/
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static struct bfin_timer iio_bfin_timer_code[MAX_BLACKFIN_GPTIMERS] = {
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{TIMER0_id, TIMER0bit, TIMER_STATUS_TIMIL0, IRQ_TIMER0},
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{TIMER1_id, TIMER1bit, TIMER_STATUS_TIMIL1, IRQ_TIMER1},
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{TIMER2_id, TIMER2bit, TIMER_STATUS_TIMIL2, IRQ_TIMER2},
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{TIMER0_id, TIMER0bit, TIMER_STATUS_TIMIL0, IRQ_TIMER0, P_TMR0},
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{TIMER1_id, TIMER1bit, TIMER_STATUS_TIMIL1, IRQ_TIMER1, P_TMR1},
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{TIMER2_id, TIMER2bit, TIMER_STATUS_TIMIL2, IRQ_TIMER2, P_TMR2},
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#if (MAX_BLACKFIN_GPTIMERS > 3)
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{TIMER3_id, TIMER3bit, TIMER_STATUS_TIMIL3, IRQ_TIMER3},
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{TIMER4_id, TIMER4bit, TIMER_STATUS_TIMIL4, IRQ_TIMER4},
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{TIMER5_id, TIMER5bit, TIMER_STATUS_TIMIL5, IRQ_TIMER5},
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{TIMER6_id, TIMER6bit, TIMER_STATUS_TIMIL6, IRQ_TIMER6},
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{TIMER7_id, TIMER7bit, TIMER_STATUS_TIMIL7, IRQ_TIMER7},
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{TIMER3_id, TIMER3bit, TIMER_STATUS_TIMIL3, IRQ_TIMER3, P_TMR3},
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{TIMER4_id, TIMER4bit, TIMER_STATUS_TIMIL4, IRQ_TIMER4, P_TMR4},
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{TIMER5_id, TIMER5bit, TIMER_STATUS_TIMIL5, IRQ_TIMER5, P_TMR5},
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{TIMER6_id, TIMER6bit, TIMER_STATUS_TIMIL6, IRQ_TIMER6, P_TMR6},
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{TIMER7_id, TIMER7bit, TIMER_STATUS_TIMIL7, IRQ_TIMER7, P_TMR7},
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#endif
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#if (MAX_BLACKFIN_GPTIMERS > 8)
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{TIMER8_id, TIMER8bit, TIMER_STATUS_TIMIL8, IRQ_TIMER8},
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{TIMER9_id, TIMER9bit, TIMER_STATUS_TIMIL9, IRQ_TIMER9},
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{TIMER10_id, TIMER10bit, TIMER_STATUS_TIMIL10, IRQ_TIMER10},
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{TIMER8_id, TIMER8bit, TIMER_STATUS_TIMIL8, IRQ_TIMER8, P_TMR8},
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{TIMER9_id, TIMER9bit, TIMER_STATUS_TIMIL9, IRQ_TIMER9, P_TMR9},
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{TIMER10_id, TIMER10bit, TIMER_STATUS_TIMIL10, IRQ_TIMER10, P_TMR10},
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#if (MAX_BLACKFIN_GPTIMERS > 11)
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{TIMER11_id, TIMER11bit, TIMER_STATUS_TIMIL11, IRQ_TIMER11},
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{TIMER11_id, TIMER11bit, TIMER_STATUS_TIMIL11, IRQ_TIMER11, P_TMR11},
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#endif
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#endif
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};
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@ -54,6 +58,8 @@ struct bfin_tmr_state {
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struct iio_trigger *trig;
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struct bfin_timer *t;
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unsigned timer_num;
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bool output_enable;
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unsigned int duty;
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int irq;
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};
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@ -77,7 +83,7 @@ static ssize_t iio_bfin_tmr_frequency_store(struct device *dev,
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{
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struct iio_trigger *trig = to_iio_trigger(dev);
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struct bfin_tmr_state *st = trig->private_data;
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long val;
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unsigned long val;
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bool enabled;
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int ret;
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@ -99,13 +105,13 @@ static ssize_t iio_bfin_tmr_frequency_store(struct device *dev,
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goto error_ret;
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val = get_sclk() / val;
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if (val <= 4) {
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if (val <= 4 || val <= st->duty) {
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ret = -EINVAL;
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goto error_ret;
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}
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set_gptimer_period(st->t->id, val);
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set_gptimer_pwidth(st->t->id, 1);
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set_gptimer_pwidth(st->t->id, val - st->duty);
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if (enabled)
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enable_gptimers(st->t->bit);
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@ -176,7 +182,9 @@ static const struct iio_trigger_ops iio_bfin_tmr_trigger_ops = {
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static int __devinit iio_bfin_tmr_trigger_probe(struct platform_device *pdev)
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{
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struct iio_bfin_timer_trigger_pdata *pdata = pdev->dev.platform_data;
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struct bfin_tmr_state *st;
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unsigned int config;
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int ret;
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st = kzalloc(sizeof(*st), GFP_KERNEL);
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@ -220,13 +228,43 @@ static int __devinit iio_bfin_tmr_trigger_probe(struct platform_device *pdev)
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goto out4;
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}
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set_gptimer_config(st->t->id, OUT_DIS | PWM_OUT | PERIOD_CNT | IRQ_ENA);
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config = PWM_OUT | PERIOD_CNT | IRQ_ENA;
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if (pdata && pdata->output_enable) {
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unsigned long long val;
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st->output_enable = true;
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ret = peripheral_request(st->t->pin, st->trig->name);
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if (ret)
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goto out_free_irq;
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val = (unsigned long long)get_sclk() * pdata->duty_ns;
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do_div(val, NSEC_PER_SEC);
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st->duty = val;
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/**
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* The interrupt will be generated at the end of the period,
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* since we want the interrupt to be generated at end of the
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* pulse we invert both polarity and duty cycle, so that the
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* pulse will be generated directly before the interrupt.
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*/
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if (pdata->active_low)
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config |= PULSE_HI;
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} else {
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st->duty = 1;
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config |= OUT_DIS;
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}
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set_gptimer_config(st->t->id, config);
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dev_info(&pdev->dev, "iio trigger Blackfin TMR%d, IRQ-%d",
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st->timer_num, st->irq);
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platform_set_drvdata(pdev, st);
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return 0;
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out_free_irq:
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free_irq(st->irq, st);
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out4:
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iio_trigger_unregister(st->trig);
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out2:
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@ -242,6 +280,8 @@ static int __devexit iio_bfin_tmr_trigger_remove(struct platform_device *pdev)
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struct bfin_tmr_state *st = platform_get_drvdata(pdev);
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disable_gptimers(st->t->bit);
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if (st->output_enable)
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peripheral_free(st->t->pin);
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free_irq(st->irq, st);
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iio_trigger_unregister(st->trig);
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iio_trigger_put(st->trig);
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@ -0,0 +1,24 @@
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#ifndef __IIO_BFIN_TIMER_TRIGGER_H__
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#define __IIO_BFIN_TIMER_TRIGGER_H__
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/**
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* struct iio_bfin_timer_trigger_pdata - timer trigger platform data
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* @output_enable: Enable external trigger pulse generation.
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* @active_low: Whether the trigger pulse is active low.
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* @duty_ns: Length of the trigger pulse in nanoseconds.
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*
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* This struct is used to configure the output pulse generation of the blackfin
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* timer trigger. If output_enable is set to true an external trigger signal
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* will generated on the pin corresponding to the timer. This is useful for
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* converters which needs an external signal to start conversion. active_low and
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* duty_ns are used to configure the type of the trigger pulse. If output_enable
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* is set to false no external trigger pulse will be generated and active_low
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* and duty_ns are ignored.
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**/
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struct iio_bfin_timer_trigger_pdata {
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bool output_enable;
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bool active_low;
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unsigned int duty_ns;
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};
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#endif
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