mirror of https://gitee.com/openkylin/linux.git
ide: move read_sff_dma_status() method to 'struct ide_dma_ops'
Move apparently misplaced read_sff_dma_status() method from 'struct ide_tp_ops' to 'struct ide_dma_ops', renaming it to dma_sff_read_status() and making only required for SFF-8038i compatible IDE controller drivers (greatly cutting down the number of initializers) as its only user (outside ide-dma-sff.c and such drivers) appears to be ide_pci_check_simplex() which is only called for such controllers... Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
This commit is contained in:
parent
3f023b0138
commit
592b531521
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@ -509,6 +509,7 @@ static const struct ide_dma_ops ali_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_port_info ali15x3_chipset __devinitdata = {
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@ -502,7 +502,6 @@ static const struct ide_tp_ops au1xxx_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = ide_read_sff_dma_status,
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.set_irq = ide_set_irq,
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@ -385,6 +385,7 @@ static const struct ide_dma_ops cmd64x_dma_ops = {
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.dma_test_irq = cmd64x_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_dma_ops cmd646_rev1_dma_ops = {
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@ -396,6 +397,7 @@ static const struct ide_dma_ops cmd646_rev1_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_dma_ops cmd648_dma_ops = {
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@ -407,6 +409,7 @@ static const struct ide_dma_ops cmd648_dma_ops = {
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.dma_test_irq = cmd648_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_port_info cmd64x_chipsets[] __devinitdata = {
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@ -70,7 +70,6 @@ static const struct ide_tp_ops falconide_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = ide_read_sff_dma_status,
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.set_irq = ide_set_irq,
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@ -1424,6 +1424,7 @@ static const struct ide_dma_ops hpt37x_dma_ops = {
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.dma_test_irq = hpt374_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_dma_ops hpt370_dma_ops = {
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@ -1435,6 +1436,7 @@ static const struct ide_dma_ops hpt370_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = hpt370_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_dma_ops hpt36x_dma_ops = {
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@ -1446,6 +1448,7 @@ static const struct ide_dma_ops hpt36x_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = hpt366_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_port_info hpt366_chipsets[] __devinitdata = {
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@ -50,6 +50,17 @@ int config_drive_for_dma(ide_drive_t *drive)
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return 0;
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}
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u8 ide_dma_sff_read_status(ide_hwif_t *hwif)
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{
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unsigned long addr = hwif->dma_base + ATA_DMA_STATUS;
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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return readb((void __iomem *)addr);
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else
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return inb(addr);
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}
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EXPORT_SYMBOL_GPL(ide_dma_sff_read_status);
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/**
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* ide_dma_host_set - Enable/disable DMA on a host
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* @drive: drive to control
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@ -62,7 +73,7 @@ void ide_dma_host_set(ide_drive_t *drive, int on)
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{
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ide_hwif_t *hwif = drive->hwif;
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u8 unit = drive->dn & 1;
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u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
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u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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if (on)
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dma_stat |= (1 << (5 + unit));
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@ -200,7 +211,7 @@ int ide_dma_setup(ide_drive_t *drive)
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outb(reading, hwif->dma_base + ATA_DMA_CMD);
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/* read DMA status for INTR & ERROR flags */
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dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
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dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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/* clear INTR & ERROR flags */
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if (mmio)
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@ -232,7 +243,7 @@ EXPORT_SYMBOL_GPL(ide_dma_setup);
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static int dma_timer_expiry(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
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u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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printk(KERN_WARNING "%s: %s: DMA status (0x%02x)\n",
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drive->name, __func__, dma_stat);
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@ -305,7 +316,7 @@ int ide_dma_end(ide_drive_t *drive)
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}
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/* get DMA status */
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dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
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dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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if (mmio)
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/* clear the INTR & ERROR bits */
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@ -331,7 +342,7 @@ EXPORT_SYMBOL_GPL(ide_dma_end);
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int ide_dma_test_irq(ide_drive_t *drive)
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{
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ide_hwif_t *hwif = drive->hwif;
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u8 dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
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u8 dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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return (dma_stat & ATA_DMA_INTR) ? 1 : 0;
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}
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@ -346,5 +357,6 @@ const struct ide_dma_ops sff_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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EXPORT_SYMBOL_GPL(sff_dma_ops);
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@ -159,7 +159,6 @@ static const struct ide_tp_ops h8300_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = ide_read_sff_dma_status,
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.set_irq = ide_set_irq,
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@ -105,15 +105,6 @@ u8 ide_read_altstatus(ide_hwif_t *hwif)
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}
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EXPORT_SYMBOL_GPL(ide_read_altstatus);
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u8 ide_read_sff_dma_status(ide_hwif_t *hwif)
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{
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if (hwif->host_flags & IDE_HFLAG_MMIO)
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return readb((void __iomem *)(hwif->dma_base + ATA_DMA_STATUS));
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else
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return inb(hwif->dma_base + ATA_DMA_STATUS);
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}
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EXPORT_SYMBOL_GPL(ide_read_sff_dma_status);
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void ide_set_irq(ide_hwif_t *hwif, int on)
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{
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u8 ctl = ATA_DEVCTL_OBS;
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@ -388,7 +379,6 @@ const struct ide_tp_ops default_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = ide_read_sff_dma_status,
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.set_irq = ide_set_irq,
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@ -1229,6 +1229,8 @@ static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
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if ((d->host_flags & IDE_HFLAG_NO_DMA) == 0) {
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int rc;
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hwif->dma_ops = d->dma_ops;
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if (d->init_dma)
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rc = d->init_dma(hwif, d);
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else
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@ -1236,12 +1238,13 @@ static void ide_init_port(ide_hwif_t *hwif, unsigned int port,
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if (rc < 0) {
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printk(KERN_INFO "%s: DMA disabled\n", hwif->name);
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hwif->dma_ops = NULL;
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hwif->dma_base = 0;
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hwif->swdma_mask = 0;
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hwif->mwdma_mask = 0;
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hwif->ultra_mask = 0;
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} else if (d->dma_ops)
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hwif->dma_ops = d->dma_ops;
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}
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}
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if ((d->host_flags & IDE_HFLAG_SERIALIZE) ||
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@ -512,6 +512,7 @@ static struct ide_dma_ops it821x_pass_through_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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/**
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@ -56,7 +56,7 @@ static u8 superio_read_status(ide_hwif_t *hwif)
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return superio_ide_inb(hwif->io_ports.status_addr);
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}
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static u8 superio_read_sff_dma_status(ide_hwif_t *hwif)
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static u8 superio_dma_sff_read_status(ide_hwif_t *hwif)
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{
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return superio_ide_inb(hwif->dma_base + ATA_DMA_STATUS);
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}
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@ -109,7 +109,6 @@ static const struct ide_tp_ops superio_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = superio_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = superio_read_sff_dma_status,
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.set_irq = ide_set_irq,
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@ -132,6 +131,8 @@ static void __devinit superio_init_iops(struct hwif_s *hwif)
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tmp = superio_ide_inb(dma_stat);
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outb(tmp | 0x66, dma_stat);
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}
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#else
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#define superio_dma_sff_read_status ide_dma_sff_read_status
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#endif
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static unsigned int ns87415_count = 0, ns87415_control[MAX_HWIFS] = { 0 };
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@ -201,7 +202,7 @@ static int ns87415_dma_end(ide_drive_t *drive)
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u8 dma_stat = 0, dma_cmd = 0;
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drive->waiting_for_dma = 0;
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dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
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dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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/* get DMA command mode */
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dma_cmd = inb(hwif->dma_base + ATA_DMA_CMD);
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/* stop DMA */
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@ -308,6 +309,7 @@ static const struct ide_dma_ops ns87415_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = superio_dma_sff_read_status,
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};
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static const struct ide_port_info ns87415_chipset __devinitdata = {
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@ -337,6 +337,7 @@ static const struct ide_dma_ops pdc20246_dma_ops = {
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.dma_test_irq = pdc202xx_dma_test_irq,
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.dma_lost_irq = pdc202xx_dma_lost_irq,
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.dma_timeout = pdc202xx_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_dma_ops pdc2026x_dma_ops = {
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@ -348,6 +349,7 @@ static const struct ide_dma_ops pdc2026x_dma_ops = {
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.dma_test_irq = pdc202xx_dma_test_irq,
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.dma_lost_irq = pdc202xx_dma_lost_irq,
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.dma_timeout = pdc202xx_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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#define DECLARE_PDC2026X_DEV(udma, sectors) \
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@ -955,7 +955,6 @@ static const struct ide_tp_ops pmac_tp_ops = {
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.exec_command = pmac_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = ide_read_sff_dma_status,
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.set_irq = pmac_set_irq,
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@ -99,7 +99,6 @@ static const struct ide_tp_ops q40ide_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = ide_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = ide_read_sff_dma_status,
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.set_irq = ide_set_irq,
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@ -292,6 +292,7 @@ static const struct ide_dma_ops sc1200_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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static const struct ide_port_info sc1200_chipset __devinitdata = {
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@ -143,7 +143,7 @@ static u8 scc_read_altstatus(ide_hwif_t *hwif)
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return (u8)in_be32((void *)hwif->io_ports.ctl_addr);
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}
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static u8 scc_read_sff_dma_status(ide_hwif_t *hwif)
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static u8 scc_dma_sff_read_status(ide_hwif_t *hwif)
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{
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return (u8)in_be32((void *)(hwif->dma_base + 4));
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}
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@ -853,7 +853,6 @@ static const struct ide_tp_ops scc_tp_ops = {
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.exec_command = scc_exec_command,
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.read_status = scc_read_status,
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.read_altstatus = scc_read_altstatus,
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.read_sff_dma_status = scc_read_sff_dma_status,
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.set_irq = scc_set_irq,
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@ -880,6 +879,7 @@ static const struct ide_dma_ops scc_dma_ops = {
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.dma_test_irq = scc_dma_test_irq,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_sff_read_status = scc_dma_sff_read_status,
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};
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#define DECLARE_SCC_DEV(name_str) \
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@ -130,7 +130,7 @@ int ide_pci_check_simplex(ide_hwif_t *hwif, const struct ide_port_info *d)
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* we tune the drive then try to grab DMA ownership if we want to be
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* the DMA end. This has to be become dynamic to handle hot-plug.
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*/
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dma_stat = hwif->tp_ops->read_sff_dma_status(hwif);
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dma_stat = hwif->dma_ops->dma_sff_read_status(hwif);
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if ((dma_stat & 0x80) && hwif->mate && hwif->mate->dma_base) {
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printk(KERN_INFO "%s %s: simplex device: DMA disabled\n",
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d->name, pci_name(dev));
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@ -377,6 +377,9 @@ int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
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hwif->dma_base = base;
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if (hwif->dma_ops == NULL)
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hwif->dma_ops = &sff_dma_ops;
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if (ide_pci_check_simplex(hwif, d) < 0)
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return -1;
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@ -393,8 +396,6 @@ int ide_hwif_setup_dma(ide_hwif_t *hwif, const struct ide_port_info *d)
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if (ide_allocate_dma_engine(hwif))
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return -1;
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hwif->dma_ops = &sff_dma_ops;
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}
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return 0;
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@ -523,7 +523,6 @@ static const struct ide_tp_ops sgiioc4_tp_ops = {
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.exec_command = ide_exec_command,
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.read_status = sgiioc4_read_status,
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.read_altstatus = ide_read_altstatus,
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.read_sff_dma_status = ide_read_sff_dma_status,
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.set_irq = ide_set_irq,
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@ -717,6 +717,7 @@ static const struct ide_dma_ops sil_dma_ops = {
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.dma_test_irq = siimage_dma_test_irq,
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.dma_timeout = ide_dma_timeout,
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.dma_lost_irq = ide_dma_lost_irq,
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.dma_sff_read_status = ide_dma_sff_read_status,
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};
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#define DECLARE_SII_DEV(p_ops) \
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@ -299,6 +299,7 @@ static const struct ide_dma_ops sl82c105_dma_ops = {
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.dma_test_irq = ide_dma_test_irq,
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.dma_lost_irq = sl82c105_dma_lost_irq,
|
||||
.dma_timeout = sl82c105_dma_timeout,
|
||||
.dma_sff_read_status = ide_dma_sff_read_status,
|
||||
};
|
||||
|
||||
static const struct ide_port_info sl82c105_chipset __devinitdata = {
|
||||
|
|
|
@ -188,6 +188,7 @@ static const struct ide_dma_ops tc86c001_dma_ops = {
|
|||
.dma_test_irq = ide_dma_test_irq,
|
||||
.dma_lost_irq = ide_dma_lost_irq,
|
||||
.dma_timeout = ide_dma_timeout,
|
||||
.dma_sff_read_status = ide_dma_sff_read_status,
|
||||
};
|
||||
|
||||
static const struct ide_port_info tc86c001_chipset __devinitdata = {
|
||||
|
|
|
@ -397,6 +397,17 @@ static int tx4939ide_dma_test_irq(ide_drive_t *drive)
|
|||
return found;
|
||||
}
|
||||
|
||||
#ifdef __BIG_ENDIAN
|
||||
static u8 tx4939ide_dma_sff_read_status(ide_hwif_t *hwif)
|
||||
{
|
||||
void __iomem *base = TX4939IDE_BASE(hwif);
|
||||
|
||||
return tx4939ide_readb(base, TX4939IDE_DMA_Stat);
|
||||
}
|
||||
#else
|
||||
#define tx4939ide_dma_sff_read_status ide_dma_sff_read_status
|
||||
#endif
|
||||
|
||||
static void tx4939ide_init_hwif(ide_hwif_t *hwif)
|
||||
{
|
||||
void __iomem *base = TX4939IDE_BASE(hwif);
|
||||
|
@ -443,13 +454,6 @@ static void tx4939ide_tf_load_fixup(ide_drive_t *drive, ide_task_t *task)
|
|||
|
||||
#ifdef __BIG_ENDIAN
|
||||
|
||||
static u8 tx4939ide_read_sff_dma_status(ide_hwif_t *hwif)
|
||||
{
|
||||
void __iomem *base = TX4939IDE_BASE(hwif);
|
||||
|
||||
return tx4939ide_readb(base, TX4939IDE_DMA_Stat);
|
||||
}
|
||||
|
||||
/* custom iops (independent from SWAP_IO_SPACE) */
|
||||
static u8 tx4939ide_inb(unsigned long port)
|
||||
{
|
||||
|
@ -585,7 +589,6 @@ static const struct ide_tp_ops tx4939ide_tp_ops = {
|
|||
.exec_command = ide_exec_command,
|
||||
.read_status = ide_read_status,
|
||||
.read_altstatus = ide_read_altstatus,
|
||||
.read_sff_dma_status = tx4939ide_read_sff_dma_status,
|
||||
|
||||
.set_irq = ide_set_irq,
|
||||
|
||||
|
@ -609,7 +612,6 @@ static const struct ide_tp_ops tx4939ide_tp_ops = {
|
|||
.exec_command = ide_exec_command,
|
||||
.read_status = ide_read_status,
|
||||
.read_altstatus = ide_read_altstatus,
|
||||
.read_sff_dma_status = ide_read_sff_dma_status,
|
||||
|
||||
.set_irq = ide_set_irq,
|
||||
|
||||
|
@ -638,6 +640,7 @@ static const struct ide_dma_ops tx4939ide_dma_ops = {
|
|||
.dma_test_irq = tx4939ide_dma_test_irq,
|
||||
.dma_lost_irq = ide_dma_lost_irq,
|
||||
.dma_timeout = ide_dma_timeout,
|
||||
.dma_sff_read_status = tx4939ide_dma_sff_read_status,
|
||||
};
|
||||
|
||||
static const struct ide_port_info tx4939ide_port_info __initdata = {
|
||||
|
|
|
@ -674,7 +674,6 @@ struct ide_tp_ops {
|
|||
void (*exec_command)(struct hwif_s *, u8);
|
||||
u8 (*read_status)(struct hwif_s *);
|
||||
u8 (*read_altstatus)(struct hwif_s *);
|
||||
u8 (*read_sff_dma_status)(struct hwif_s *);
|
||||
|
||||
void (*set_irq)(struct hwif_s *, int);
|
||||
|
||||
|
@ -735,6 +734,11 @@ struct ide_dma_ops {
|
|||
int (*dma_test_irq)(struct ide_drive_s *);
|
||||
void (*dma_lost_irq)(struct ide_drive_s *);
|
||||
void (*dma_timeout)(struct ide_drive_s *);
|
||||
/*
|
||||
* The following method is optional and only required to be
|
||||
* implemented for the SFF-8038i compatible controllers.
|
||||
*/
|
||||
u8 (*dma_sff_read_status)(struct hwif_s *);
|
||||
};
|
||||
|
||||
struct ide_host;
|
||||
|
@ -1177,7 +1181,6 @@ void ide_tf_dump(const char *, struct ide_taskfile *);
|
|||
void ide_exec_command(ide_hwif_t *, u8);
|
||||
u8 ide_read_status(ide_hwif_t *);
|
||||
u8 ide_read_altstatus(ide_hwif_t *);
|
||||
u8 ide_read_sff_dma_status(ide_hwif_t *);
|
||||
|
||||
void ide_set_irq(ide_hwif_t *, int);
|
||||
|
||||
|
@ -1458,6 +1461,7 @@ void ide_dma_exec_cmd(ide_drive_t *, u8);
|
|||
extern void ide_dma_start(ide_drive_t *);
|
||||
int ide_dma_end(ide_drive_t *);
|
||||
int ide_dma_test_irq(ide_drive_t *);
|
||||
u8 ide_dma_sff_read_status(ide_hwif_t *);
|
||||
extern const struct ide_dma_ops sff_dma_ops;
|
||||
#else
|
||||
static inline int config_drive_for_dma(ide_drive_t *drive) { return 0; }
|
||||
|
|
Loading…
Reference in New Issue